Fix typos

Found via:
- `codespell -S patches,bundled -L crate,struc,inout,statics,ist,ser,doas`
- `typos --format brief`.

Author: kianmeng

README.md

@@ -34,7 +34,7 @@ No, Aero runs its own kernel that does *not* originate from Linux and does not s
 # Goals
 
 * Creating a modern, safe, beautiful and fast operating system.
-* Targetting modern 64-bit architectures and CPU features.
+* Targeting modern 64-bit architectures and CPU features.
 * Good source-level compatibility with Linux so we can port programs over easily.
 * Making a usable OS which can run on real hardware, not just on emulators or virtual machines.
 
@@ -119,8 +119,8 @@ will not have any effect when you are simply checking or documenting the build.
 - `--debug` toggles off the release build flag when calling cargo.
 
   **Summary**: If the `--debug` flag is not passed then it will build Aero in release mode
-               and debug symbols will be avaliable. On the other hand, if the debug flag is passed
-               then it will be built in debug mode and debug symbols will be still avaliable. By default
+               and debug symbols will be available. On the other hand, if the debug flag is passed
+               then it will be built in debug mode and debug symbols will be still available. By default
                Aero is built in release mode (with debug symbols) since it generates faster and smaller
                binaries which are easier to test.
 - `--no-run` prevents from running the built disk image in the emulator

aero.py

@@ -49,7 +49,7 @@ def log_error(msg):
     import requests
     import xbstrap
 except ImportError:
-    log_error('Please install required libraires using the following command:')
+    log_error('Please install required libraries using the following command:')
     log_error(' - python3 -m pip install requests xbstrap')
 
     sys.exit(0)
@@ -575,7 +575,7 @@ def is_kvm_supported() -> bool:
 
         fd.close()
 
-    # KVM is not avaliable on Windows
+    # KVM is not available on Windows
     return False
 
 

base-files/hello.asm

@@ -13,7 +13,7 @@ _start:
     mov rax, 5 ; SYS_EXIT
     syscall
 
-    ud2 ; unreacheable
+    ud2 ; unreachable
 
 section .data
 msg db      "Hello, world!", 0xa

bootstrap.yml

@@ -302,22 +302,22 @@ tools:
       - args: |
             cat << EOF > config.toml
             changelog-seen = 2
-            
+
             [llvm]
             targets = "X86"
-            
+
             [build]
             target = ["x86_64-unknown-aero-system", "x86_64-unknown-linux-gnu"]
             build-dir = "@THIS_BUILD_DIR@"
             docs = false
-            
+
             [install]
             prefix = "@PREFIX@"
-            
+
             [rust]
             codegen-tests = false
             deny-warnings = false # work around rust-num-cpus warning
-            
+
             [target.x86_64-unknown-linux-gnu]
             llvm-config = "@BUILD_ROOT@/tools/host-llvm/bin/llvm-config"
 

src/aero_kernel/build.rs

@@ -63,7 +63,7 @@ fn main() -> Result<(), Box<dyn Error>> {
             Some(ext) if ext.eq(&OsString::from("inc")) => {
                 let path = path
                     .to_str()
-                    .expect("invalud UTF-8 for file path (skill issue)");
+                    .expect("invalid UTF-8 for file path (skill issue)");
                 inc_files.push(path.to_string())
             }
 

src/aero_kernel/src/acpi/fadt.rs

@@ -34,7 +34,7 @@ pub struct Fadt {
     // Field used in ACPI 1.0; no longer in use, for compatibility only
     reserved: u8,
 
-    pub preferred_power_managament: u8,
+    pub preferred_power_management: u8,
     pub sci_interrupt: u16,
     pub smi_command_port: u32,
     pub acpi_enable: u8,

src/aero_kernel/src/acpi/mcfg.rs

@@ -57,7 +57,7 @@ impl Mcfg {
 ///
 /// ## Notes
 /// Returns false if called before the ACPI tables were initialized.
-pub fn is_avaliable() -> bool {
+pub fn is_available() -> bool {
     MCFG.get().is_some()
 }
 

src/aero_kernel/src/acpi/mod.rs

@@ -18,7 +18,7 @@
  */
 
 //! The ACPI (Advanced Configuration and Power Interface) tables help to gather the
-//! CPU, interrupt, and timer informations.
+//! CPU, interrupt, and timer information.
 //!
 //! **Notes**: <https://wiki.osdev.org/ACPI>
 

src/aero_kernel/src/arch/aarch64/mod.rs

@@ -55,7 +55,7 @@ extern "C" fn arch_aero_main() -> ! {
         .expect("limine: invalid kernel file pointer");
 
     // Before we start the initialization process, we need to make sure
-    // the unwind info is avaliable; just in case if there is a kernel
+    // the unwind info is available; just in case if there is a kernel
     // panic, it will be able to unwind the stack.
     crate::unwind::UNWIND_INFO.call_once(|| {
         use crate::unwind::UnwindInfo;
@@ -75,7 +75,7 @@ extern "C" fn arch_aero_main() -> ! {
 
     // Now that we have unwind info, we can initialize the COM ports. This
     // will be used to print panic messages/logs before the debug renderer is
-    // initialized to the serial output (if avaliable).
+    // initialized to the serial output (if available).
     drivers::uart::init();
     logger::init();
 

src/aero_kernel/src/arch/x86_64/apic.rs

@@ -118,7 +118,7 @@ pub struct LocalApic {
 impl LocalApic {
     /// Creates a new local APIC instance.
     ///
-    /// ## Saftey
+    /// ## Safety
     /// The provided `address` points to a valid local APIC memory region and
     /// the `apic_type` is valid.
     fn new(address: VirtAddr, apic_type: ApicType) -> Self {

src/aero_kernel/src/arch/x86_64/controlregs.rs

@@ -73,7 +73,7 @@ bitflags::bitflags! {
         const FSGSBASE = 1 << 16;
         /// Enables process-context identifiers (PCIDs).
         const PCID = 1 << 17;
-        /// Enables extendet processor state management instructions, including XGETBV and XSAVE.
+        /// Enables extended processor state management instructions, including XGETBV and XSAVE.
         const OSXSAVE = 1 << 18;
         /// Prevents the execution of instructions that reside in pages accessible by user-mode
         /// software when the processor is in supervisor-mode.
@@ -149,7 +149,7 @@ bitflags::bitflags! {
         const ALIGNMENT_CHECK = 1 << 18;
         /// Enable the virtual-8086 mode.
         const VIRTUAL_8086_MODE = 1 << 17;
-        /// Allows to restart an instruction following an instrucion breakpoint.
+        /// Allows to restart an instruction following an instruction breakpoint.
         const RESUME_FLAG = 1 << 16;
         /// Used by `iret` in hardware task switch mode to determine if current task is nested.
         const NESTED_TASK = 1 << 14;

src/aero_kernel/src/arch/x86_64/gdt.rs

@@ -316,7 +316,7 @@ pub fn init_boot() {
     }
 }
 
-pub fn get_task_state_segement() -> &'static mut Tss {
+pub fn get_task_state_segment() -> &'static mut Tss {
     &mut get_kpcr().tss
 }
 
@@ -328,7 +328,7 @@ static STK: [u8; 4096 * 16] = [0; 4096 * 16];
 
 /// Initialize the *actual* GDT stored in TLS.
 ///
-/// ## Saftey
+/// ## Safety
 /// The heap must be initialized before this function is called.
 pub fn init() {
     let gdt = unsafe {
@@ -346,7 +346,7 @@ pub fn init() {
     gdt.copy_from_slice(&GDT);
 
     unsafe {
-        let tss_ref = get_task_state_segement();
+        let tss_ref = get_task_state_segment();
         let tss_ptr = tss_ref as *mut Tss;
 
         gdt[GdtEntryType::TSS as usize].set_offset(tss_ptr as u32);

src/aero_kernel/src/arch/x86_64/interrupts/exceptions.rs

@@ -49,7 +49,7 @@ interrupt_exception!(fn debug() => "Debug");
 interrupt_exception!(fn non_maskable() => "Non Maskable");
 interrupt_exception!(fn overflow() => "Stack Overflow");
 interrupt_exception!(fn bound_range() => "Out of Bounds");
-interrupt_exception!(fn device_not_available() => "Device not Avaliable");
+interrupt_exception!(fn device_not_available() => "Device not Available");
 interrupt_exception!(fn double_fault() => "Double Fault");
 interrupt_exception!(fn invalid_tss() => "Invalid TSS");
 interrupt_exception!(fn segment_not_present() => "Segment not Present");

src/aero_kernel/src/arch/x86_64/interrupts/mod.rs

@@ -110,7 +110,7 @@ impl ApicController {
 
 /// PIC (Programmable Interrupt Controller) manages hardware interrupts and sends
 /// them to the appropriate system interrupt for the x86 architecture. Since APIC
-/// has replaced PIC on modern systems, Aero disables PIC when APIC is avaliable.
+/// has replaced PIC on modern systems, Aero disables PIC when APIC is available.
 ///
 /// ## Notes
 /// * <https://wiki.osdev.org/8259_PIC>

src/aero_kernel/src/arch/x86_64/mod.rs

@@ -90,7 +90,7 @@ extern "C" fn arch_aero_main() -> ! {
         .expect("limine: invalid kernel file pointer");
 
     // Before we start the initialization process, we need to make sure
-    // the unwind info is avaliable; just in case if there is a kernel
+    // the unwind info is available; just in case if there is a kernel
     // panic, it will be able to unwind the stack.
     crate::unwind::UNWIND_INFO.call_once(|| {
         use crate::unwind::UnwindInfo;
@@ -110,7 +110,7 @@ extern "C" fn arch_aero_main() -> ! {
 
     // Now that we have unwind info, we can initialize the COM ports. This
     // will be used to print panic messages/logs before the debug renderer is
-    // initialized to the serial output (if avaliable).
+    // initialized to the serial output (if available).
     drivers::uart::init();
     logger::init();
 

src/aero_kernel/src/arch/x86_64/signals.rs

@@ -65,7 +65,7 @@ impl SignalFrame {
 }
 
 pub fn interrupt_check_signals(stack: &mut InterruptStack) {
-    // SAFTEY: If this interrupt did not originate from userland then we cannot
+    // SAFETY: If this interrupt did not originate from userland then we cannot
     // check for signals since the scheduler might not be initialized.
     if !stack.iret.is_user() {
         return;

src/aero_kernel/src/arch/x86_64/syscall_handler.asm

@@ -47,7 +47,7 @@ global x86_64_syscall_handler
 ;
 ; (note: R12..R15, RBP, RBX are callee-preserved in C ABI)
 ;
-; The instruction saves the RIP to RCX, cleares RFLAGS.RF then saves
+; The instruction saves the RIP to RCX, clears RFLAGS.RF then saves
 ; RFLAGS to R11. Followed by, it loads the new SS, CS, and RIP from
 ; previously programmed MSRs.
 ;

src/aero_kernel/src/arch/x86_64/task.rs

@@ -130,7 +130,7 @@ impl ArchTask {
             context_switch_rsp: VirtAddr::zero(),
 
             // Since the IDLE task is a special kernel task, we use the kernel's
-            // address space here and we also use the kernel privilage level here.
+            // address space here and we also use the kernel privilege level here.
             address_space: AddressSpace::this(),
             user: false,
 
@@ -484,7 +484,7 @@ pub fn arch_task_spinup(from: &mut ArchTask, to: &ArchTask) {
     unsafe {
         // Load the new thread's kernel stack pointer everywhere it's needed.
         let kstackp = to.context_switch_rsp.as_u64();
-        super::gdt::get_task_state_segement().rsp[0] = kstackp;
+        super::gdt::get_task_state_segment().rsp[0] = kstackp;
         io::wrmsr(io::IA32_SYSENTER_ESP, kstackp);
 
         // switch to the new FS base.

src/aero_kernel/src/drivers/block/ahci.rs

@@ -253,13 +253,13 @@ impl DmaRequest {
         self.sector
     }
 
-    /// Copys the data from the DMA buffer into the given buffer.
+    /// Copies the data from the DMA buffer into the given buffer.
     pub fn copy_into(&self, into: &mut [u8]) {
         let mut offset = 0x00; // Keep track of the offset
-        let mut remaning = into.len(); // Keep track of the remaining data
+        let mut remaining = into.len(); // Keep track of the remaining data
 
         for buffer in self.buffer.iter() {
-            let count = core::cmp::min(remaning, 0x2000);
+            let count = core::cmp::min(remaining, 0x2000);
 
             let buffer_pointer = buffer.start.as_hhdm_virt().as_ptr();
             let buffer = unsafe { core::slice::from_raw_parts::<u8>(buffer_pointer, count) };
@@ -268,7 +268,7 @@ impl DmaRequest {
             // calculated offset.
             into[offset..offset + count].copy_from_slice(buffer);
 
-            remaning -= count; // Subtract the size from the remaining size.
+            remaining -= count; // Subtract the size from the remaining size.
             offset += count; // Add the size to the offset.
         }
     }
@@ -634,7 +634,7 @@ impl HbaPort {
         let ipm = status.interface_power_management();
         let dd = status.device_detection();
 
-        // Check if the port is active and is present. If thats the case
+        // Check if the port is active and is present. If that's the case
         // we can start the AHCI port.
         if let (HbaPortDd::PresentAndE, HbaPortIpm::Active) = (dd, ipm) {
             log::trace!("ahci: enabling port {}", port);
@@ -881,7 +881,7 @@ impl AhciProtected {
                     // Add the port to the ports array.
                     self.ports[i] = Some(port);
 
-                    // Workaround to get access to the HBA and still satify the
+                    // Workaround to get access to the HBA and still satisfy the
                     // borrow checker.
                     hba = self.hba_mem();
                 }

src/aero_kernel/src/drivers/block/ide/registers.rs

@@ -79,7 +79,7 @@ impl BaseDriveSelReg {
 
 bitflags::bitflags! {
     pub struct BaseStatusReg: u8 {
-        const ERR = 0b00000001; // Error occured
+        const ERR = 0b00000001; // Error occurred
         const IDX = 0b00000010; // Index. Always set to zero
         const CORR = 0b00000100; // Corrected data. Always set to zero
         const DRQ = 0b00001000; // Set when the drive has PIO data to transfer, or is ready to accept PIO data
@@ -118,8 +118,8 @@ bitflags::bitflags! {
         const DMA_ACTIVE = 0b0000_0001;
         const DMA_FAILED = 0b0000_0010;
         const DISK_IRQ = 0b0000_0100;
-        const MASTER_DMA_CAPPABLE = 0b0010_0000;
-        const SLAVE_DMA_CAPPABLE = 0b0100_0000;
+        const MASTER_DMA_CAPABLE = 0b0010_0000;
+        const SLAVE_DMA_CAPABLE = 0b0100_0000;
         const NO_DMA_SHARING = 0b1000_0000;
     }
 }

src/aero_kernel/src/drivers/block/nvme/queue.rs

@@ -12,7 +12,7 @@ const fn calculate_doorbell_offset(queue_id: u16, multiplier: usize, dstrd: usiz
 }
 
 pub struct Completion;
-pub struct Submisson;
+pub struct Submission;
 
 pub trait QueueType {
     type Type;
@@ -24,7 +24,7 @@ impl QueueType for Completion {
     type Type = CompletionEntry;
 }
 
-impl QueueType for Submisson {
+impl QueueType for Submission {
     const DOORBELL_OFFSET: usize = 0;
     type Type = Command;
 }
@@ -94,7 +94,7 @@ impl Queue<'_, Completion> {
     }
 }
 
-impl Queue<'_, Submisson> {
+impl Queue<'_, Submission> {
     pub fn submit_command(&mut self, command: Command) {
         self.queue[self.index] = UnsafeCell::new(command);
 
@@ -111,7 +111,7 @@ pub(super) struct QueuePair<'a> {
 
     cid: u16,
 
-    submission: Queue<'a, Submisson>,
+    submission: Queue<'a, Submission>,
     completion: Queue<'a, Completion>,
 }