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phydm_hwconfig.c
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phydm_hwconfig.c
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//============================================================
// include files
//============================================================
#include "mp_precomp.h"
#include "phydm_precomp.h"
#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig_MP_##ic##txt(pDM_Odm))
#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC_##ic##txt(pDM_Odm))
#if (PHYDM_TESTCHIP_SUPPORT == 1)
#define READ_AND_CONFIG(ic, txt) do {\
if (pDM_Odm->bIsMPChip)\
READ_AND_CONFIG_MP(ic,txt);\
else\
READ_AND_CONFIG_TC(ic,txt);\
} while(0)
#else
#define READ_AND_CONFIG READ_AND_CONFIG_MP
#endif
#define GET_VERSION_MP(ic, txt) (ODM_GetVersion_MP_##ic##txt())
#define GET_VERSION_TC(ic, txt) (ODM_GetVersion_TC_##ic##txt())
#define GET_VERSION(ic, txt) (pDM_Odm->bIsMPChip?GET_VERSION_MP(ic,txt):GET_VERSION_TC(ic,txt))
u1Byte
odm_QueryRxPwrPercentage(
IN s1Byte AntPower
)
{
if ((AntPower <= -100) || (AntPower >= 20))
{
return 0;
}
else if (AntPower >= 0)
{
return 100;
}
else
{
return (100+AntPower);
}
}
//
// 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer.
// IF other SW team do not support the feature, remove this section.??
//
s4Byte
odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(
IN OUT PDM_ODM_T pDM_Odm,
s4Byte CurrSig
)
{
s4Byte RetSig = 0;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
//if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE)
{
// Step 1. Scale mapping.
// 20100611 Joseph: Re-tunning RSSI presentation for Lenovo.
// 20100426 Joseph: Modify Signal strength mapping.
// This modification makes the RSSI indication similar to Intel solution.
// 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE.
if(CurrSig >= 54 && CurrSig <= 100)
{
RetSig = 100;
}
else if(CurrSig>=42 && CurrSig <= 53 )
{
RetSig = 95;
}
else if(CurrSig>=36 && CurrSig <= 41 )
{
RetSig = 74 + ((CurrSig - 36) *20)/6;
}
else if(CurrSig>=33 && CurrSig <= 35 )
{
RetSig = 65 + ((CurrSig - 33) *8)/2;
}
else if(CurrSig>=18 && CurrSig <= 32 )
{
RetSig = 62 + ((CurrSig - 18) *2)/15;
}
else if(CurrSig>=15 && CurrSig <= 17 )
{
RetSig = 33 + ((CurrSig - 15) *28)/2;
}
else if(CurrSig>=10 && CurrSig <= 14 )
{
RetSig = 39;
}
else if(CurrSig>=8 && CurrSig <= 9 )
{
RetSig = 33;
}
else if(CurrSig <= 8 )
{
RetSig = 19;
}
}
#endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN)
return RetSig;
}
s4Byte
odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(
IN OUT PDM_ODM_T pDM_Odm,
s4Byte CurrSig
)
{
s4Byte RetSig = 0;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
//if(pDM_Odm->SupportInterface == ODM_ITRF_USB)
{
// Netcore request this modification because 2009.04.13 SU driver use it.
if(CurrSig >= 31 && CurrSig <= 100)
{
RetSig = 100;
}
else if(CurrSig >= 21 && CurrSig <= 30)
{
RetSig = 90 + ((CurrSig - 20) / 1);
}
else if(CurrSig >= 11 && CurrSig <= 20)
{
RetSig = 80 + ((CurrSig - 10) / 1);
}
else if(CurrSig >= 7 && CurrSig <= 10)
{
RetSig = 69 + (CurrSig - 7);
}
else if(CurrSig == 6)
{
RetSig = 54;
}
else if(CurrSig == 5)
{
RetSig = 45;
}
else if(CurrSig == 4)
{
RetSig = 36;
}
else if(CurrSig == 3)
{
RetSig = 27;
}
else if(CurrSig == 2)
{
RetSig = 18;
}
else if(CurrSig == 1)
{
RetSig = 9;
}
else
{
RetSig = CurrSig;
}
}
#endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_WIN)
return RetSig;
}
s4Byte
odm_SignalScaleMapping_92CSeries(
IN OUT PDM_ODM_T pDM_Odm,
IN s4Byte CurrSig
)
{
s4Byte RetSig = 0;
#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE)
{
// Step 1. Scale mapping.
if(CurrSig >= 61 && CurrSig <= 100)
{
RetSig = 90 + ((CurrSig - 60) / 4);
}
else if(CurrSig >= 41 && CurrSig <= 60)
{
RetSig = 78 + ((CurrSig - 40) / 2);
}
else if(CurrSig >= 31 && CurrSig <= 40)
{
RetSig = 66 + (CurrSig - 30);
}
else if(CurrSig >= 21 && CurrSig <= 30)
{
RetSig = 54 + (CurrSig - 20);
}
else if(CurrSig >= 5 && CurrSig <= 20)
{
RetSig = 42 + (((CurrSig - 5) * 2) / 3);
}
else if(CurrSig == 4)
{
RetSig = 36;
}
else if(CurrSig == 3)
{
RetSig = 27;
}
else if(CurrSig == 2)
{
RetSig = 18;
}
else if(CurrSig == 1)
{
RetSig = 9;
}
else
{
RetSig = CurrSig;
}
}
#endif
#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) ||(DEV_BUS_TYPE == RT_SDIO_INTERFACE))
if((pDM_Odm->SupportInterface == ODM_ITRF_USB) || (pDM_Odm->SupportInterface == ODM_ITRF_SDIO))
{
if(CurrSig >= 51 && CurrSig <= 100)
{
RetSig = 100;
}
else if(CurrSig >= 41 && CurrSig <= 50)
{
RetSig = 80 + ((CurrSig - 40)*2);
}
else if(CurrSig >= 31 && CurrSig <= 40)
{
RetSig = 66 + (CurrSig - 30);
}
else if(CurrSig >= 21 && CurrSig <= 30)
{
RetSig = 54 + (CurrSig - 20);
}
else if(CurrSig >= 10 && CurrSig <= 20)
{
RetSig = 42 + (((CurrSig - 10) * 2) / 3);
}
else if(CurrSig >= 5 && CurrSig <= 9)
{
RetSig = 22 + (((CurrSig - 5) * 3) / 2);
}
else if(CurrSig >= 1 && CurrSig <= 4)
{
RetSig = 6 + (((CurrSig - 1) * 3) / 2);
}
else
{
RetSig = CurrSig;
}
}
#endif
return RetSig;
}
s4Byte
odm_SignalScaleMapping(
IN OUT PDM_ODM_T pDM_Odm,
IN s4Byte CurrSig
)
{
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
if( (pDM_Odm->SupportPlatform == ODM_WIN) &&
(pDM_Odm->SupportInterface != ODM_ITRF_PCIE) && //USB & SDIO
(pDM_Odm->PatchID==10))//pMgntInfo->CustomerID == RT_CID_819x_Netcore
{
return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(pDM_Odm,CurrSig);
}
else if( (pDM_Odm->SupportPlatform == ODM_WIN) &&
(pDM_Odm->SupportInterface == ODM_ITRF_PCIE) &&
(pDM_Odm->PatchID==19))//pMgntInfo->CustomerID == RT_CID_819x_Lenovo)
{
return odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(pDM_Odm, CurrSig);
}else
#endif
{
return odm_SignalScaleMapping_92CSeries(pDM_Odm,CurrSig);
}
}
static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo(
IN PDM_ODM_T pDM_Odm,
IN u1Byte isCCKrate,
IN u1Byte PWDB_ALL,
IN u1Byte path,
IN u1Byte RSSI
)
{
u1Byte SQ = 0;
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
if(isCCKrate){
if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter))
{
//
// <Roger_Notes> Expected signal strength and bars indication at Lenovo lab. 2013.04.11
// 802.11n, 802.11b, 802.11g only at channel 6
//
// Attenuation (dB) OS Signal Bars RSSI by Xirrus (dBm)
// 50 5 -52
// 55 5 -54
// 60 5 -55
// 65 5 -59
// 70 5 -63
// 75 5 -66
// 80 4 -72
// 85 3 -75
// 90 3 -80
// 95 2 -85
// 100 1 -89
// 102 1 -90
// 104 1 -91
//
RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_CID_819x_Lenovo\n"));
#if OS_WIN_FROM_WIN8(OS_VERSION)
if(PWDB_ALL >= 50)
SQ = 100;
else if(PWDB_ALL >= 23 && PWDB_ALL < 50)
SQ = 80;
else if(PWDB_ALL >= 18 && PWDB_ALL < 23)
SQ = 60;
else if(PWDB_ALL >= 8 && PWDB_ALL < 18)
SQ = 40;
else
SQ = 10;
#else
if(PWDB_ALL >= 34)
SQ = 100;
else if(PWDB_ALL >= 23 && PWDB_ALL < 34)
SQ = 80;
else if(PWDB_ALL >= 18 && PWDB_ALL < 23)
SQ = 60;
else if(PWDB_ALL >= 8 && PWDB_ALL < 18)
SQ = 40;
else
SQ = 10;
if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7
SQ = 20;
#endif
}
else if(IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter)){
//
// <Roger_Notes> Expected signal strength and bars indication at Lenovo lab. 2013.04.11
// 802.11n, 802.11b, 802.11g only at channel 6
//
// Attenuation (dB) OS Signal Bars RSSI by Xirrus (dBm)
// 50 5 -49
// 55 5 -49
// 60 5 -50
// 65 5 -51
// 70 5 -52
// 75 5 -54
// 80 5 -55
// 85 4 -60
// 90 3 -63
// 95 3 -65
// 100 2 -67
// 102 2 -67
// 104 1 -70
//
if(PWDB_ALL >= 50)
SQ = 100;
else if(PWDB_ALL >= 35 && PWDB_ALL < 50)
SQ = 80;
else if(PWDB_ALL >= 31 && PWDB_ALL < 35)
SQ = 60;
else if(PWDB_ALL >= 22 && PWDB_ALL < 31)
SQ = 40;
else if(PWDB_ALL >= 18 && PWDB_ALL < 22)
SQ = 20;
else
SQ = 10;
} else {
if (PWDB_ALL >= 50)
SQ = 100;
else if (PWDB_ALL >= 35 && PWDB_ALL < 50)
SQ = 80;
else if (PWDB_ALL >= 22 && PWDB_ALL < 35)
SQ = 60;
else if (PWDB_ALL >= 18 && PWDB_ALL < 22)
SQ = 40;
else
SQ = 10;
}
}
else
{//OFDM rate
if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) ||
IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter))
{
if(RSSI >= 45)
SQ = 100;
else if(RSSI >= 22 && RSSI < 45)
SQ = 80;
else if(RSSI >= 18 && RSSI < 22)
SQ = 40;
else
SQ = 20;
} else {
if(RSSI >= 45)
SQ = 100;
else if(RSSI >= 22 && RSSI < 45)
SQ = 80;
else if(RSSI >= 18 && RSSI < 22)
SQ = 40;
else
SQ = 20;
}
}
RT_TRACE(COMP_DBG, DBG_TRACE, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ));
#endif
return SQ;
}
static u1Byte odm_SQ_process_patch_RT_CID_819x_Acer(
IN PDM_ODM_T pDM_Odm,
IN u1Byte isCCKrate,
IN u1Byte PWDB_ALL,
IN u1Byte path,
IN u1Byte RSSI
)
{
u1Byte SQ = 0;
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
if(isCCKrate){
RT_TRACE(COMP_DBG, DBG_WARNING, ("odm_SQ_process_patch_RT_Acer\n"));
#if OS_WIN_FROM_WIN8(OS_VERSION)
if(PWDB_ALL >= 50)
SQ = 100;
else if(PWDB_ALL >= 35 && PWDB_ALL < 50)
SQ = 80;
else if(PWDB_ALL >= 30 && PWDB_ALL < 35)
SQ = 60;
else if(PWDB_ALL >= 25 && PWDB_ALL < 30)
SQ = 40;
else if(PWDB_ALL >= 20 && PWDB_ALL < 25)
SQ = 20;
else
SQ = 10;
#else
if(PWDB_ALL >= 50)
SQ = 100;
else if(PWDB_ALL >= 35 && PWDB_ALL < 50)
SQ = 80;
else if(PWDB_ALL >= 30 && PWDB_ALL < 35)
SQ = 60;
else if(PWDB_ALL >= 25 && PWDB_ALL < 30)
SQ = 40;
else if(PWDB_ALL >= 20 && PWDB_ALL < 25)
SQ = 20;
else
SQ = 10;
if(PWDB_ALL == 0)// Abnormal case, do not indicate the value above 20 on Win7
SQ = 20;
#endif
}
else
{//OFDM rate
if(IS_HARDWARE_TYPE_8723AE(pDM_Odm->Adapter) ||
IS_HARDWARE_TYPE_8192E(pDM_Odm->Adapter))
{
if(RSSI >= 45)
SQ = 100;
else if(RSSI >= 22 && RSSI < 45)
SQ = 80;
else if(RSSI >= 18 && RSSI < 22)
SQ = 40;
else
SQ = 20;
}
else
{
if(RSSI >= 35)
SQ = 100;
else if(RSSI >= 30 && RSSI < 35)
SQ = 80;
else if(RSSI >= 25 && RSSI < 30)
SQ = 40;
else
SQ = 20;
}
}
RT_TRACE(COMP_DBG, DBG_LOUD, ("isCCKrate(%#d), PWDB_ALL(%#d), RSSI(%#d), SQ(%#d)\n", isCCKrate, PWDB_ALL, RSSI, SQ));
#endif
return SQ;
}
static u1Byte
odm_EVMdbToPercentage(
IN s1Byte Value
)
{
//
// -33dB~0dB to 0%~99%
//
s1Byte ret_val;
ret_val = Value;
ret_val /= 2;
/*DbgPrint("Value=%d\n", Value);*/
/*ODM_RT_DISP(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C Value=%d / %x\n", ret_val, ret_val));*/
#ifdef ODM_EVM_ENHANCE_ANTDIV
if (ret_val >= 0)
ret_val = 0;
if (ret_val <= -40)
ret_val = -40;
ret_val = 0 - ret_val;
ret_val *= 3;
#else
if (ret_val >= 0)
ret_val = 0;
if (ret_val <= -33)
ret_val = -33;
ret_val = 0 - ret_val;
ret_val *= 3;
if (ret_val == 99)
ret_val = 100;
#endif
return (u1Byte)ret_val;
}
static u1Byte
odm_EVMdbm_JaguarSeries(
IN s1Byte Value
)
{
s1Byte ret_val = Value;
// -33dB~0dB to 33dB ~ 0dB
if(ret_val == -128)
ret_val = 127;
else if (ret_val < 0)
ret_val = 0 - ret_val;
ret_val = ret_val >> 1;
return (u1Byte)ret_val;
}
static s2Byte
odm_Cfo(
IN s1Byte Value
)
{
s2Byte ret_val;
if (Value < 0)
{
ret_val = 0 - Value;
ret_val = (ret_val << 1) + (ret_val >> 1) ; // *2.5~=312.5/2^7
ret_val = ret_val | BIT12; // set bit12 as 1 for negative cfo
}
else
{
ret_val = Value;
ret_val = (ret_val << 1) + (ret_val>>1) ; // *2.5~=312.5/2^7
}
return ret_val;
}
#if(ODM_IC_11N_SERIES_SUPPORT == 1)
s1Byte
odm_CCKRSSI_8703B(
IN u2Byte LNA_idx,
IN u1Byte VGA_idx
)
{
s1Byte rx_pwr_all = 0x00;
switch (LNA_idx) {
case 0xf:
rx_pwr_all = -48 - (2 * VGA_idx);
break;
case 0xb:
rx_pwr_all = -42 - (2 * VGA_idx); /*TBD*/
break;
case 0xa:
rx_pwr_all = -36 - (2 * VGA_idx);
break;
case 8:
rx_pwr_all = -32 - (2 * VGA_idx);
break;
case 7:
rx_pwr_all = -28 - (2 * VGA_idx); /*TBD*/
break;
case 4:
rx_pwr_all = -16 - (2 * VGA_idx);
break;
case 0:
rx_pwr_all = -2 - (2 * VGA_idx);
break;
default:
/*rx_pwr_all = -53+(2*(31-VGA_idx));*/
/*DbgPrint("wrong LNA index\n");*/
break;
}
return rx_pwr_all;
}
VOID
odm_RxPhyStatus92CSeries_Parsing(
IN OUT PDM_ODM_T pDM_Odm,
OUT PODM_PHY_INFO_T pPhyInfo,
IN pu1Byte pPhyStatus,
IN PODM_PACKET_INFO_T pPktinfo
)
{
SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
u1Byte i, Max_spatial_stream;
s1Byte rx_pwr[4], rx_pwr_all=0;
u1Byte EVM, PWDB_ALL = 0, PWDB_ALL_BT;
u1Byte RSSI, total_rssi=0;
BOOLEAN isCCKrate=FALSE;
u1Byte rf_rx_num = 0;
u1Byte cck_highpwr = 0;
u1Byte LNA_idx = 0;
u1Byte VGA_idx = 0;
PPHY_STATUS_RPT_8192CD_T pPhyStaRpt = (PPHY_STATUS_RPT_8192CD_T)pPhyStatus;
isCCKrate = (pPktinfo->DataRate <= ODM_RATE11M) ? TRUE : FALSE;
pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;
pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;
if(isCCKrate)
{
u1Byte report;
u1Byte cck_agc_rpt;
pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++;
//
// (1)Hardware does not provide RSSI for CCK
// (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
//
//if(pHalData->eRFPowerState == eRfOn)
cck_highpwr = pDM_Odm->bCckHighPower;
//else
// cck_highpwr = FALSE;
cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ;
//2011.11.28 LukeLee: 88E use different LNA & VGA gain table
//The RSSI formula should be modified according to the gain table
//In 88E, cck_highpwr is always set to 1
if (pDM_Odm->SupportICType & (ODM_RTL8703B)) {
#if (RTL8703B_SUPPORT == 1)
if (pDM_Odm->cck_agc_report_type == 1) { /*4 bit LNA*/
u1Byte cck_agc_rpt_b = (pPhyStaRpt->cck_rpt_b_ofdm_cfosho_b & BIT7) ? 1 : 0;
LNA_idx = (cck_agc_rpt_b << 3) | ((cck_agc_rpt & 0xE0) >> 5);
VGA_idx = (cck_agc_rpt & 0x1F);
rx_pwr_all = odm_CCKRSSI_8703B(LNA_idx, VGA_idx);
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
if (PWDB_ALL > 100)
PWDB_ALL = 100;
}
#endif
} else if (pDM_Odm->SupportICType & (ODM_RTL8188E | ODM_RTL8192E | ODM_RTL8723B | ODM_RTL8188F)) /*3 bit LNA*/
{
LNA_idx = ((cck_agc_rpt & 0xE0) >>5);
VGA_idx = (cck_agc_rpt & 0x1F);
if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8192E))
{
if(pDM_Odm->cck_agc_report_type == 0 && (pDM_Odm->SupportICType & ODM_RTL8192E) )
{
switch(LNA_idx)
{
case 7:
rx_pwr_all = -45 - 2*(VGA_idx);
break;
case 6:
rx_pwr_all = -43 -2*(VGA_idx);
break;
case 5:
rx_pwr_all = -27 - 2*(VGA_idx);
break;
case 4:
rx_pwr_all = -21 - 2*(VGA_idx);
break;
case 3:
rx_pwr_all = -18 - 2*(VGA_idx);
break;
case 2:
rx_pwr_all = -6 - 2*(VGA_idx);
break;
case 1:
rx_pwr_all = 9 -2*(VGA_idx);
break;
case 0:
rx_pwr_all = 15 -2*(VGA_idx);
break;
default:
break;
}
if(pDM_Odm->BoardType & ODM_BOARD_EXT_LNA)
{
rx_pwr_all -= pDM_Odm->ExtLNAGain;
}
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
}
else
{
switch(LNA_idx)
{
case 7:
if(VGA_idx <= 27)
rx_pwr_all = -100 + 2*(27-VGA_idx); //VGA_idx = 27~2
else
rx_pwr_all = -100;
break;
case 6:
rx_pwr_all = -48 + 2*(2-VGA_idx); //VGA_idx = 2~0
break;
case 5:
rx_pwr_all = -42 + 2*(7-VGA_idx); //VGA_idx = 7~5
break;
case 4:
rx_pwr_all = -36 + 2*(7-VGA_idx); //VGA_idx = 7~4
break;
case 3:
//rx_pwr_all = -28 + 2*(7-VGA_idx); //VGA_idx = 7~0
rx_pwr_all = -24 + 2*(7-VGA_idx); //VGA_idx = 7~0
break;
case 2:
if(cck_highpwr)
rx_pwr_all = -12 + 2*(5-VGA_idx); //VGA_idx = 5~0
else
rx_pwr_all = -6+ 2*(5-VGA_idx);
break;
case 1:
rx_pwr_all = 8-2*VGA_idx;
break;
case 0:
rx_pwr_all = 14-2*VGA_idx;
break;
default:
//DbgPrint("CCK Exception default\n");
break;
}
rx_pwr_all += 8;
//2012.10.08 LukeLee: Modify for 92E CCK RSSI
if(pDM_Odm->SupportICType == ODM_RTL8192E)
rx_pwr_all += 8;
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
if(cck_highpwr == FALSE)
{
if(PWDB_ALL >= 80)
PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;
else if((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
PWDB_ALL += 3;
if(PWDB_ALL>100)
PWDB_ALL = 100;
}
}
}
else if(pDM_Odm->SupportICType & (ODM_RTL8723B))
{
#if (RTL8723B_SUPPORT == 1)
rx_pwr_all = odm_CCKRSSI_8723B(LNA_idx,VGA_idx);
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
if(PWDB_ALL>100)
PWDB_ALL = 100;
#endif
} else if (pDM_Odm->SupportICType & (ODM_RTL8188F)) {
#if (RTL8188F_SUPPORT == 1)
rx_pwr_all = odm_CCKRSSI_8188F(LNA_idx, VGA_idx);
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
if (PWDB_ALL > 100)
PWDB_ALL = 100;
#endif
}
}
else
{
if(!cck_highpwr)
{
report =( cck_agc_rpt & 0xc0 )>>6;
switch(report)
{
// 03312009 modified by cosa
// Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion
// Note: different RF with the different RNA gain.
case 0x3:
rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
break;
case 0x2:
rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
break;
case 0x1:
rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
break;
case 0x0:
rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
break;
}
}
else
{
//report = pDrvInfo->cfosho[0] & 0x60;
//report = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a& 0x60;
report = (cck_agc_rpt & 0x60)>>5;
switch(report)
{
case 0x3:
rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f)<<1) ;
break;
case 0x2:
rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f)<<1);
break;
case 0x1:
rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f)<<1) ;
break;
case 0x0:
rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f)<<1) ;
break;
}
}
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
//Modification for ext-LNA board
if(pDM_Odm->BoardType & (ODM_BOARD_EXT_LNA | ODM_BOARD_EXT_PA))
{
if((cck_agc_rpt>>7) == 0){
PWDB_ALL = (PWDB_ALL>94)?100:(PWDB_ALL +6);
}
else
{
if(PWDB_ALL > 38)
PWDB_ALL -= 16;
else
PWDB_ALL = (PWDB_ALL<=16)?(PWDB_ALL>>2):(PWDB_ALL -12);
}
//CCK modification
if(PWDB_ALL > 25 && PWDB_ALL <= 60)
PWDB_ALL += 6;
//else if (PWDB_ALL <= 25)
// PWDB_ALL += 8;
}
else//Modification for int-LNA board
{
if(PWDB_ALL > 99)
PWDB_ALL -= 8;
else if(PWDB_ALL > 50 && PWDB_ALL <= 68)
PWDB_ALL += 4;
}
}
pDM_Odm->cck_lna_idx = LNA_idx;
pDM_Odm->cck_vga_idx = VGA_idx;
pPhyInfo->RxPWDBAll = PWDB_ALL;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;
pPhyInfo->RecvSignalPower = rx_pwr_all;
#endif
//
// (3) Get Signal Quality (EVM)
//
//if(pPktinfo->bPacketMatchBSSID)
{
u1Byte SQ,SQ_rpt;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
if((pDM_Odm->SupportPlatform == ODM_WIN) &&
(pDM_Odm->PatchID==RT_CID_819x_Lenovo)){
SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(pDM_Odm,isCCKrate,PWDB_ALL,0,0);
}else if((pDM_Odm->SupportPlatform == ODM_WIN) &&
(pDM_Odm->PatchID==RT_CID_819x_Acer))
{
SQ = odm_SQ_process_patch_RT_CID_819x_Acer(pDM_Odm,isCCKrate,PWDB_ALL,0,0);
}else
#endif
if(pPhyInfo->RxPWDBAll > 40 && !pDM_Odm->bInHctTest){
SQ = 100;
}
else{
SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
if(SQ_rpt > 64)
SQ = 0;
else if (SQ_rpt < 20)
SQ = 100;
else
SQ = ((64-SQ_rpt) * 100) / 44;
}
//DbgPrint("cck SQ = %d\n", SQ);
pPhyInfo->SignalQuality = SQ;
pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ;
pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;
}
for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) {
if (i == 0)
pPhyInfo->RxMIMOSignalStrength[0] = PWDB_ALL;
else
pPhyInfo->RxMIMOSignalStrength[1] = 0;
}
}
else //2 is OFDM rate
{
pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
//
// (1)Get RSSI for HT rate
//
for(i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++)
{
// 2008/01/30 MH we will judge RF RX path now.
if (pDM_Odm->RFPathRxEnable & BIT(i))
rf_rx_num++;
//else
//continue;
rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain& 0x3F)*2) - 110;
pDM_Odm->ofdm_agc_idx[i] = (pPhyStaRpt->path_agc[i].gain & 0x3F);
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
pPhyInfo->RxPwr[i] = rx_pwr[i];
#endif
/* Translate DBM to percentage. */
RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);
total_rssi += RSSI;
//RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], RSSI));