Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Will this work on a Raspberry PI or arm64 architectures #15

Closed
acadadev opened this issue Jan 23, 2024 · 2 comments
Closed

Will this work on a Raspberry PI or arm64 architectures #15

acadadev opened this issue Jan 23, 2024 · 2 comments

Comments

@acadadev
Copy link

Hello,
Will this work on arm64 architectures like RPI?
Best Regards.
C.A.

@MengRao
Copy link
Owner

MengRao commented Jan 25, 2024

I'm not quite familiar with arm64 arch, but if it has any low-overhead timecounter function(in nanosecond precision) similar to rdtsc in x86, you can simply change TSCNS::rdtsc to use it and that's all you need to do. Note that the timecounter value need to be consistent across all the cpu cores.

@MengRao MengRao closed this as completed Feb 14, 2025
@ktprime
Copy link

ktprime commented Feb 14, 2025

  static inline int64_t rdtsc() {
#ifdef _MSC_VER
    return __rdtsc();
#elif defined(__i386__) || defined(__x86_64__) || defined(__amd64__)
    return __builtin_ia32_rdtsc();
#elif defined(__aarch64__)
    uint64_t cval;
    asm volatile("mrs %0, cntvct_el0" : "=r"(cval));
    return cval;
#else
    return rdsysns();
#endif
  }

seem works on arm64

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

3 participants