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trsm_kernel_RT.S
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/*********************************************************************/
/* Copyright 2009, 2010 The University of Texas at Austin. */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or */
/* without modification, are permitted provided that the following */
/* conditions are met: */
/* */
/* 1. Redistributions of source code must retain the above */
/* copyright notice, this list of conditions and the following */
/* disclaimer. */
/* */
/* 2. Redistributions in binary form must reproduce the above */
/* copyright notice, this list of conditions and the following */
/* disclaimer in the documentation and/or other materials */
/* provided with the distribution. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY OF TEXAS AT */
/* AUSTIN ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, */
/* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
/* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */
/* DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OF TEXAS AT */
/* AUSTIN OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */
/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */
/* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE */
/* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR */
/* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */
/* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */
/* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */
/* POSSIBILITY OF SUCH DAMAGE. */
/* */
/* The views and conclusions contained in the software and */
/* documentation are those of the authors and should not be */
/* interpreted as representing official policies, either expressed */
/* or implied, of The University of Texas at Austin. */
/*********************************************************************/
#define ASSEMBLER
#include "common.h"
#ifdef DOUBLE
#define PREFETCHSIZE (16 * 8)
#else
#define PREFETCHSIZE (32 * 4)
#endif
#ifndef LN
#define CPREFETCHSIZE 8
#else
#define CPREFETCHSIZE -8
#endif
#define CPREFETCH lfetch.excl.nt1
#define M r32
#define N r33
#define K r34
#define A r36
#define B r37
#define C r38
#define LDC r39
#define I r15
#define J r16
#define AOFFSET r17
#define BOFFSET r18
#define TEMP r19
#define L r20
#define C1 r21
#define C2 r22
#define C3 r23
#define C4 r24
#define C5 r25
#define C6 r26
#define C7 r27
#define C8 r28
#define C9 loc0
#define C10 loc1
#define C11 loc2
#define C12 loc3
#define C13 loc4
#define C14 loc5
#define C15 loc6
#define C16 loc7
#define PREA r8
#define PREB r9
#define PREC r10
#define SP r12
#define ARLC r29
#define PR r30
#define ARPFS r31
#define ALPHA f8
#define AORIG loc8
#define KK loc9
#define KK8 loc10
#define OFFSET loc11
#define AOFFSET2 loc12
#define BOFFSET2 loc13
PROLOGUE
.prologue
PROFCODE
{ .mmi
.save ar.pfs, ARPFS
alloc ARPFS = ar.pfs, 8, 16, 0, 0
adds r14 = 16, SP
mov ARLC = ar.lc
}
{ .mmi
adds r8 = -6 * 16, SP
adds r9 = -5 * 16, SP
adds SP = -6 * 16, SP
}
;;
{ .mmi
stf.spill [r8] = f16, 32
stf.spill [r9] = f17, 32
mov PR = pr
}
;;
{ .mmi
stf.spill [r8] = f18, 32
stf.spill [r9] = f19, 32
nop __LINE__
}
;;
{ .mmi
stf.spill [r8] = f20
stf.spill [r9] = f21
shladd LDC = LDC, BASE_SHIFT, r0
}
;;
.body
{ .mmi
ld8 OFFSET = [r14]
mov AOFFSET = A
}
;;
#ifdef LN
{ .mmi
setf.sig f32 = M
setf.sig f33 = K
shladd C = M, BASE_SHIFT, C
}
;;
{.mmf
nop __LINE__
nop __LINE__
xmpy.l f32 = f32, f33
}
;;
{ .mmi
getf.sig r2 = f32
;;
nop __LINE__
shladd A = r2, BASE_SHIFT, A
}
;;
#endif
#ifdef RN
sub KK = r0, OFFSET
#endif
#ifdef RT
{ .mmi
setf.sig f32 = N
setf.sig f33 = K
nop __LINE__
}
;;
{ .mmi
setf.sig f34 = LDC
nop __LINE__
nop __LINE__
}
;;
{ .mmf
nop __LINE__
nop __LINE__
xmpy.l f33 = f32, f33
}
{ .mmf
nop __LINE__
sub KK = N, OFFSET
xmpy.l f34 = f32, f34
}
;;
{ .mmi
getf.sig r2 = f33
getf.sig r3 = f34
}
;;
shladd B = r2, BASE_SHIFT, B
add C = r3, C
#endif
;;
.L130:
tbit.z p6, p0 = N, 0
(p6) br.cond.dpnt .L090
;;
#ifdef RT
{ .mmi
nop __LINE__
shl r2 = K, BASE_SHIFT
}
;;
{ .mmi
sub B = B, r2
sub C = C, LDC
nop __LINE__
}
#endif
;;
mov f64 = f0
mov f65 = f0
mov f66 = f0
mov f67 = f0
mov f68 = f0
mov f69 = f0
mov f70 = f0
mov f71 = f0
;;
{ .mfi
shr I = M, 3
}
{ .mfi
mov C1 = C // coffset1 = c + 0 * ldc
#ifdef LN
add KK = M, OFFSET
#elif defined LT
mov KK = OFFSET
#else
nop __LINE__
#endif
}
;;
{ .mmf
cmp.eq p6, p7 = 0, I
#if defined(LN) || defined(RT)
mov AORIG = A
#else
mov AOFFSET = A
#endif
}
;;
{ .mfi
#ifndef RT
add C = C, LDC // coffset += 8 * ldc
#else
nop __LINE__
#endif
#if defined(LT) || defined(RN)
mov L = KK
#else
sub L = K, KK
#endif
}{ .mfb
(p6) br.cond.dpnt .L140
}
;;
.align 16
.L132:
{ .mmi
cmp.ne p7, p0 = r0, L
adds BOFFSET = 0 * SIZE, B
shl r2 = K, 3 + BASE_SHIFT
}
;;
#if defined(LT) || defined(RN)
{ .mmi
(p7) LDFD f48 = [BOFFSET], 1 * SIZE
nop __LINE__
nop __LINE__
}
;;
#else
{ .mfi
shladd BOFFSET = KK, BASE_SHIFT, B
#ifdef LN
sub AORIG = AORIG, r2
#else
nop __LINE__
#endif
}
;;
{ .mfi
(p7) LDFD f48 = [BOFFSET], 1 * SIZE
shladd AOFFSET = r3, 3, AORIG
}
;;
#endif
(p7) LDFPD f32, f33 = [AOFFSET], 2 * SIZE
;;
{ .mmf
(p7) LDFPD f34, f35 = [AOFFSET], 2 * SIZE
}
;;
{ .mmf
(p7) LDFPD f36, f37 = [AOFFSET], 2 * SIZE
}
{ .mfi
cmp.eq p3, p0 = r0, r0
}
;;
{ .mmf
(p7) LDFPD f38, f39 = [AOFFSET], 2 * SIZE
}
{ .mfi
adds PREC = CPREFETCHSIZE * SIZE, C1
}
;;
{ .mmf
CPREFETCH [PREC]
}
{ .mfi
adds L = 1, L
}
;;
{ .mfi
adds PREA = (PREFETCHSIZE + 8) * SIZE, AOFFSET
}
;;
{ .mfi
adds PREB = (PREFETCHSIZE - 8) * SIZE, BOFFSET
}
;;
{ .mfi
tbit.z p12, p0 = L, 0
}
{ .mfi
shr L = L, 1
}
;;
{ .mfi
adds L = -1, L
}
;;
{ .mfi
mov ar.lc = L
}
;;
{ .mfb
cmp.eq p6, p0 = -1, L
(p6) br.cond.dpnt .L138
}
;;
.align 16
.L133:
{ .mfi
lfetch.nt1 [PREA], 16 * SIZE
FMA f64 = f32, f48, f64 // A1 * B1
cmp.ne p4, p5 = 0, L
}
{ .mfi
adds PREB = (PREFETCHSIZE + 0) * SIZE, BOFFSET
FMA f65 = f33, f48, f65 // A2 * B1
(p12) cmp.ne p3, p0 = 0, L
}
;;
{ .mfi
(p3) LDFPD f40, f41 = [AOFFSET], 2 * SIZE
FMA f66 = f34, f48, f66 // A3 * B1
adds C9 = 4 * SIZE, C1
}
{ .mmf
(p3) LDFD f56 = [BOFFSET], 1 * SIZE
nop __LINE__
FMA f67 = f35, f48, f67 // A4 * B1
}
;;
{ .mfb
(p3) LDFPD f42, f43 = [AOFFSET], 2 * SIZE
FMA f68 = f36, f48, f68 // A5 * B1
nop __LINE__
}
{ .mfb
nop __LINE__
FMA f69 = f37, f48, f69 // A6 * B1
nop __LINE__
}
;;
{ .mfb
(p3) LDFPD f44, f45 = [AOFFSET], 2 * SIZE
FMA f70 = f38, f48, f70 // A7 * B1
nop __LINE__
}
{ .mfb
nop __LINE__
FMA f71 = f39, f48, f71 // A8 * B1
nop __LINE__
}
;;
{ .mfb
(p3) LDFPD f46, f47 = [AOFFSET], 2 * SIZE
(p3) FMA f64 = f40, f56, f64 // A1 * B1
nop __LINE__
}
{ .mfb
nop __LINE__
(p3) FMA f65 = f41, f56, f65 // A2 * B1
nop __LINE__
}
;;
{ .mfb
(p4) LDFPD f32, f33 = [AOFFSET], 2 * SIZE
(p3) FMA f66 = f42, f56, f66 // A3 * B1
nop __LINE__
}
{ .mmf
(p4) LDFD f48 = [BOFFSET], 1 * SIZE
nop __LINE__
(p3) FMA f67 = f43, f56, f67 // A4 * B1
}
;;
{ .mfb
(p4) LDFPD f34, f35 = [AOFFSET], 2 * SIZE
(p3) FMA f68 = f44, f56, f68 // A5 * B1
nop __LINE__
}
{ .mfb
nop __LINE__
(p3) FMA f69 = f45, f56, f69 // A6 * B1
nop __LINE__
}
;;
{ .mfi
(p4) LDFPD f36, f37 = [AOFFSET], 2 * SIZE
(p3) FMA f70 = f46, f56, f70 // A7 * B1
adds L = -1, L
}
{ .mfb
nop __LINE__
(p3) FMA f71 = f47, f56, f71 // A8 * B1
nop __LINE__
}
;;
{ .mfb
(p4) LDFPD f38, f39 = [AOFFSET], 2 * SIZE
nop __LINE__
br.cloop.sptk.few .L133
}
;;
.L138:
#if defined(LN) || defined(RT)
#ifdef LN
adds r2 = -8, KK
#else
adds r2 = -1, KK
#endif
;;
shladd r2 = r2, BASE_SHIFT, r0
;;
shladd AOFFSET = r2, 3, AORIG
add BOFFSET = r2, B
;;
#endif
adds AOFFSET2 = 4 * SIZE, AOFFSET
adds BOFFSET2 = 4 * SIZE, BOFFSET
;;
#if defined(LN) || defined(LT)
LDFPD f32, f33 = [BOFFSET], 2 * SIZE
;;
LDFPD f34, f35 = [BOFFSET], 2 * SIZE
;;
LDFPD f36, f37 = [BOFFSET], 2 * SIZE
;;
LDFPD f38, f39 = [BOFFSET]
adds BOFFSET = -6 * SIZE, BOFFSET
;;
FSUB f64 = f32, f64
FSUB f65 = f33, f65
FSUB f66 = f34, f66
FSUB f67 = f35, f67
FSUB f68 = f36, f68
FSUB f69 = f37, f69
FSUB f70 = f38, f70
FSUB f71 = f39, f71
;;
#else
LDFPD f32, f33 = [AOFFSET], 2 * SIZE
;;
LDFPD f34, f35 = [AOFFSET], 2 * SIZE
;;
LDFPD f36, f37 = [AOFFSET], 2 * SIZE
;;
LDFPD f38, f39 = [AOFFSET]
adds AOFFSET = -6 * SIZE, AOFFSET
;;
FSUB f64 = f32, f64
FSUB f65 = f33, f65
FSUB f66 = f34, f66
FSUB f67 = f35, f67
FSUB f68 = f36, f68
FSUB f69 = f37, f69
FSUB f70 = f38, f70
FSUB f71 = f39, f71
;;
#endif
#ifdef LN
adds AOFFSET = 62 * SIZE, AOFFSET
;;
LDFPD f33, f32 = [AOFFSET]
adds AOFFSET = - 2 * SIZE, AOFFSET
;;
LDFPD f35, f34 = [AOFFSET]
adds AOFFSET = - 2 * SIZE, AOFFSET
;;
LDFPD f37, f36 = [AOFFSET]
adds AOFFSET = - 2 * SIZE, AOFFSET
;;
LDFPD f39, f38 = [AOFFSET]
adds AOFFSET = - 2 * SIZE, AOFFSET
;;
LDFD f40 = [AOFFSET], -2 * SIZE
;;
LDFPD f42, f41 = [AOFFSET]
adds AOFFSET = - 2 * SIZE, AOFFSET
;;
LDFPD f44, f43 = [AOFFSET]
adds AOFFSET = - 2 * SIZE, AOFFSET
;;
LDFPD f46, f45 = [AOFFSET]
adds AOFFSET = - 4 * SIZE, AOFFSET
;;
LDFPD f48, f47 = [AOFFSET]
adds AOFFSET = - 2 * SIZE, AOFFSET
;;
LDFPD f50, f49 = [AOFFSET]
adds AOFFSET = - 2 * SIZE, AOFFSET
;;
LDFPD f52, f51 = [AOFFSET]
adds AOFFSET = - 4 * SIZE, AOFFSET
;;
LDFD f53 = [AOFFSET], -2 * SIZE
;;
LDFPD f55, f54 = [AOFFSET]
adds AOFFSET = - 2 * SIZE, AOFFSET
;;
LDFPD f57, f56 = [AOFFSET]
adds AOFFSET = - 6 * SIZE, AOFFSET
;;
LDFPD f59, f58 = [AOFFSET]
adds AOFFSET = - 2 * SIZE, AOFFSET
;;
LDFPD f61, f60 = [AOFFSET]
adds AOFFSET = - 6 * SIZE, AOFFSET
;;
LDFD f16 = [AOFFSET], -2 * SIZE
;;
LDFPD f18, f17 = [AOFFSET]
adds AOFFSET = - 8 * SIZE, AOFFSET
;;
LDFPD f20, f19 = [AOFFSET]
adds AOFFSET = - 8 * SIZE, AOFFSET
;;
LDFD f21 = [AOFFSET]
;;
FMPY f71 = f71, f32
;;
FNMA f70 = f71, f33, f70
;;
FNMA f69 = f71, f34, f69
;;
FNMA f68 = f71, f35, f68
;;
FNMA f67 = f71, f36, f67
;;
FNMA f66 = f71, f37, f66
;;
FNMA f65 = f71, f38, f65
;;
FNMA f64 = f71, f39, f64
;;
FMPY f70 = f70, f40
;;
FNMA f69 = f70, f41, f69
;;
FNMA f68 = f70, f42, f68
;;
FNMA f67 = f70, f43, f67
;;
FNMA f66 = f70, f44, f66
;;
FNMA f65 = f70, f45, f65
;;
FNMA f64 = f70, f46, f64
;;
FMPY f69 = f69, f47
;;
FNMA f68 = f69, f48, f68
;;
FNMA f67 = f69, f49, f67
;;
FNMA f66 = f69, f50, f66
;;
FNMA f65 = f69, f51, f65
;;
FNMA f64 = f69, f52, f64
;;
FMPY f68 = f68, f53
;;
FNMA f67 = f68, f54, f67
;;
FNMA f66 = f68, f55, f66
;;
FNMA f65 = f68, f56, f65
;;
FNMA f64 = f68, f57, f64
;;
FMPY f67 = f67, f58
;;
FNMA f66 = f67, f59, f66
;;
FNMA f65 = f67, f60, f65
;;
FNMA f64 = f67, f61, f64
;;
FMPY f66 = f66, f16
;;
FNMA f65 = f66, f17, f65
;;
FNMA f64 = f66, f18, f64
;;
FMPY f65 = f65, f19
;;
FNMA f64 = f65, f20, f64
;;
FMPY f64 = f64, f21
;;
STFD [BOFFSET] = f64, SIZE
STFD [BOFFSET2] = f68, SIZE
;;
STFD [BOFFSET] = f65, SIZE
STFD [BOFFSET2] = f69, SIZE
;;
STFD [BOFFSET] = f66, SIZE
STFD [BOFFSET2] = f70, SIZE
;;
STFD [BOFFSET] = f67, - 3 * SIZE
STFD [BOFFSET2] = f71, - 3 * SIZE
;;
adds C1 = -8 * SIZE, C1
;;
#endif
#ifdef LT
LDFPD f32, f33 = [AOFFSET], 2 * SIZE
;;
LDFPD f34, f35 = [AOFFSET], 2 * SIZE
;;
LDFPD f36, f37 = [AOFFSET], 2 * SIZE
;;
LDFPD f38, f39 = [AOFFSET]
adds AOFFSET = 3 * SIZE, AOFFSET
;;
LDFD f40 = [AOFFSET], 1 * SIZE
;;
LDFPD f41, f42 = [AOFFSET], 2 * SIZE
;;
LDFPD f43, f44 = [AOFFSET], 2 * SIZE
;;
LDFPD f45, f46 = [AOFFSET]
adds AOFFSET = 4 * SIZE, AOFFSET
;;
LDFPD f47, f48 = [AOFFSET], 2 * SIZE
;;
LDFPD f49, f50 = [AOFFSET], 2 * SIZE
;;
LDFPD f51, f52 = [AOFFSET]
adds AOFFSET = 5 * SIZE, AOFFSET
;;
LDFD f53 = [AOFFSET], 1 * SIZE
;;
LDFPD f54, f55 = [AOFFSET], 2 * SIZE
;;
LDFPD f56, f57 = [AOFFSET]
adds AOFFSET = 6 * SIZE, AOFFSET
;;
LDFPD f58, f59 = [AOFFSET], 2 * SIZE
;;
LDFPD f60, f61 = [AOFFSET]
adds AOFFSET = 7 * SIZE, AOFFSET
;;
LDFD f16 = [AOFFSET], 1 * SIZE
;;
LDFPD f17, f18 = [AOFFSET]
adds AOFFSET = 8 * SIZE, AOFFSET
;;
LDFPD f19, f20 = [AOFFSET]
adds AOFFSET = 9 * SIZE, AOFFSET
;;
LDFD f21 = [AOFFSET]
adds AOFFSET = -63 * SIZE, AOFFSET
;;
FMPY f64 = f64, f32
;;
FNMA f65 = f64, f33, f65
;;
FNMA f66 = f64, f34, f66
;;
FNMA f67 = f64, f35, f67
;;
FNMA f68 = f64, f36, f68
;;
FNMA f69 = f64, f37, f69
;;
FNMA f70 = f64, f38, f70
;;
FNMA f71 = f64, f39, f71
;;
FMPY f65 = f65, f40
;;
FNMA f66 = f65, f41, f66
;;
FNMA f67 = f65, f42, f67
;;
FNMA f68 = f65, f43, f68
;;
FNMA f69 = f65, f44, f69
;;
FNMA f70 = f65, f45, f70
;;
FNMA f71 = f65, f46, f71
;;
FMPY f66 = f66, f47
;;
FNMA f67 = f66, f48, f67
;;
FNMA f68 = f66, f49, f68
;;
FNMA f69 = f66, f50, f69
;;
FNMA f70 = f66, f51, f70
;;
FNMA f71 = f66, f52, f71
;;
FMPY f67 = f67, f53
;;
FNMA f68 = f67, f54, f68
;;
FNMA f69 = f67, f55, f69
;;
FNMA f70 = f67, f56, f70
;;
FNMA f71 = f67, f57, f71
;;
FMPY f68 = f68, f58
;;
FNMA f69 = f68, f59, f69
;;
FNMA f70 = f68, f60, f70
;;
FNMA f71 = f68, f61, f71
;;
FMPY f69 = f69, f16
;;
FNMA f70 = f69, f17, f70
;;
FNMA f71 = f69, f18, f71
;;
FMPY f70 = f70, f19
;;
FNMA f71 = f70, f20, f71
;;
FMPY f71 = f71, f21
;;
STFD [BOFFSET] = f64, SIZE
STFD [BOFFSET2] = f68, SIZE
;;
STFD [BOFFSET] = f65, SIZE
STFD [BOFFSET2] = f69, SIZE
;;
STFD [BOFFSET] = f66, SIZE
STFD [BOFFSET2] = f70, SIZE
;;
STFD [BOFFSET] = f67, -3 * SIZE
STFD [BOFFSET2] = f71, -3 * SIZE
;;
adds C9 = 4 * SIZE, C1
;;
#endif
#ifdef RN
LDFD f32 = [BOFFSET]
;;
FMPY f64 = f64, f32
FMPY f68 = f68, f32
FMPY f65 = f65, f32
FMPY f69 = f69, f32
FMPY f66 = f66, f32
FMPY f70 = f70, f32
FMPY f67 = f67, f32
FMPY f71 = f71, f32
;;
STFD [AOFFSET] = f64, SIZE
STFD [AOFFSET2] = f68, SIZE
;;
STFD [AOFFSET] = f65, SIZE
STFD [AOFFSET2] = f69, SIZE
;;
STFD [AOFFSET] = f66, SIZE
STFD [AOFFSET2] = f70, SIZE
;;
STFD [AOFFSET] = f67, -3 * SIZE
STFD [AOFFSET2] = f71, -3 * SIZE
;;
#endif
#ifdef RT
LDFD f32 = [BOFFSET]
;;
FMPY f64 = f64, f32
FMPY f68 = f68, f32
FMPY f65 = f65, f32
FMPY f69 = f69, f32
FMPY f66 = f66, f32
FMPY f70 = f70, f32
FMPY f67 = f67, f32
FMPY f71 = f71, f32
;;
STFD [AOFFSET] = f64, SIZE
STFD [AOFFSET2] = f68, SIZE
;;
STFD [AOFFSET] = f65, SIZE
STFD [AOFFSET2] = f69, SIZE
;;
STFD [AOFFSET] = f66, SIZE
STFD [AOFFSET2] = f70, SIZE
;;
STFD [AOFFSET] = f67, -3 * SIZE
STFD [AOFFSET2] = f71, -3 * SIZE
;;
#endif
adds C9 = 4 * SIZE, C1
;;
{ .mmf
STFD [C1 ] = f64, SIZE
STFD [C9 ] = f68, SIZE
mov f64 = f0
}
;;
{ .mmi
STFD [C1 ] = f65, SIZE
STFD [C9 ] = f69, SIZE
}
;;
{ .mmi
STFD [C1 ] = f66, SIZE
STFD [C9 ] = f70, SIZE
}
;;
{ .mmi
#ifndef LN
STFD [C1 ] = f67, 5 * SIZE
#else
STFD [C1 ] = f67, - 3 * SIZE
#endif
STFD [C9 ] = f71
}
;;
{ .mmf
cmp.ne p6, p0 = 1, I
}
;;
adds I = -1, I
;;
{ .mmi
shladd r2 = K, BASE_SHIFT, r0
}
;;
{ .mmi
sub L = K, KK
}
;;
{ .mmi
#ifdef RT
shladd AORIG = r2, 3, AORIG
#else
nop __LINE__
#endif
}
;;
{ .mmi
#if defined(LT) || defined(RN)
shladd L = L, BASE_SHIFT, r0
#else
nop __LINE__
#endif
}
;;
;;
{ .mmi
#if defined(LT) || defined(RN)
shladd AOFFSET = L, 3, AOFFSET
#else
nop __LINE__
#endif
}
;;
{ .mmi
#if defined(LT) || defined(RN)
add BOFFSET = L, BOFFSET
#else
nop __LINE__
#endif
}
;;
{ .mmi
#ifdef LT
adds KK = 8, KK
#elif defined LN
adds KK = -8, KK
#else
nop __LINE__
#endif
}
;;
{ .mmi
#if defined(LT) || defined(RN)
mov L = KK
#else
sub L = K, KK
#endif
}
;;
mov f64 = f0
mov f65 = f0
mov f66 = f0
mov f67 = f0
mov f68 = f0
mov f69 = f0
mov f70 = f0
mov f71 = f0
(p6) br.cond.dptk .L132
.align 8
.L140:
tbit.z p6, p7 = M, 2
(p6) br.cond.dptk .L150
;;
{ .mib
#if defined(LT) || defined(RN)
mov L = KK
#else
sub L = K, KK
#endif
}
;;
{ .mmi
cmp.ne p7, p0 = r0, L
adds BOFFSET = 0 * SIZE, B
shl r2 = K, 2 + BASE_SHIFT
}
;;
#if defined(LT) || defined(RN)
{ .mmf
(p7) LDFD f48 = [BOFFSET], 1 * SIZE
mov f65 = f0
}
;;
#else
{ .mfi
shladd BOFFSET = KK, BASE_SHIFT, B
#ifdef LN
sub AORIG = AORIG, r2
#else
nop __LINE__
#endif
}
;;
{ .mfi
(p7) LDFD f48 = [BOFFSET], 1 * SIZE
shladd AOFFSET = r3, 2, AORIG
}
;;
#endif
{ .mfi
adds L = 1, L