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Commits on Oct 10, 2013

• Fix msbuild integration install script.

  Show description for 6a24c7d
  zmodem

  committed
  6a24c7d

• R600/SI: Implement SIInstrInfo::verifyInstruction() for VOP*

  Show description for 47fbbc2
  tstellarAMD

  committed
  47fbbc2

• R600/SI: Use -verify-machineinstrs for most tests

  Show description for 3986785
  tstellarAMD

  committed
  3986785

• R600/SI: Define a separate MIMG instruction for each possible output value type

  Show description for 0f9eaaa
  tstellarAMD

  committed
  0f9eaaa

• R600/SI: Mark the EXEC register as reserved

  Show description for 219e788
  tstellarAMD

  committed
  219e788

• R600: Use StructurizeCFGPass for non SI targets

  Show description for de28bda
  tstellarAMD

  committed
  de28bda

• Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).

  Show description for 6a5a667
  

  Hao Liu

  authored and

  Hao Liu

  committed
  6a5a667

• Revert "Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). Including following 14 instructions: 4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/…

  Show description for 812ddcc
  espindola

  committed
  812ddcc

• Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).

  Show description for d622bef
  

  Hao Liu

  authored and

  Hao Liu

  committed
  d622bef

• ARM: Put isV8EligibleForIT into the llvm namespace. While there make it inline.

  Show description for 8ccf2b3
  d0k

  committed
  8ccf2b3

• Disable function padding to get this test to pass on atom.

  Show description for 58e3e10
  d0k

  committed
  58e3e10

• ARM: correct liveness flags during ARMLoadStoreOpt

  Show description for acd79ce
  TNorthover

  committed
  acd79ce

• Allow non-AVX form of pmovmskb to take a GR64 operand.

  Show description for 15de63c
  topperc

  committed
  15de63c

• Remove duplicate instructions.

  Show description for 369cc50
  topperc

  committed
  369cc50

• Fix so CRC32r64r8 isn't accidentally filtered from the disassembler tables.

  Show description for be5c1fd
  topperc

  committed
  be5c1fd

Commits on Oct 9, 2013

• [mips] Do not generate INS/EXT nodes if target does not have support for

  Show description for 25dafa3
  ahatanak

  committed
  25dafa3

• Revert "llvm-c: Make target initializer functions external functions in lib."

  Show description for 6bba6bb
  rui314

  committed
  6bba6bb

• Debug Info: In DIBuilder, the context and type fields of template_type and

  Show description for b4d9c11
  manman-ren

  committed
  b4d9c11

• llvm-c: Make target initializer functions external functions in lib.

  Show description for 9360e64
  wanders

  committed
  9360e64

• Debug Info: In DIBuilder, the context field of a forward decl is updated

  Show description for 5e5d494
  manman-ren

  committed
  5e5d494

• Add missing releases.

  Show description for bf15f19
  isanbard

  committed
  bf15f19

• Flip the ownership of MCStreamer and MCTargetStreamer.

  Show description for 3353c59
  d0k

  committed
  3353c59

• Fix a bug in Dead Argument Elimination.

  Show description for e040909
  

  Shuxin Yang

  committed
  e040909

• Add a GlobalAlias::isValidLinkage to reduce code duplication.

  Show description for 1a525e8
  espindola

  committed
  1a525e8

• [Sparc] Disable tail call optimization for sparc64.

  Show description for 3b73dea
  vegovin

  committed
  3b73dea

• Test commit. Remove whitespace from otherwise empty lines.

  Show description for 0568ba6
  gregbedwell

  committed
  0568ba6

• AVX-512: Added VRCP28 and VRSQRT28 instructions and intrinsics.

  Show description for 50dc2ad
  

  Elena Demikhovsky

  committed
  50dc2ad

• AArch64: enable MISched by default.

  Show description for d29bae8
  TNorthover

  committed
  d29bae8

• AArch64: migrate ADRP relaxation test to be llvm-mc only.

  Show description for ccb06ae
  TNorthover

  committed
  ccb06ae

• More x86 disassembler filtering cleanup.

  Show description for 5747f94
  topperc

  committed
  5747f94

• Add missing HasAVX512 predicate.

  Show description for 036c6e8
  atrick

  committed
  036c6e8

• Remove some old filters from the x86 disassembler table builder.

  Show description for 10c7925
  topperc

  committed
  10c7925

• Replace a couple instructions with patterns referring to other instructions with same encoding and operands. Mark a couple other instructions as CodeGenOnly since we have FR and VR instructions and…

  Show description for 0c73c42
  topperc

  committed
  0c73c42

• Use AVX512PIi8 for the alt forms of vcmp instructions. This adds the TB prefix and keeps the mnemonic from starting with an extra 'v'

  Show description for 28ffa8a
  topperc

  committed
  28ffa8a

• Mark some instructions as CodeGenOnly since they aren't needed by the assembler or disassembler. Disassembler already filtered them, but asm parser still had them in its tables.

  Show description for 442b23a
  topperc

  committed
  442b23a

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