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Commits on May 2, 2018

• X86: change v64i8 sar by 7

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• X86: combine AND+OR to VPTERNLOG

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• X86: detect AVG (alternative pattern)

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• X86: combine inversion of VPTERNLOG

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• X86: detect patterns for saturation arithmetic

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• X86: LowerShift: new algorithm for vector-vector shifts

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• Compile LLVM via appveyor and release via GitHub releases

  

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Commits on Apr 17, 2018

• Merging r329761:

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Commits on Apr 14, 2018

• Merging r322373:

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Commits on Apr 13, 2018

• Merging r329852:

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Commits on Apr 11, 2018

• Merging r329359 and r329363:

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• Merging r326521:

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• Add missing test file from r329855

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• Merging r326404:

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• Merging r325653 with test fixups:

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• Backport of rL326666 and rL326668 for PR36607 and PR36608.

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Commits on Apr 10, 2018

• Merging r328755:

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• Merging r326769 and r326780:

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• Merging r328748:

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• Merging r329588:

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Commits on Apr 9, 2018

• Merging r327651:

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• Merging r326376:

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• Merging r322319:

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• Merging r326535:

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Commits on Apr 7, 2018

• Merging r328341:

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• Merging r327761:

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• Merging r327135:

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• Merging r326843:

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• Merging r326840:

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• Bump version to 6.0.1

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Commits on Mar 2, 2018

• ReleaseNotes: move the retpoline bullet higher

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• Add some minimal release notes for retpoline support.

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Commits on Mar 1, 2018

• Merging r326393:

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Commits on Feb 27, 2018

• ReleaseNotes: tidy up

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• Sphinx: fix 'Inline emphasis start-string without end-string'

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