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10 stars written in SystemVerilog
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RSD: RISC-V Out-of-Order Superscalar Processor

SystemVerilog 1,036 101 Updated Dec 21, 2024

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

SystemVerilog 1,006 432 Updated Jul 19, 2024

VeeR EH1 core

SystemVerilog 844 223 Updated May 29, 2023

Common SystemVerilog components

SystemVerilog 567 153 Updated Feb 4, 2025

An FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V SoC,包含一个RV32I CPU、一个简单可扩展的总线、一些外设。

SystemVerilog 373 76 Updated Sep 14, 2023
SystemVerilog 224 58 Updated Dec 22, 2022

SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.

SystemVerilog 204 43 Updated Aug 25, 2020

Vector processor for RISC-V vector ISA

SystemVerilog 113 25 Updated Oct 19, 2020

DUTH RISC-V Superscalar Microprocessor

SystemVerilog 29 10 Updated Oct 23, 2024

DUTH RISC-V Microprocessor

SystemVerilog 19 7 Updated Dec 4, 2024