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display.stx
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Release 14.2 - xst P.28xd (nt)
Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved.
--> Parameter TMPDIR set to E:/test/piano15NN/xst/projnav.tmp
Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.25 secs
--> Parameter xsthdpdir set to E:/test/piano15NN/xst
Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.25 secs
--> WARNING:Xst:3164 - Option "-debug" found multiple times in the command line. Only the first occurence is considered.
=========================================================================
* HDL Compilation *
=========================================================================
Compiling verilog file "display.v" in library work
Module <display> compiled
No errors in compilation
Analysis of file <"display.prj"> succeeded.
Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.28 secs
-->
Total memory usage is 168084 kilobytes
Number of errors : 0 ( 0 filtered)
Number of warnings : 1 ( 0 filtered)
Number of infos : 0 ( 0 filtered)