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Xidian Universtiy
- Beijing, China
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20:05
(UTC +08:00) - [email protected]
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Open-source high-performance RISC-V processor
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
GPGPU processor supporting RISCV-V extension, developed with Chisel HDL