rwroute
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#------------------------------------------------------------------------------------------------------------ This directory contains the scripts to produce data to be used with RWRoute for 1) dump_all_dsp_delay.tcl to list logic delays of each DSP in a placed design. 2) find_clock_tree_template.tcl to produce a clock tree and its skews over the given list of clock regions. 3) find_clock_route_template.tcl to find route templates and their delays in a clock network, needed to route a high fanout signal inside the clock network. All data listed above can be reused in other designs as well. It is our intend to accumulate the data so that we have a complete set of data. To accomplish that, we need the community to submit their data obtained from these scripts. However, we do not have a mechanism to receive and combine them at this time. #------------------------------------------------------------------------------------------------------------ Directory structure: ./dump_all_dsp_delay.tcl ./find_clock_tree_template.tcl ./find_clock_route_template.tcl ./helper_proc/ A directory containing helper proc for the three Tcl files above clock_modeling_util.tcl ./test_data/ A directory containing data for testing each of the three Tcl files. The data include input and output for the default input. There is one subdirectory for each Tcl file. dump_all_dsp_delay/ find_clock_tree_template/ find_clock_route_template/ #------------------------------------------------------------------------------------------------------------ Prerequisite: export RAPIDWRIGHT_PATH=<Directory where src/ is> export CLASSPATH=$RAPIDWRIGHT_PATH/bin:$(echo $RAPIDWRIGHT_PATH/jars/*.jar | tr ' ' ':') javac src/com/xilinx/rapidwright/util/rwroute/GetDelayFromSourceToSinkINT.java javac src/com/xilinx/rapidwright/util/rwroute/ReadSetBufferTap.java #------------------------------------------------------------------------------------------------------------ To run: 1) At shell prompt: cd $RAPIDWRIGHT_PATH/tcl/rwroute mkdir run cd run vivado & 2) At Vivado prompt: To dump all dsp delay open_checkpoint <placed dcp> source ../dump_all_dsp_delay.tcl -notrace dump_all_dsp_delay To build clock tree template source ../find_clock_tree_template.tcl -notrace # after modifying the inputs in find_clock_tree_template.tcl find_clock_tree_template $pblocks $pb2int_tiles $pb_bufg clock_tree.txt To build clock routes and delays to route high fanout signal source ../find_clock_route_template.tcl -notrace # after modifying the inputs in find_clock_route_template.tcl find_clock_route_template $bufg_site $src_int_tiles $dst_int_tiles clock_route.txt