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all: Add 'U' suffix when using unsigned variables
Add a 'U' suffix to values when computing and comparing against unsigned variables. Signed-off-by: Patrik Flykt <[email protected]>
1 parent caebf20 commit 24d7143

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559 files changed

+2331
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lines changed

‎arch/arc/core/cache.c

+3-3
Original file line numberDiff line numberDiff line change
@@ -91,7 +91,7 @@ static void dcache_flush_mlines(u32_t start_addr, u32_t size)
9191
u32_t end_addr;
9292
unsigned int key;
9393

94-
if (!dcache_available() || (size == 0)) {
94+
if (!dcache_available() || (size == 0U)) {
9595
return;
9696
}
9797

@@ -150,9 +150,9 @@ static void init_dcache_line_size(void)
150150
u32_t val;
151151

152152
val = z_arc_v2_aux_reg_read(_ARC_V2_D_CACHE_BUILD);
153-
__ASSERT((val&0xff) != 0, "d-cache is not present");
153+
__ASSERT((val&0xff) != 0U, "d-cache is not present");
154154
val = ((val>>16) & 0xf) + 1;
155-
val *= 16;
155+
val *= 16U;
156156
sys_cache_line_size = (size_t) val;
157157
}
158158
#endif

‎arch/arc/core/fault.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -77,7 +77,7 @@ void _Fault(NANO_ESF *esf)
7777
* stack check and mpu violation can come out together, then
7878
* parameter = 0x2 | [0x4 | 0x8 | 0x1]
7979
*/
80-
if (vector == 6 && parameter & 0x2) {
80+
if (vector == 6U && parameter & 0x2) {
8181
z_NanoFatalErrorHandler(_NANO_ERR_STACK_CHK_FAIL, esf);
8282
return;
8383
}

‎arch/arc/core/mpu/arc_mpu_v2_internal.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -159,7 +159,7 @@ static inline int _mpu_configure(u8_t type, u32_t base, u32_t size)
159159

160160
LOG_DBG("Region info: 0x%x 0x%x", base, size);
161161

162-
if (region_attr == 0 || region_index < 0) {
162+
if (region_attr == 0U || region_index < 0) {
163163
return -EINVAL;
164164
}
165165

‎arch/arc/core/mpu/arc_mpu_v3_internal.h

+3-3
Original file line numberDiff line numberDiff line change
@@ -320,7 +320,7 @@ static void _mpu_reset_dynamic_regions(void)
320320
_region_init(i, 0, 0, 0);
321321
}
322322

323-
for (i = 0; i < dynamic_regions_num; i++) {
323+
for (i = 0U; i < dynamic_regions_num; i++) {
324324
_region_init(
325325
dyn_reg_info[i].index,
326326
dyn_reg_info[i].base,
@@ -389,7 +389,7 @@ void arc_core_mpu_configure_thread(struct k_thread *thread)
389389
_mpu_reset_dynamic_regions();
390390
#if defined(CONFIG_MPU_STACK_GUARD)
391391
#if defined(CONFIG_USERSPACE)
392-
if ((thread->base.user_options & K_USER) != 0) {
392+
if ((thread->base.user_options & K_USER) != 0U) {
393393
/* the areas before and after the user stack of thread is
394394
* kernel only. These area can be used as stack guard.
395395
* -----------------------
@@ -448,7 +448,7 @@ void arc_core_mpu_configure_thread(struct k_thread *thread)
448448
num_partitions = mem_domain->num_partitions;
449449
pparts = mem_domain->partitions;
450450
} else {
451-
num_partitions = 0;
451+
num_partitions = 0U;
452452
pparts = NULL;
453453
}
454454

‎arch/arc/include/v2/cache.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@ static ALWAYS_INLINE void _icache_setup(void)
4444

4545
val = z_arc_v2_aux_reg_read(_ARC_V2_I_CACHE_BUILD);
4646
val &= 0xff;
47-
if (val != 0) { /* is i-cache present? */
47+
if (val != 0U) { /* is i-cache present? */
4848
/* configure i-cache */
4949
z_arc_v2_aux_reg_write(_ARC_V2_IC_CTRL, icache_config);
5050
}

‎arch/arm/core/cortex_m/mpu/arm_mpu_v7_internal.h

+4-4
Original file line numberDiff line numberDiff line change
@@ -52,11 +52,11 @@ static int _mpu_partition_is_valid(const struct k_mem_partition *part)
5252
* partition must align with size.
5353
*/
5454
int partition_is_valid =
55-
((part->size & (part->size - 1)) == 0)
55+
((part->size & (part->size - 1)) == 0U)
5656
&&
5757
(part->size >= CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE)
5858
&&
59-
((part->start & (part->size - 1)) == 0);
59+
((part->start & (part->size - 1)) == 0U);
6060

6161
return partition_is_valid;
6262
}
@@ -72,7 +72,7 @@ static int _mpu_partition_is_valid(const struct k_mem_partition *part)
7272
static inline u32_t _size_to_mpu_rasr_size(u32_t size)
7373
{
7474
/* The minimal supported region size is 32 bytes */
75-
if (size <= 32) {
75+
if (size <= 32U) {
7676
return REGION_32B;
7777
}
7878

@@ -264,7 +264,7 @@ static int _mpu_configure_regions(const struct k_mem_partition
264264
int reg_index = start_reg_index;
265265

266266
for (i = 0; i < regions_num; i++) {
267-
if (regions[i]->size == 0) {
267+
if (regions[i]->size == 0U) {
268268
continue;
269269
}
270270
/* Non-empty region. */

‎arch/arm/core/cortex_m/mpu/arm_mpu_v8_internal.h

+3-3
Original file line numberDiff line numberDiff line change
@@ -101,7 +101,7 @@ static int _mpu_partition_is_valid(const struct k_mem_partition *part)
101101
== part->size)
102102
&&
103103
((part->start &
104-
(CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE - 1)) == 0);
104+
(CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE - 1)) == 0U);
105105

106106
return partition_is_valid;
107107
}
@@ -330,7 +330,7 @@ static int _mpu_configure_regions(const struct k_mem_partition
330330
int reg_index = start_reg_index;
331331

332332
for (i = 0; i < regions_num; i++) {
333-
if (regions[i]->size == 0) {
333+
if (regions[i]->size == 0U) {
334334
continue;
335335
}
336336
/* Non-empty region. */
@@ -493,7 +493,7 @@ static int _mpu_mark_areas_for_dynamic_regions(
493493
* which dynamic memory regions may be programmed at run-time.
494494
*/
495495
for (int i = 0; i < dyn_region_areas_num; i++) {
496-
if (dyn_region_areas[i].size == 0) {
496+
if (dyn_region_areas[i].size == 0U) {
497497
continue;
498498
}
499499
/* Non-empty area */

‎arch/arm/core/cortex_m/mpu/nxp_mpu.c

+4-4
Original file line numberDiff line numberDiff line change
@@ -54,14 +54,14 @@ static int _mpu_partition_is_valid(const struct k_mem_partition *part)
5454
* minimum MPU region size.
5555
*/
5656
int partition_is_valid =
57-
(part->size != 0)
57+
(part->size != 0U)
5858
&&
5959
((part->size &
6060
(~(CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE - 1)))
6161
== part->size)
6262
&&
6363
((part->start &
64-
(CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE - 1)) == 0);
64+
(CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE - 1)) == 0U);
6565

6666
return partition_is_valid;
6767
}
@@ -78,7 +78,7 @@ static void _region_init(const u32_t index,
7878
u32_t region_end = region_conf->end;
7979
u32_t region_attr = region_conf->attr.attr;
8080

81-
if (index == 0) {
81+
if (index == 0U) {
8282
/* The MPU does not allow writes from the core to affect the
8383
* RGD0 start or end addresses nor the permissions associated
8484
* with the debugger; it can only write the permission fields
@@ -241,7 +241,7 @@ static int _mpu_configure_regions(const struct k_mem_partition
241241
int reg_index = start_reg_index;
242242

243243
for (i = 0; i < regions_num; i++) {
244-
if (regions[i]->size == 0) {
244+
if (regions[i]->size == 0U) {
245245
continue;
246246
}
247247
/* Non-empty region. */

‎arch/arm/core/fault.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -389,7 +389,7 @@ static int _BusFault(NANO_ESF *esf, int fromHardFault)
389389

390390
if (sperr) {
391391
for (i = 0; i < SYSMPU_EAR_COUNT; i++, mask >>= 1) {
392-
if ((sperr & mask) == 0) {
392+
if ((sperr & mask) == 0U) {
393393
continue;
394394
}
395395
STORE_xFAR(edr, SYSMPU->SP[i].EDR);
@@ -796,7 +796,7 @@ void _Fault(NANO_ESF *esf, u32_t exc_return)
796796
/* Invalid EXC_RETURN value */
797797
goto _exit_fatal;
798798
}
799-
if ((exc_return & EXC_RETURN_EXCEPTION_SECURE_Secure) == 0) {
799+
if ((exc_return & EXC_RETURN_EXCEPTION_SECURE_Secure) == 0U) {
800800
/* Secure Firmware shall only handle Secure Exceptions.
801801
* This is a fatal error.
802802
*/

‎arch/arm/core/irq_offload.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@ void irq_offload(irq_offload_routine_t routine, void *parameter)
2929
unsigned int key;
3030

3131
__asm__ volatile("mrs %0, PRIMASK;" : "=r" (key) : : "memory");
32-
__ASSERT(key == 0, "irq_offload called with interrupts locked\n");
32+
__ASSERT(key == 0U, "irq_offload called with interrupts locked\n");
3333
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE && CONFIG_ASSERT */
3434

3535
k_sched_lock();

‎arch/arm/core/thread.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -58,7 +58,7 @@ void z_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
5858
char *pStackMem = K_THREAD_STACK_BUFFER(stack);
5959
char *stackEnd;
6060
/* Offset between the top of stack and the high end of stack area. */
61-
u32_t top_of_stack_offset = 0;
61+
u32_t top_of_stack_offset = 0U;
6262

6363
Z_ASSERT_VALID_PRIO(priority, pEntry);
6464

‎arch/arm/include/cortex_m/exc.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -63,7 +63,7 @@ static ALWAYS_INLINE bool _IsInIsr(void)
6363
/* On ARMv6-M there is no nested execution bit, so we check
6464
* exception 3, hard fault, to a detect a nested exception.
6565
*/
66-
|| (vector == 3)
66+
|| (vector == 3U)
6767
#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
6868
/* If not in thread mode, and if RETTOBASE bit in ICSR is 0,
6969
* then there are preempted active exceptions to execute.

‎arch/common/timing_info_bench.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -80,15 +80,15 @@ u64_t __common_var_swap_end_time;
8080

8181
void read_timer_start_of_swap(void)
8282
{
83-
if (__read_swap_end_time_value == 1) {
83+
if (__read_swap_end_time_value == 1U) {
8484
TIMING_INFO_PRE_READ();
8585
__start_swap_time = (u32_t) TIMING_INFO_OS_GET_TIME();
8686
}
8787
}
8888

8989
void read_timer_end_of_swap(void)
9090
{
91-
if (__read_swap_end_time_value == 1) {
91+
if (__read_swap_end_time_value == 1U) {
9292
TIMING_INFO_PRE_READ();
9393
__read_swap_end_time_value = 2U;
9494
__common_var_swap_end_time = (u64_t)TIMING_INFO_OS_GET_TIME();

‎arch/nios2/core/fatal.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -177,7 +177,7 @@ FUNC_NORETURN void _Fault(const NANO_ESF *esf)
177177
exc_reg = _nios2_creg_read(NIOS2_CR_EXCEPTION);
178178

179179
/* Bit 31 indicates potentially fatal ECC error */
180-
eccftl = (exc_reg & NIOS2_EXCEPTION_REG_ECCFTL_MASK) != 0;
180+
eccftl = (exc_reg & NIOS2_EXCEPTION_REG_ECCFTL_MASK) != 0U;
181181

182182
/* Bits 2-6 contain the cause code */
183183
cause = (exc_reg & NIOS2_EXCEPTION_REG_CAUSE_MASK)

‎arch/x86/core/cpuhalt.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -95,7 +95,7 @@ void k_cpu_atomic_idle(unsigned int key)
9595
"hlt\n\t");
9696

9797
/* restore interrupt lockout state before returning to caller */
98-
if ((key & 0x200U) == 0) {
98+
if ((key & 0x200U) == 0U) {
9999
z_int_latency_start();
100100
__asm__ volatile("cli");
101101
}

‎arch/x86/core/fatal.c

+8-8
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@ static bool check_stack_bounds(u32_t addr, size_t size, u16_t cs)
4747
/* We were servicing an interrupt */
4848
start = (u32_t)Z_ARCH_THREAD_STACK_BUFFER(_interrupt_stack);
4949
end = start + CONFIG_ISR_STACK_SIZE;
50-
} else if ((cs & 0x3U) != 0 ||
50+
} else if ((cs & 0x3U) != 0U ||
5151
(_current->base.user_options & K_USER) == 0) {
5252
/* Thread was in user mode, or is not a user mode thread.
5353
* The normal stack buffer is what we will check.
@@ -79,13 +79,13 @@ static void unwind_stack(u32_t base_ptr, u16_t cs)
7979
struct stack_frame *frame;
8080
int i;
8181

82-
if (base_ptr == 0) {
82+
if (base_ptr == 0U) {
8383
printk("NULL base ptr\n");
8484
return;
8585
}
8686

8787
for (i = 0; i < MAX_STACK_FRAMES; i++) {
88-
if (base_ptr % sizeof(base_ptr) != 0) {
88+
if (base_ptr % sizeof(base_ptr) != 0U) {
8989
printk("unaligned frame ptr\n");
9090
return;
9191
}
@@ -105,7 +105,7 @@ static void unwind_stack(u32_t base_ptr, u16_t cs)
105105
}
106106
#endif
107107

108-
if (frame->ret_addr == 0) {
108+
if (frame->ret_addr == 0U) {
109109
break;
110110
}
111111
#ifdef CONFIG_X86_IAMCU
@@ -372,9 +372,9 @@ static void dump_page_fault(NANO_ESF *esf)
372372
printk("***** CPU Page Fault (error code 0x%08x)\n", err);
373373

374374
printk("%s thread %s address 0x%08x\n",
375-
(err & US) != 0 ? "User" : "Supervisor",
376-
(err & ID) != 0 ? "executed" : ((err & WR) != 0 ? "wrote" :
377-
"read"), cr2);
375+
(err & US) != 0U ? "User" : "Supervisor",
376+
(err & ID) != 0U ? "executed" : ((err & WR) != 0U ? "wrote" :
377+
"read"), cr2);
378378

379379
#ifdef CONFIG_X86_MMU
380380
#ifdef CONFIG_X86_KPTI
@@ -507,7 +507,7 @@ static FUNC_NORETURN __used void _df_handler_top(void)
507507
_main_tss.ss = DATA_SEG;
508508
_main_tss.eip = (u32_t)_df_handler_bottom;
509509
_main_tss.cr3 = (u32_t)&z_x86_kernel_pdpt;
510-
_main_tss.eflags = 0;
510+
_main_tss.eflags = 0U;
511511

512512
/* NT bit is set in EFLAGS so we will task switch back to _main_tss
513513
* and run _df_handler_bottom

‎arch/x86/core/irq_manage.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -198,7 +198,7 @@ static unsigned int priority_to_free_vector(unsigned int requested_priority)
198198
z_interrupt_vectors_allocated[entry];
199199
fsb = find_lsb_set(search_set);
200200

201-
__ASSERT(fsb != 0, "No remaning vectors for priority level %d",
201+
__ASSERT(fsb != 0U, "No remaning vectors for priority level %d",
202202
requested_priority);
203203

204204
/*
@@ -314,7 +314,7 @@ int z_arch_irq_connect_dynamic(unsigned int irq, unsigned int priority,
314314
#else
315315
vector = priority_to_free_vector(priority);
316316
/* 0 indicates not used, vectors for interrupts start at 32 */
317-
__ASSERT(_irq_to_interrupt_vector[irq] == 0,
317+
__ASSERT(_irq_to_interrupt_vector[irq] == 0U,
318318
"IRQ %d already configured", irq);
319319
_irq_to_interrupt_vector[irq] = vector;
320320
#endif

‎arch/x86/core/spec_ctrl.c

+3-3
Original file line numberDiff line numberDiff line change
@@ -48,16 +48,16 @@ static int spec_ctrl_init(struct device *dev)
4848
u32_t cpuid7 = cpuid_extended_features();
4949

5050
#ifdef CONFIG_DISABLE_SSBD
51-
if ((cpuid7 & CPUID_SPEC_CTRL_SSBD) != 0) {
51+
if ((cpuid7 & CPUID_SPEC_CTRL_SSBD) != 0U) {
5252
enable_bits |= SPEC_CTRL_SSBD;
5353
}
5454
#endif
5555
#ifdef CONFIG_ENABLE_EXTENDED_IBRS
56-
if ((cpuid7 & CPUID_SPEC_CTRL_IBRS) != 0) {
56+
if ((cpuid7 & CPUID_SPEC_CTRL_IBRS) != 0U) {
5757
enable_bits |= SPEC_CTRL_IBRS;
5858
}
5959
#endif
60-
if (enable_bits != 0) {
60+
if (enable_bits != 0U) {
6161
u64_t cur = _x86_msr_read(IA32_SPEC_CTRL_MSR);
6262

6363
_x86_msr_write(IA32_SPEC_CTRL_MSR,

‎arch/x86/core/thread.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -72,7 +72,7 @@ void z_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
7272
_new_thread_init(thread, stack_buf, stack_size, priority, options);
7373

7474
#if CONFIG_X86_USERSPACE
75-
if ((options & K_USER) == 0) {
75+
if ((options & K_USER) == 0U) {
7676
/* Running in kernel mode, kernel stack region is also a guard
7777
* page */
7878
z_x86_mmu_set_flags(&z_x86_kernel_pdpt,
@@ -100,7 +100,7 @@ void z_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
100100
/* initial EFLAGS; only modify IF and IOPL bits */
101101
initial_frame->eflags = (EflagsGet() & ~EFLAGS_MASK) | EFLAGS_INITIAL;
102102
#ifdef CONFIG_X86_USERSPACE
103-
if ((options & K_USER) != 0) {
103+
if ((options & K_USER) != 0U) {
104104
#ifdef _THREAD_WRAPPER_REQUIRED
105105
initial_frame->edi = (u32_t)z_arch_user_mode_enter;
106106
initial_frame->thread_entry = _x86_thread_entry_wrapper;

‎arch/x86/core/x86_mmu.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -291,7 +291,7 @@ static inline void _x86_mem_domain_pages_update(struct k_mem_domain *mem_domain,
291291

292292
/* Get the partition info */
293293
partition = &mem_domain->partitions[partition_index];
294-
if (partition->size == 0) {
294+
if (partition->size == 0U) {
295295
continue;
296296
}
297297
partitions_count++;

‎arch/x86_64/core/demo-kernel.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -150,7 +150,7 @@ void _cpu_start(int cpu)
150150
* "timer" API
151151
*/
152152
xuk_set_isr(INT_APIC_LVT_TIMER, 10, handler_timer, 0);
153-
_apic.INIT_COUNT = 5000000;
153+
_apic.INIT_COUNT = 5000000U;
154154
test_timers();
155155

156156
if (cpu == 0) {

‎arch/x86_64/core/shared-page.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -73,7 +73,7 @@ static inline void *alloc_page(int clear)
7373
{
7474
int *p = (int *)(long)_shared.next_page;
7575

76-
_shared.next_page += 4096;
76+
_shared.next_page += 4096U;
7777

7878
for (int i = 0; clear && i < 1024; i++) {
7979
p[i] = 0;

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