drivers: stm32: do not enable the HSI48 locally

The HSI48 is enabled by clock control driver.
It is no more done by each driver that requires this clock
However when using rng or sdmmc or bluetooth/ipm or usb,
the HSI48 clock must be present in the DTS.
Add a warning for this particular check but keep the deprecated
HSI48 clock enable : keeping for legacy but to remove later.

Signed-off-by: Francois Ramu <[email protected]>

Author: FRASTM

drivers/bluetooth/hci/ipm_stm32wb.c

@@ -419,12 +419,16 @@ static void start_ble_rf(void)
 	LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSI);
 #endif
 
-	/* Set RNG on HSI48 */
+	/* HSI48 clock and CLK48 clock source are enabled using the device tree */
+#if !STM32_HSI48_ENABLED
+	/* Deprecated: enable HSI48 using device tree */
+#warning Bluetooth IPM requires HSI48 clock to be enabled using device tree
+	/* Keeping this sequence for legacy: */
 	LL_RCC_HSI48_Enable();
 	while (!LL_RCC_HSI48_IsReady()) {
 	}
 
-	LL_RCC_SetCLK48ClockSource(LL_RCC_CLK48_CLKSOURCE_HSI48);
+#endif /* !STM32_HSI48_ENABLED */
 }
 
 #ifdef CONFIG_BT_HCI_HOST

drivers/disk/sdmmc_stm32.c

@@ -154,13 +154,22 @@ static int stm32_sdmmc_clock_enable(struct stm32_sdmmc_priv *priv)
 
 #if defined(CONFIG_SOC_SERIES_STM32L5X) || \
 	defined(CONFIG_SOC_SERIES_STM32U5X)
-	/* By default the SDMMC clock source is set to 0 --> 48MHz, must be enabled */
+#if !STM32_HSI48_ENABLED
+	/* Deprecated: enable HSI48 using device tree */
+#warning USB device requires HSI48 clock to be enabled using device tree
+	/*
+	 * Keeping this sequence for legacy :
+	 * By default the SDMMC clock source is set to 0 --> 48MHz, must be enabled
+	 */
 	LL_RCC_HSI48_Enable();
 	while (!LL_RCC_HSI48_IsReady()) {
 	}
+#endif /* !STM32_HSI48_ENABLED */
 #endif /* CONFIG_SOC_SERIES_STM32L5X ||
 	* CONFIG_SOC_SERIES_STM32U5X
 	*/
+
+	/* HSI48 Clock is enabled through using the device tree */
 	clock = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE);
 
 	/* Enable the APB clock for stm32_sdmmc */

drivers/entropy/entropy_stm32.c

@@ -603,7 +603,11 @@ static int entropy_stm32_rng_init(const struct device *dev)
 	LL_RCC_SetRNGClockSource(LL_RCC_RNG_CLKSOURCE_PLL);
 #elif defined(RCC_CR2_HSI48ON) || defined(RCC_CR_HSI48ON) \
 	|| defined(RCC_CRRCR_HSI48ON)
+#if !STM32_HSI48_ENABLED
+	/* Deprecated: enable HSI48 using device tree */
+#warning RNG requires HSI48 clock to be enabled using device tree
 
+	/* Keeping this sequence for legacy: */
 #if CONFIG_SOC_SERIES_STM32L0X
 	/* We need SYSCFG to control VREFINT, so make sure it is clocked */
 	if (!LL_APB2_GRP1_IsEnabledClock(LL_APB2_GRP1_PERIPH_SYSCFG)) {
@@ -619,7 +623,12 @@ static int entropy_stm32_rng_init(const struct device *dev)
 	while (!LL_RCC_HSI48_IsReady()) {
 		/* Wait for HSI48 to become ready */
 	}
+#else /* !STM32_HSI48_ENABLED */
+	/* HSI48 is enabled by the DTS : lock the HSI48 clock for RNG use */
+	z_stm32_hsem_lock(CFG_HW_CLK48_CONFIG_SEMID, HSEM_LOCK_DEFAULT_RETRY);
+#endif /* !STM32_HSI48_ENABLED */
 
+	/* HSI48 Clock is enabled through the DTS: set as RNG clock source */
 #if defined(CONFIG_SOC_SERIES_STM32WBX)
 	LL_RCC_SetRNGClockSource(LL_RCC_RNG_CLKSOURCE_CLK48);
 	LL_RCC_SetCLK48ClockSource(LL_RCC_CLK48_CLKSOURCE_HSI48);

drivers/usb/device/usb_dc_stm32.c

@@ -207,7 +207,10 @@ static int usb_dc_stm32_clock_enable(void)
 	defined(CONFIG_SOC_SERIES_STM32H7X) || \
 	defined(CONFIG_SOC_SERIES_STM32L5X) || \
 	defined(CONFIG_SOC_SERIES_STM32U5X)
-
+#if !STM32_HSI48_ENABLED
+	/* Deprecated: enable HSI48 using device tree */
+#warning USB device requires HSI48 clock to be enabled using device tree
+#endif /* ! STM32_HSI48_ENABLED*/
 	/*
 	 * In STM32L0 series, HSI48 requires VREFINT and its buffer
 	 * with 48 MHz RC to be enabled.
@@ -226,6 +229,7 @@ static int usb_dc_stm32_clock_enable(void)
 
 	z_stm32_hsem_lock(CFG_HW_CLK48_CONFIG_SEMID, HSEM_LOCK_DEFAULT_RETRY);
 
+	/* Keeping this sequence for legacy: */
 	LL_RCC_HSI48_Enable();
 	while (!LL_RCC_HSI48_IsReady()) {
 		/* Wait for HSI48 to become ready */