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mt2063.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* Driver for mt2063 Micronas tuner
*
* Copyright (c) 2011 Mauro Carvalho Chehab
*
* This driver came from a driver originally written by:
* Henry Wang <[email protected]>
* Made publicly available by Terratec, at:
* http://linux.terratec.de/files/TERRATEC_H7/20110323_TERRATEC_H7_Linux.tar.gz
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/videodev2.h>
#include <linux/gcd.h>
#include "mt2063.h"
static unsigned int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Set Verbosity level");
#define dprintk(level, fmt, arg...) do { \
if (debug >= level) \
printk(KERN_DEBUG "mt2063 %s: " fmt, __func__, ## arg); \
} while (0)
/* positive error codes used internally */
/* Info: Unavoidable LO-related spur may be present in the output */
#define MT2063_SPUR_PRESENT_ERR (0x00800000)
/* Info: Mask of bits used for # of LO-related spurs that were avoided during tuning */
#define MT2063_SPUR_CNT_MASK (0x001f0000)
#define MT2063_SPUR_SHIFT (16)
/* Info: Upconverter frequency is out of range (may be reason for MT_UPC_UNLOCK) */
#define MT2063_UPC_RANGE (0x04000000)
/* Info: Downconverter frequency is out of range (may be reason for MT_DPC_UNLOCK) */
#define MT2063_DNC_RANGE (0x08000000)
/*
* Constant defining the version of the following structure
* and therefore the API for this code.
*
* When compiling the tuner driver, the preprocessor will
* check against this version number to make sure that
* it matches the version that the tuner driver knows about.
*/
/* DECT Frequency Avoidance */
#define MT2063_DECT_AVOID_US_FREQS 0x00000001
#define MT2063_DECT_AVOID_EURO_FREQS 0x00000002
#define MT2063_EXCLUDE_US_DECT_FREQUENCIES(s) (((s) & MT2063_DECT_AVOID_US_FREQS) != 0)
#define MT2063_EXCLUDE_EURO_DECT_FREQUENCIES(s) (((s) & MT2063_DECT_AVOID_EURO_FREQS) != 0)
enum MT2063_DECT_Avoid_Type {
MT2063_NO_DECT_AVOIDANCE = 0, /* Do not create DECT exclusion zones. */
MT2063_AVOID_US_DECT = MT2063_DECT_AVOID_US_FREQS, /* Avoid US DECT frequencies. */
MT2063_AVOID_EURO_DECT = MT2063_DECT_AVOID_EURO_FREQS, /* Avoid European DECT frequencies. */
MT2063_AVOID_BOTH /* Avoid both regions. Not typically used. */
};
#define MT2063_MAX_ZONES 48
struct MT2063_ExclZone_t {
u32 min_;
u32 max_;
struct MT2063_ExclZone_t *next_;
};
/*
* Structure of data needed for Spur Avoidance
*/
struct MT2063_AvoidSpursData_t {
u32 f_ref;
u32 f_in;
u32 f_LO1;
u32 f_if1_Center;
u32 f_if1_Request;
u32 f_if1_bw;
u32 f_LO2;
u32 f_out;
u32 f_out_bw;
u32 f_LO1_Step;
u32 f_LO2_Step;
u32 f_LO1_FracN_Avoid;
u32 f_LO2_FracN_Avoid;
u32 f_zif_bw;
u32 f_min_LO_Separation;
u32 maxH1;
u32 maxH2;
enum MT2063_DECT_Avoid_Type avoidDECT;
u32 bSpurPresent;
u32 bSpurAvoided;
u32 nSpursFound;
u32 nZones;
struct MT2063_ExclZone_t *freeZones;
struct MT2063_ExclZone_t *usedZones;
struct MT2063_ExclZone_t MT2063_ExclZones[MT2063_MAX_ZONES];
};
/*
* Parameter for function MT2063_SetPowerMask that specifies the power down
* of various sections of the MT2063.
*/
enum MT2063_Mask_Bits {
MT2063_REG_SD = 0x0040, /* Shutdown regulator */
MT2063_SRO_SD = 0x0020, /* Shutdown SRO */
MT2063_AFC_SD = 0x0010, /* Shutdown AFC A/D */
MT2063_PD_SD = 0x0002, /* Enable power detector shutdown */
MT2063_PDADC_SD = 0x0001, /* Enable power detector A/D shutdown */
MT2063_VCO_SD = 0x8000, /* Enable VCO shutdown */
MT2063_LTX_SD = 0x4000, /* Enable LTX shutdown */
MT2063_LT1_SD = 0x2000, /* Enable LT1 shutdown */
MT2063_LNA_SD = 0x1000, /* Enable LNA shutdown */
MT2063_UPC_SD = 0x0800, /* Enable upconverter shutdown */
MT2063_DNC_SD = 0x0400, /* Enable downconverter shutdown */
MT2063_VGA_SD = 0x0200, /* Enable VGA shutdown */
MT2063_AMP_SD = 0x0100, /* Enable AMP shutdown */
MT2063_ALL_SD = 0xFF73, /* All shutdown bits for this tuner */
MT2063_NONE_SD = 0x0000 /* No shutdown bits */
};
/*
* Possible values for MT2063_DNC_OUTPUT
*/
enum MT2063_DNC_Output_Enable {
MT2063_DNC_NONE = 0,
MT2063_DNC_1,
MT2063_DNC_2,
MT2063_DNC_BOTH
};
/*
* Two-wire serial bus subaddresses of the tuner registers.
* Also known as the tuner's register addresses.
*/
enum MT2063_Register_Offsets {
MT2063_REG_PART_REV = 0, /* 0x00: Part/Rev Code */
MT2063_REG_LO1CQ_1, /* 0x01: LO1C Queued Byte 1 */
MT2063_REG_LO1CQ_2, /* 0x02: LO1C Queued Byte 2 */
MT2063_REG_LO2CQ_1, /* 0x03: LO2C Queued Byte 1 */
MT2063_REG_LO2CQ_2, /* 0x04: LO2C Queued Byte 2 */
MT2063_REG_LO2CQ_3, /* 0x05: LO2C Queued Byte 3 */
MT2063_REG_RSVD_06, /* 0x06: Reserved */
MT2063_REG_LO_STATUS, /* 0x07: LO Status */
MT2063_REG_FIFFC, /* 0x08: FIFF Center */
MT2063_REG_CLEARTUNE, /* 0x09: ClearTune Filter */
MT2063_REG_ADC_OUT, /* 0x0A: ADC_OUT */
MT2063_REG_LO1C_1, /* 0x0B: LO1C Byte 1 */
MT2063_REG_LO1C_2, /* 0x0C: LO1C Byte 2 */
MT2063_REG_LO2C_1, /* 0x0D: LO2C Byte 1 */
MT2063_REG_LO2C_2, /* 0x0E: LO2C Byte 2 */
MT2063_REG_LO2C_3, /* 0x0F: LO2C Byte 3 */
MT2063_REG_RSVD_10, /* 0x10: Reserved */
MT2063_REG_PWR_1, /* 0x11: PWR Byte 1 */
MT2063_REG_PWR_2, /* 0x12: PWR Byte 2 */
MT2063_REG_TEMP_STATUS, /* 0x13: Temp Status */
MT2063_REG_XO_STATUS, /* 0x14: Crystal Status */
MT2063_REG_RF_STATUS, /* 0x15: RF Attn Status */
MT2063_REG_FIF_STATUS, /* 0x16: FIF Attn Status */
MT2063_REG_LNA_OV, /* 0x17: LNA Attn Override */
MT2063_REG_RF_OV, /* 0x18: RF Attn Override */
MT2063_REG_FIF_OV, /* 0x19: FIF Attn Override */
MT2063_REG_LNA_TGT, /* 0x1A: Reserved */
MT2063_REG_PD1_TGT, /* 0x1B: Pwr Det 1 Target */
MT2063_REG_PD2_TGT, /* 0x1C: Pwr Det 2 Target */
MT2063_REG_RSVD_1D, /* 0x1D: Reserved */
MT2063_REG_RSVD_1E, /* 0x1E: Reserved */
MT2063_REG_RSVD_1F, /* 0x1F: Reserved */
MT2063_REG_RSVD_20, /* 0x20: Reserved */
MT2063_REG_BYP_CTRL, /* 0x21: Bypass Control */
MT2063_REG_RSVD_22, /* 0x22: Reserved */
MT2063_REG_RSVD_23, /* 0x23: Reserved */
MT2063_REG_RSVD_24, /* 0x24: Reserved */
MT2063_REG_RSVD_25, /* 0x25: Reserved */
MT2063_REG_RSVD_26, /* 0x26: Reserved */
MT2063_REG_RSVD_27, /* 0x27: Reserved */
MT2063_REG_FIFF_CTRL, /* 0x28: FIFF Control */
MT2063_REG_FIFF_OFFSET, /* 0x29: FIFF Offset */
MT2063_REG_CTUNE_CTRL, /* 0x2A: Reserved */
MT2063_REG_CTUNE_OV, /* 0x2B: Reserved */
MT2063_REG_CTRL_2C, /* 0x2C: Reserved */
MT2063_REG_FIFF_CTRL2, /* 0x2D: Fiff Control */
MT2063_REG_RSVD_2E, /* 0x2E: Reserved */
MT2063_REG_DNC_GAIN, /* 0x2F: DNC Control */
MT2063_REG_VGA_GAIN, /* 0x30: VGA Gain Ctrl */
MT2063_REG_RSVD_31, /* 0x31: Reserved */
MT2063_REG_TEMP_SEL, /* 0x32: Temperature Selection */
MT2063_REG_RSVD_33, /* 0x33: Reserved */
MT2063_REG_RSVD_34, /* 0x34: Reserved */
MT2063_REG_RSVD_35, /* 0x35: Reserved */
MT2063_REG_RSVD_36, /* 0x36: Reserved */
MT2063_REG_RSVD_37, /* 0x37: Reserved */
MT2063_REG_RSVD_38, /* 0x38: Reserved */
MT2063_REG_RSVD_39, /* 0x39: Reserved */
MT2063_REG_RSVD_3A, /* 0x3A: Reserved */
MT2063_REG_RSVD_3B, /* 0x3B: Reserved */
MT2063_REG_RSVD_3C, /* 0x3C: Reserved */
MT2063_REG_END_REGS
};
struct mt2063_state {
struct i2c_adapter *i2c;
bool init;
const struct mt2063_config *config;
struct dvb_tuner_ops ops;
struct dvb_frontend *frontend;
u32 frequency;
u32 srate;
u32 bandwidth;
u32 reference;
u32 tuner_id;
struct MT2063_AvoidSpursData_t AS_Data;
u32 f_IF1_actual;
u32 rcvr_mode;
u32 ctfilt_sw;
u32 CTFiltMax[31];
u32 num_regs;
u8 reg[MT2063_REG_END_REGS];
};
/*
* mt2063_write - Write data into the I2C bus
*/
static int mt2063_write(struct mt2063_state *state, u8 reg, u8 *data, u32 len)
{
struct dvb_frontend *fe = state->frontend;
int ret;
u8 buf[60];
struct i2c_msg msg = {
.addr = state->config->tuner_address,
.flags = 0,
.buf = buf,
.len = len + 1
};
dprintk(2, "\n");
msg.buf[0] = reg;
memcpy(msg.buf + 1, data, len);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
ret = i2c_transfer(state->i2c, &msg, 1);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
if (ret < 0)
printk(KERN_ERR "%s error ret=%d\n", __func__, ret);
return ret;
}
/*
* mt2063_write - Write register data into the I2C bus, caching the value
*/
static int mt2063_setreg(struct mt2063_state *state, u8 reg, u8 val)
{
int status;
dprintk(2, "\n");
if (reg >= MT2063_REG_END_REGS)
return -ERANGE;
status = mt2063_write(state, reg, &val, 1);
if (status < 0)
return status;
state->reg[reg] = val;
return 0;
}
/*
* mt2063_read - Read data from the I2C bus
*/
static int mt2063_read(struct mt2063_state *state,
u8 subAddress, u8 *pData, u32 cnt)
{
int status = 0; /* Status to be returned */
struct dvb_frontend *fe = state->frontend;
u32 i = 0;
dprintk(2, "addr 0x%02x, cnt %d\n", subAddress, cnt);
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 1);
for (i = 0; i < cnt; i++) {
u8 b0[] = { subAddress + i };
struct i2c_msg msg[] = {
{
.addr = state->config->tuner_address,
.flags = 0,
.buf = b0,
.len = 1
}, {
.addr = state->config->tuner_address,
.flags = I2C_M_RD,
.buf = pData + i,
.len = 1
}
};
status = i2c_transfer(state->i2c, msg, 2);
dprintk(2, "addr 0x%02x, ret = %d, val = 0x%02x\n",
subAddress + i, status, *(pData + i));
if (status < 0)
break;
}
if (fe->ops.i2c_gate_ctrl)
fe->ops.i2c_gate_ctrl(fe, 0);
if (status < 0)
printk(KERN_ERR "Can't read from address 0x%02x,\n",
subAddress + i);
return status;
}
/*
* FIXME: Is this really needed?
*/
static int MT2063_Sleep(struct dvb_frontend *fe)
{
/*
* ToDo: Add code here to implement a OS blocking
*/
msleep(100);
return 0;
}
/*
* Microtune spur avoidance
*/
/* Implement ceiling, floor functions. */
#define ceil(n, d) (((n) < 0) ? (-((-(n))/(d))) : (n)/(d) + ((n)%(d) != 0))
#define floor(n, d) (((n) < 0) ? (-((-(n))/(d))) - ((n)%(d) != 0) : (n)/(d))
struct MT2063_FIFZone_t {
s32 min_;
s32 max_;
};
static struct MT2063_ExclZone_t *InsertNode(struct MT2063_AvoidSpursData_t
*pAS_Info,
struct MT2063_ExclZone_t *pPrevNode)
{
struct MT2063_ExclZone_t *pNode;
dprintk(2, "\n");
/* Check for a node in the free list */
if (pAS_Info->freeZones != NULL) {
/* Use one from the free list */
pNode = pAS_Info->freeZones;
pAS_Info->freeZones = pNode->next_;
} else {
/* Grab a node from the array */
pNode = &pAS_Info->MT2063_ExclZones[pAS_Info->nZones];
}
if (pPrevNode != NULL) {
pNode->next_ = pPrevNode->next_;
pPrevNode->next_ = pNode;
} else { /* insert at the beginning of the list */
pNode->next_ = pAS_Info->usedZones;
pAS_Info->usedZones = pNode;
}
pAS_Info->nZones++;
return pNode;
}
static struct MT2063_ExclZone_t *RemoveNode(struct MT2063_AvoidSpursData_t
*pAS_Info,
struct MT2063_ExclZone_t *pPrevNode,
struct MT2063_ExclZone_t
*pNodeToRemove)
{
struct MT2063_ExclZone_t *pNext = pNodeToRemove->next_;
dprintk(2, "\n");
/* Make previous node point to the subsequent node */
if (pPrevNode != NULL)
pPrevNode->next_ = pNext;
/* Add pNodeToRemove to the beginning of the freeZones */
pNodeToRemove->next_ = pAS_Info->freeZones;
pAS_Info->freeZones = pNodeToRemove;
/* Decrement node count */
pAS_Info->nZones--;
return pNext;
}
/*
* MT_AddExclZone()
*
* Add (and merge) an exclusion zone into the list.
* If the range (f_min, f_max) is totally outside the
* 1st IF BW, ignore the entry.
* If the range (f_min, f_max) is negative, ignore the entry.
*/
static void MT2063_AddExclZone(struct MT2063_AvoidSpursData_t *pAS_Info,
u32 f_min, u32 f_max)
{
struct MT2063_ExclZone_t *pNode = pAS_Info->usedZones;
struct MT2063_ExclZone_t *pPrev = NULL;
struct MT2063_ExclZone_t *pNext = NULL;
dprintk(2, "\n");
/* Check to see if this overlaps the 1st IF filter */
if ((f_max > (pAS_Info->f_if1_Center - (pAS_Info->f_if1_bw / 2)))
&& (f_min < (pAS_Info->f_if1_Center + (pAS_Info->f_if1_bw / 2)))
&& (f_min < f_max)) {
/*
* 1 2 3 4 5 6
*
* New entry: |---| |--| |--| |-| |---| |--|
* or or or or or
* Existing: |--| |--| |--| |---| |-| |--|
*/
/* Check for our place in the list */
while ((pNode != NULL) && (pNode->max_ < f_min)) {
pPrev = pNode;
pNode = pNode->next_;
}
if ((pNode != NULL) && (pNode->min_ < f_max)) {
/* Combine me with pNode */
if (f_min < pNode->min_)
pNode->min_ = f_min;
if (f_max > pNode->max_)
pNode->max_ = f_max;
} else {
pNode = InsertNode(pAS_Info, pPrev);
pNode->min_ = f_min;
pNode->max_ = f_max;
}
/* Look for merging possibilities */
pNext = pNode->next_;
while ((pNext != NULL) && (pNext->min_ < pNode->max_)) {
if (pNext->max_ > pNode->max_)
pNode->max_ = pNext->max_;
/* Remove pNext, return ptr to pNext->next */
pNext = RemoveNode(pAS_Info, pNode, pNext);
}
}
}
/*
* Reset all exclusion zones.
* Add zones to protect the PLL FracN regions near zero
*/
static void MT2063_ResetExclZones(struct MT2063_AvoidSpursData_t *pAS_Info)
{
u32 center;
dprintk(2, "\n");
pAS_Info->nZones = 0; /* this clears the used list */
pAS_Info->usedZones = NULL; /* reset ptr */
pAS_Info->freeZones = NULL; /* reset ptr */
center =
pAS_Info->f_ref *
((pAS_Info->f_if1_Center - pAS_Info->f_if1_bw / 2 +
pAS_Info->f_in) / pAS_Info->f_ref) - pAS_Info->f_in;
while (center <
pAS_Info->f_if1_Center + pAS_Info->f_if1_bw / 2 +
pAS_Info->f_LO1_FracN_Avoid) {
/* Exclude LO1 FracN */
MT2063_AddExclZone(pAS_Info,
center - pAS_Info->f_LO1_FracN_Avoid,
center - 1);
MT2063_AddExclZone(pAS_Info, center + 1,
center + pAS_Info->f_LO1_FracN_Avoid);
center += pAS_Info->f_ref;
}
center =
pAS_Info->f_ref *
((pAS_Info->f_if1_Center - pAS_Info->f_if1_bw / 2 -
pAS_Info->f_out) / pAS_Info->f_ref) + pAS_Info->f_out;
while (center <
pAS_Info->f_if1_Center + pAS_Info->f_if1_bw / 2 +
pAS_Info->f_LO2_FracN_Avoid) {
/* Exclude LO2 FracN */
MT2063_AddExclZone(pAS_Info,
center - pAS_Info->f_LO2_FracN_Avoid,
center - 1);
MT2063_AddExclZone(pAS_Info, center + 1,
center + pAS_Info->f_LO2_FracN_Avoid);
center += pAS_Info->f_ref;
}
if (MT2063_EXCLUDE_US_DECT_FREQUENCIES(pAS_Info->avoidDECT)) {
/* Exclude LO1 values that conflict with DECT channels */
MT2063_AddExclZone(pAS_Info, 1920836000 - pAS_Info->f_in, 1922236000 - pAS_Info->f_in); /* Ctr = 1921.536 */
MT2063_AddExclZone(pAS_Info, 1922564000 - pAS_Info->f_in, 1923964000 - pAS_Info->f_in); /* Ctr = 1923.264 */
MT2063_AddExclZone(pAS_Info, 1924292000 - pAS_Info->f_in, 1925692000 - pAS_Info->f_in); /* Ctr = 1924.992 */
MT2063_AddExclZone(pAS_Info, 1926020000 - pAS_Info->f_in, 1927420000 - pAS_Info->f_in); /* Ctr = 1926.720 */
MT2063_AddExclZone(pAS_Info, 1927748000 - pAS_Info->f_in, 1929148000 - pAS_Info->f_in); /* Ctr = 1928.448 */
}
if (MT2063_EXCLUDE_EURO_DECT_FREQUENCIES(pAS_Info->avoidDECT)) {
MT2063_AddExclZone(pAS_Info, 1896644000 - pAS_Info->f_in, 1898044000 - pAS_Info->f_in); /* Ctr = 1897.344 */
MT2063_AddExclZone(pAS_Info, 1894916000 - pAS_Info->f_in, 1896316000 - pAS_Info->f_in); /* Ctr = 1895.616 */
MT2063_AddExclZone(pAS_Info, 1893188000 - pAS_Info->f_in, 1894588000 - pAS_Info->f_in); /* Ctr = 1893.888 */
MT2063_AddExclZone(pAS_Info, 1891460000 - pAS_Info->f_in, 1892860000 - pAS_Info->f_in); /* Ctr = 1892.16 */
MT2063_AddExclZone(pAS_Info, 1889732000 - pAS_Info->f_in, 1891132000 - pAS_Info->f_in); /* Ctr = 1890.432 */
MT2063_AddExclZone(pAS_Info, 1888004000 - pAS_Info->f_in, 1889404000 - pAS_Info->f_in); /* Ctr = 1888.704 */
MT2063_AddExclZone(pAS_Info, 1886276000 - pAS_Info->f_in, 1887676000 - pAS_Info->f_in); /* Ctr = 1886.976 */
MT2063_AddExclZone(pAS_Info, 1884548000 - pAS_Info->f_in, 1885948000 - pAS_Info->f_in); /* Ctr = 1885.248 */
MT2063_AddExclZone(pAS_Info, 1882820000 - pAS_Info->f_in, 1884220000 - pAS_Info->f_in); /* Ctr = 1883.52 */
MT2063_AddExclZone(pAS_Info, 1881092000 - pAS_Info->f_in, 1882492000 - pAS_Info->f_in); /* Ctr = 1881.792 */
}
}
/*
* MT_ChooseFirstIF - Choose the best available 1st IF
* If f_Desired is not excluded, choose that first.
* Otherwise, return the value closest to f_Center that is
* not excluded
*/
static u32 MT2063_ChooseFirstIF(struct MT2063_AvoidSpursData_t *pAS_Info)
{
/*
* Update "f_Desired" to be the nearest "combinational-multiple" of
* "f_LO1_Step".
* The resulting number, F_LO1 must be a multiple of f_LO1_Step.
* And F_LO1 is the arithmetic sum of f_in + f_Center.
* Neither f_in, nor f_Center must be a multiple of f_LO1_Step.
* However, the sum must be.
*/
const u32 f_Desired =
pAS_Info->f_LO1_Step *
((pAS_Info->f_if1_Request + pAS_Info->f_in +
pAS_Info->f_LO1_Step / 2) / pAS_Info->f_LO1_Step) -
pAS_Info->f_in;
const u32 f_Step =
(pAS_Info->f_LO1_Step >
pAS_Info->f_LO2_Step) ? pAS_Info->f_LO1_Step : pAS_Info->
f_LO2_Step;
u32 f_Center;
s32 i;
s32 j = 0;
u32 bDesiredExcluded = 0;
u32 bZeroExcluded = 0;
s32 tmpMin, tmpMax;
s32 bestDiff;
struct MT2063_ExclZone_t *pNode = pAS_Info->usedZones;
struct MT2063_FIFZone_t zones[MT2063_MAX_ZONES];
dprintk(2, "\n");
if (pAS_Info->nZones == 0)
return f_Desired;
/*
* f_Center needs to be an integer multiple of f_Step away
* from f_Desired
*/
if (pAS_Info->f_if1_Center > f_Desired)
f_Center =
f_Desired +
f_Step *
((pAS_Info->f_if1_Center - f_Desired +
f_Step / 2) / f_Step);
else
f_Center =
f_Desired -
f_Step *
((f_Desired - pAS_Info->f_if1_Center +
f_Step / 2) / f_Step);
/*
* Take MT_ExclZones, center around f_Center and change the
* resolution to f_Step
*/
while (pNode != NULL) {
/* floor function */
tmpMin =
floor((s32) (pNode->min_ - f_Center), (s32) f_Step);
/* ceil function */
tmpMax =
ceil((s32) (pNode->max_ - f_Center), (s32) f_Step);
if ((pNode->min_ < f_Desired) && (pNode->max_ > f_Desired))
bDesiredExcluded = 1;
if ((tmpMin < 0) && (tmpMax > 0))
bZeroExcluded = 1;
/* See if this zone overlaps the previous */
if ((j > 0) && (tmpMin < zones[j - 1].max_))
zones[j - 1].max_ = tmpMax;
else {
/* Add new zone */
zones[j].min_ = tmpMin;
zones[j].max_ = tmpMax;
j++;
}
pNode = pNode->next_;
}
/*
* If the desired is okay, return with it
*/
if (bDesiredExcluded == 0)
return f_Desired;
/*
* If the desired is excluded and the center is okay, return with it
*/
if (bZeroExcluded == 0)
return f_Center;
/* Find the value closest to 0 (f_Center) */
bestDiff = zones[0].min_;
for (i = 0; i < j; i++) {
if (abs(zones[i].min_) < abs(bestDiff))
bestDiff = zones[i].min_;
if (abs(zones[i].max_) < abs(bestDiff))
bestDiff = zones[i].max_;
}
if (bestDiff < 0)
return f_Center - ((u32) (-bestDiff) * f_Step);
return f_Center + (bestDiff * f_Step);
}
/**
* IsSpurInBand() - Checks to see if a spur will be present within the IF's
* bandwidth. (fIFOut +/- fIFBW, -fIFOut +/- fIFBW)
*
* ma mb mc md
* <--+-+-+-------------------+-------------------+-+-+-->
* | ^ 0 ^ |
* ^ b=-fIFOut+fIFBW/2 -b=+fIFOut-fIFBW/2 ^
* a=-fIFOut-fIFBW/2 -a=+fIFOut+fIFBW/2
*
* Note that some equations are doubled to prevent round-off
* problems when calculating fIFBW/2
*
* @pAS_Info: Avoid Spurs information block
* @fm: If spur, amount f_IF1 has to move negative
* @fp: If spur, amount f_IF1 has to move positive
*
* Returns 1 if an LO spur would be present, otherwise 0.
*/
static u32 IsSpurInBand(struct MT2063_AvoidSpursData_t *pAS_Info,
u32 *fm, u32 * fp)
{
/*
** Calculate LO frequency settings.
*/
u32 n, n0;
const u32 f_LO1 = pAS_Info->f_LO1;
const u32 f_LO2 = pAS_Info->f_LO2;
const u32 d = pAS_Info->f_out + pAS_Info->f_out_bw / 2;
const u32 c = d - pAS_Info->f_out_bw;
const u32 f = pAS_Info->f_zif_bw / 2;
const u32 f_Scale = (f_LO1 / (UINT_MAX / 2 / pAS_Info->maxH1)) + 1;
s32 f_nsLO1, f_nsLO2;
s32 f_Spur;
u32 ma, mb, mc, md, me, mf;
u32 lo_gcd, gd_Scale, gc_Scale, gf_Scale, hgds, hgfs, hgcs;
dprintk(2, "\n");
*fm = 0;
/*
** For each edge (d, c & f), calculate a scale, based on the gcd
** of f_LO1, f_LO2 and the edge value. Use the larger of this
** gcd-based scale factor or f_Scale.
*/
lo_gcd = gcd(f_LO1, f_LO2);
gd_Scale = max((u32) gcd(lo_gcd, d), f_Scale);
hgds = gd_Scale / 2;
gc_Scale = max((u32) gcd(lo_gcd, c), f_Scale);
hgcs = gc_Scale / 2;
gf_Scale = max((u32) gcd(lo_gcd, f), f_Scale);
hgfs = gf_Scale / 2;
n0 = DIV_ROUND_UP(f_LO2 - d, f_LO1 - f_LO2);
/* Check out all multiples of LO1 from n0 to m_maxLOSpurHarmonic */
for (n = n0; n <= pAS_Info->maxH1; ++n) {
md = (n * ((f_LO1 + hgds) / gd_Scale) -
((d + hgds) / gd_Scale)) / ((f_LO2 + hgds) / gd_Scale);
/* If # fLO2 harmonics > m_maxLOSpurHarmonic, then no spurs present */
if (md >= pAS_Info->maxH1)
break;
ma = (n * ((f_LO1 + hgds) / gd_Scale) +
((d + hgds) / gd_Scale)) / ((f_LO2 + hgds) / gd_Scale);
/* If no spurs between +/- (f_out + f_IFBW/2), then try next harmonic */
if (md == ma)
continue;
mc = (n * ((f_LO1 + hgcs) / gc_Scale) -
((c + hgcs) / gc_Scale)) / ((f_LO2 + hgcs) / gc_Scale);
if (mc != md) {
f_nsLO1 = (s32) (n * (f_LO1 / gc_Scale));
f_nsLO2 = (s32) (mc * (f_LO2 / gc_Scale));
f_Spur =
(gc_Scale * (f_nsLO1 - f_nsLO2)) +
n * (f_LO1 % gc_Scale) - mc * (f_LO2 % gc_Scale);
*fp = ((f_Spur - (s32) c) / (mc - n)) + 1;
*fm = (((s32) d - f_Spur) / (mc - n)) + 1;
return 1;
}
/* Location of Zero-IF-spur to be checked */
me = (n * ((f_LO1 + hgfs) / gf_Scale) +
((f + hgfs) / gf_Scale)) / ((f_LO2 + hgfs) / gf_Scale);
mf = (n * ((f_LO1 + hgfs) / gf_Scale) -
((f + hgfs) / gf_Scale)) / ((f_LO2 + hgfs) / gf_Scale);
if (me != mf) {
f_nsLO1 = n * (f_LO1 / gf_Scale);
f_nsLO2 = me * (f_LO2 / gf_Scale);
f_Spur =
(gf_Scale * (f_nsLO1 - f_nsLO2)) +
n * (f_LO1 % gf_Scale) - me * (f_LO2 % gf_Scale);
*fp = ((f_Spur + (s32) f) / (me - n)) + 1;
*fm = (((s32) f - f_Spur) / (me - n)) + 1;
return 1;
}
mb = (n * ((f_LO1 + hgcs) / gc_Scale) +
((c + hgcs) / gc_Scale)) / ((f_LO2 + hgcs) / gc_Scale);
if (ma != mb) {
f_nsLO1 = n * (f_LO1 / gc_Scale);
f_nsLO2 = ma * (f_LO2 / gc_Scale);
f_Spur =
(gc_Scale * (f_nsLO1 - f_nsLO2)) +
n * (f_LO1 % gc_Scale) - ma * (f_LO2 % gc_Scale);
*fp = (((s32) d + f_Spur) / (ma - n)) + 1;
*fm = (-(f_Spur + (s32) c) / (ma - n)) + 1;
return 1;
}
}
/* No spurs found */
return 0;
}
/*
* MT_AvoidSpurs() - Main entry point to avoid spurs.
* Checks for existing spurs in present LO1, LO2 freqs
* and if present, chooses spur-free LO1, LO2 combination
* that tunes the same input/output frequencies.
*/
static u32 MT2063_AvoidSpurs(struct MT2063_AvoidSpursData_t *pAS_Info)
{
int status = 0;
u32 fm, fp; /* restricted range on LO's */
pAS_Info->bSpurAvoided = 0;
pAS_Info->nSpursFound = 0;
dprintk(2, "\n");
if (pAS_Info->maxH1 == 0)
return 0;
/*
* Avoid LO Generated Spurs
*
* Make sure that have no LO-related spurs within the IF output
* bandwidth.
*
* If there is an LO spur in this band, start at the current IF1 frequency
* and work out until we find a spur-free frequency or run up against the
* 1st IF SAW band edge. Use temporary copies of fLO1 and fLO2 so that they
* will be unchanged if a spur-free setting is not found.
*/
pAS_Info->bSpurPresent = IsSpurInBand(pAS_Info, &fm, &fp);
if (pAS_Info->bSpurPresent) {
u32 zfIF1 = pAS_Info->f_LO1 - pAS_Info->f_in; /* current attempt at a 1st IF */
u32 zfLO1 = pAS_Info->f_LO1; /* current attempt at an LO1 freq */
u32 zfLO2 = pAS_Info->f_LO2; /* current attempt at an LO2 freq */
u32 delta_IF1;
u32 new_IF1;
/*
** Spur was found, attempt to find a spur-free 1st IF
*/
do {
pAS_Info->nSpursFound++;
/* Raise f_IF1_upper, if needed */
MT2063_AddExclZone(pAS_Info, zfIF1 - fm, zfIF1 + fp);
/* Choose next IF1 that is closest to f_IF1_CENTER */
new_IF1 = MT2063_ChooseFirstIF(pAS_Info);
if (new_IF1 > zfIF1) {
pAS_Info->f_LO1 += (new_IF1 - zfIF1);
pAS_Info->f_LO2 += (new_IF1 - zfIF1);
} else {
pAS_Info->f_LO1 -= (zfIF1 - new_IF1);
pAS_Info->f_LO2 -= (zfIF1 - new_IF1);
}
zfIF1 = new_IF1;
if (zfIF1 > pAS_Info->f_if1_Center)
delta_IF1 = zfIF1 - pAS_Info->f_if1_Center;
else
delta_IF1 = pAS_Info->f_if1_Center - zfIF1;
pAS_Info->bSpurPresent = IsSpurInBand(pAS_Info, &fm, &fp);
/*
* Continue while the new 1st IF is still within the 1st IF bandwidth
* and there is a spur in the band (again)
*/
} while ((2 * delta_IF1 + pAS_Info->f_out_bw <= pAS_Info->f_if1_bw) && pAS_Info->bSpurPresent);
/*
* Use the LO-spur free values found. If the search went all
* the way to the 1st IF band edge and always found spurs, just
* leave the original choice. It's as "good" as any other.
*/
if (pAS_Info->bSpurPresent == 1) {
status |= MT2063_SPUR_PRESENT_ERR;
pAS_Info->f_LO1 = zfLO1;
pAS_Info->f_LO2 = zfLO2;
} else
pAS_Info->bSpurAvoided = 1;
}
status |=
((pAS_Info->
nSpursFound << MT2063_SPUR_SHIFT) & MT2063_SPUR_CNT_MASK);
return status;
}
/*
* Constants used by the tuning algorithm
*/
#define MT2063_REF_FREQ (16000000UL) /* Reference oscillator Frequency (in Hz) */
#define MT2063_IF1_BW (22000000UL) /* The IF1 filter bandwidth (in Hz) */
#define MT2063_TUNE_STEP_SIZE (50000UL) /* Tune in steps of 50 kHz */
#define MT2063_SPUR_STEP_HZ (250000UL) /* Step size (in Hz) to move IF1 when avoiding spurs */
#define MT2063_ZIF_BW (2000000UL) /* Zero-IF spur-free bandwidth (in Hz) */
#define MT2063_MAX_HARMONICS_1 (15UL) /* Highest intra-tuner LO Spur Harmonic to be avoided */
#define MT2063_MAX_HARMONICS_2 (5UL) /* Highest inter-tuner LO Spur Harmonic to be avoided */
#define MT2063_MIN_LO_SEP (1000000UL) /* Minimum inter-tuner LO frequency separation */
#define MT2063_LO1_FRACN_AVOID (0UL) /* LO1 FracN numerator avoid region (in Hz) */
#define MT2063_LO2_FRACN_AVOID (199999UL) /* LO2 FracN numerator avoid region (in Hz) */
#define MT2063_MIN_FIN_FREQ (44000000UL) /* Minimum input frequency (in Hz) */
#define MT2063_MAX_FIN_FREQ (1100000000UL) /* Maximum input frequency (in Hz) */
#define MT2063_MIN_FOUT_FREQ (36000000UL) /* Minimum output frequency (in Hz) */
#define MT2063_MAX_FOUT_FREQ (57000000UL) /* Maximum output frequency (in Hz) */
#define MT2063_MIN_DNC_FREQ (1293000000UL) /* Minimum LO2 frequency (in Hz) */
#define MT2063_MAX_DNC_FREQ (1614000000UL) /* Maximum LO2 frequency (in Hz) */
#define MT2063_MIN_UPC_FREQ (1396000000UL) /* Minimum LO1 frequency (in Hz) */
#define MT2063_MAX_UPC_FREQ (2750000000UL) /* Maximum LO1 frequency (in Hz) */
/*
* Define the supported Part/Rev codes for the MT2063
*/
#define MT2063_B0 (0x9B)
#define MT2063_B1 (0x9C)
#define MT2063_B2 (0x9D)
#define MT2063_B3 (0x9E)
/**
* mt2063_lockStatus - Checks to see if LO1 and LO2 are locked
*
* @state: struct mt2063_state pointer
*
* This function returns 0, if no lock, 1 if locked and a value < 1 if error
*/
static int mt2063_lockStatus(struct mt2063_state *state)
{
const u32 nMaxWait = 100; /* wait a maximum of 100 msec */
const u32 nPollRate = 2; /* poll status bits every 2 ms */
const u32 nMaxLoops = nMaxWait / nPollRate;
const u8 LO1LK = 0x80;
u8 LO2LK = 0x08;
int status;
u32 nDelays = 0;
dprintk(2, "\n");
/* LO2 Lock bit was in a different place for B0 version */
if (state->tuner_id == MT2063_B0)
LO2LK = 0x40;
do {
status = mt2063_read(state, MT2063_REG_LO_STATUS,
&state->reg[MT2063_REG_LO_STATUS], 1);
if (status < 0)
return status;
if ((state->reg[MT2063_REG_LO_STATUS] & (LO1LK | LO2LK)) ==
(LO1LK | LO2LK)) {
return TUNER_STATUS_LOCKED | TUNER_STATUS_STEREO;
}
msleep(nPollRate); /* Wait between retries */
} while (++nDelays < nMaxLoops);
/*
* Got no lock or partial lock
*/
return 0;
}
/*
* Constants for setting receiver modes.
* (6 modes defined at this time, enumerated by mt2063_delivery_sys)
* (DNC1GC & DNC2GC are the values, which are used, when the specific
* DNC Output is selected, the other is always off)
*
* enum mt2063_delivery_sys
* -------------+----------------------------------------------
* Mode 0 : | MT2063_CABLE_QAM
* Mode 1 : | MT2063_CABLE_ANALOG
* Mode 2 : | MT2063_OFFAIR_COFDM
* Mode 3 : | MT2063_OFFAIR_COFDM_SAWLESS
* Mode 4 : | MT2063_OFFAIR_ANALOG
* Mode 5 : | MT2063_OFFAIR_8VSB
* --------------+----------------------------------------------
*
* |<---------- Mode -------------->|
* Reg Field | 0 | 1 | 2 | 3 | 4 | 5 |
* ------------+-----+-----+-----+-----+-----+-----+
* RFAGCen | OFF | OFF | OFF | OFF | OFF | OFF
* LNARin | 0 | 0 | 3 | 3 | 3 | 3
* FIFFQen | 1 | 1 | 1 | 1 | 1 | 1
* FIFFq | 0 | 0 | 0 | 0 | 0 | 0
* DNC1gc | 0 | 0 | 0 | 0 | 0 | 0
* DNC2gc | 0 | 0 | 0 | 0 | 0 | 0
* GCU Auto | 1 | 1 | 1 | 1 | 1 | 1
* LNA max Atn | 31 | 31 | 31 | 31 | 31 | 31
* LNA Target | 44 | 43 | 43 | 43 | 43 | 43
* ign RF Ovl | 0 | 0 | 0 | 0 | 0 | 0
* RF max Atn | 31 | 31 | 31 | 31 | 31 | 31
* PD1 Target | 36 | 36 | 38 | 38 | 36 | 38
* ign FIF Ovl | 0 | 0 | 0 | 0 | 0 | 0
* FIF max Atn | 5 | 5 | 5 | 5 | 5 | 5
* PD2 Target | 40 | 33 | 42 | 42 | 33 | 42
*/
enum mt2063_delivery_sys {
MT2063_CABLE_QAM = 0,
MT2063_CABLE_ANALOG,
MT2063_OFFAIR_COFDM,
MT2063_OFFAIR_COFDM_SAWLESS,
MT2063_OFFAIR_ANALOG,
MT2063_OFFAIR_8VSB,
MT2063_NUM_RCVR_MODES
};
static const char *mt2063_mode_name[] = {
[MT2063_CABLE_QAM] = "digital cable",
[MT2063_CABLE_ANALOG] = "analog cable",
[MT2063_OFFAIR_COFDM] = "digital offair",
[MT2063_OFFAIR_COFDM_SAWLESS] = "digital offair without SAW",
[MT2063_OFFAIR_ANALOG] = "analog offair",
[MT2063_OFFAIR_8VSB] = "analog offair 8vsb",
};
static const u8 RFAGCEN[] = { 0, 0, 0, 0, 0, 0 };
static const u8 LNARIN[] = { 0, 0, 3, 3, 3, 3 };