stm32f4discovery.cfg

# This is an STM32F4 discovery board with a single STM32F407VGT6 chip.
# http://www.st.com/internet/evalboard/product/252419.jsp

#source [find interface/stlink-v2.cfg]
#
# STMicroelectronics ST-LINK/V2 in-circuit debugger/programmer
#

interface stlink
stlink_layout usb
stlink_device_desc "ST-LINK/V2"
stlink_vid_pid 0x0483 0x3748

# unused but set to disable warnings
adapter_khz 1000


#source [find target/stm32f4x_stlink.cfg]
#
# STM32f4x stlink pseudo target
#

if { [info exists CHIPNAME] == 0 } {
   set CHIPNAME stm32f4x
}

if { [info exists CPUTAPID] == 0 } {
   set CPUTAPID 0x2ba01477
}

if { [info exists WORKAREASIZE] == 0 } {
   set WORKAREASIZE 0x10000
}

#source [find target/stm32_stlink.cfg]
#
# stm32 stlink pseudo target
#

if { [info exists CHIPNAME] } {
   set _CHIPNAME $CHIPNAME
} else {
   set _CHIPNAME stm32f1x
}

# Work-area is a space in RAM used for flash programming
# By default use 16kB
if { [info exists WORKAREASIZE] } {
   set _WORKAREASIZE $WORKAREASIZE
} else {
   set _WORKAREASIZE 0x4000
}

if { [info exists CPUTAPID] } {
   set _CPUTAPID $CPUTAPID
} else {
   # this is the SW-DP tap id not the jtag tap id
   set _CPUTAPID 0x1ba01477
}

if { [info exists TRANSPORT] } {
   set _TRANSPORT $TRANSPORT
   if { $TRANSPORT == "stlink_jtag" } {
      if { [info exists CPUTAPID] == 0 } {
         # jtag requires us to use the jtag tap id
         set _CPUTAPID 0x3ba00477
      }
   }
} else {
   set _TRANSPORT stlink_swd
}

#
# possibles value are stlink_swd or stlink_jtag
#
transport select $_TRANSPORT

stlink newtap $_CHIPNAME cpu -expected-id $_CPUTAPID

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME stm32_stlink -chain-position $_TARGETNAME

$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0

# stm32f4x family uses stm32f2x driver
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME

# use hardware reset, connect under reset
reset_config srst_only srst_nogate