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system.xml
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system.xml
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<EDKSYSTEM EDKVERSION="12.1" EDWVERSION="1.2" TIMESTAMP="Sat Sep 25 14:50:30 2010">
<SYSTEMINFO ARCH="virtex5" DEVICE="xc5vfx70t" PACKAGE="ff1136" PART="xc5vfx70tff1136-1" SOURCE="/home/aalonso/workspace/xlnx/xilinx-ml507-updated/system.xmp" SPEEDGRADE="-1"/>
<EXTERNALPORTS>
<PORT DIR="I" MHS_INDEX="0" NAME="fpga_0_RS232_Uart_1_RX_pin" SIGNAME="fpga_0_RS232_Uart_1_RX_pin"/>
<PORT DIR="O" MHS_INDEX="1" NAME="fpga_0_RS232_Uart_1_TX_pin" SIGNAME="fpga_0_RS232_Uart_1_TX_pin"/>
<PORT DIR="IO" ENDIAN="BIG" LSB="0" MHS_INDEX="2" MSB="7" NAME="fpga_0_LEDs_8Bit_GPIO_IO_pin" SIGNAME="fpga_0_LEDs_8Bit_GPIO_IO_pin"/>
<PORT DIR="IO" ENDIAN="BIG" LSB="0" MHS_INDEX="3" MSB="4" NAME="fpga_0_LEDs_Positions_GPIO_IO_pin" SIGNAME="fpga_0_LEDs_Positions_GPIO_IO_pin"/>
<PORT DIR="IO" ENDIAN="BIG" LSB="0" MHS_INDEX="4" MSB="4" NAME="fpga_0_Push_Buttons_5Bit_GPIO_IO_pin" SIGNAME="fpga_0_Push_Buttons_5Bit_GPIO_IO_pin"/>
<PORT DIR="IO" ENDIAN="BIG" LSB="0" MHS_INDEX="5" MSB="7" NAME="fpga_0_DIP_Switches_8Bit_GPIO_IO_pin" SIGNAME="fpga_0_DIP_Switches_8Bit_GPIO_IO_pin"/>
<PORT DIR="IO" MHS_INDEX="6" NAME="fpga_0_IIC_EEPROM_Sda_pin" SIGNAME="fpga_0_IIC_EEPROM_Sda_pin"/>
<PORT DIR="IO" MHS_INDEX="7" NAME="fpga_0_IIC_EEPROM_Scl_pin" SIGNAME="fpga_0_IIC_EEPROM_Scl_pin"/>
<PORT DIR="I" MHS_INDEX="8" NAME="fpga_0_Ethernet_MAC_PHY_tx_clk_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_tx_clk_pin"/>
<PORT DIR="I" MHS_INDEX="9" NAME="fpga_0_Ethernet_MAC_PHY_rx_clk_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_rx_clk_pin"/>
<PORT DIR="I" MHS_INDEX="10" NAME="fpga_0_Ethernet_MAC_PHY_crs_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_crs_pin"/>
<PORT DIR="I" MHS_INDEX="11" NAME="fpga_0_Ethernet_MAC_PHY_dv_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_dv_pin"/>
<PORT DIR="I" ENDIAN="BIG" LSB="3" MHS_INDEX="12" MSB="0" NAME="fpga_0_Ethernet_MAC_PHY_rx_data_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_rx_data_pin"/>
<PORT DIR="I" MHS_INDEX="13" NAME="fpga_0_Ethernet_MAC_PHY_col_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_col_pin"/>
<PORT DIR="I" MHS_INDEX="14" NAME="fpga_0_Ethernet_MAC_PHY_rx_er_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_rx_er_pin"/>
<PORT DIR="O" MHS_INDEX="15" NAME="fpga_0_Ethernet_MAC_PHY_rst_n_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_rst_n_pin"/>
<PORT DIR="O" MHS_INDEX="16" NAME="fpga_0_Ethernet_MAC_PHY_tx_en_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_tx_en_pin"/>
<PORT DIR="O" ENDIAN="BIG" LSB="3" MHS_INDEX="17" MSB="0" NAME="fpga_0_Ethernet_MAC_PHY_tx_data_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_tx_data_pin"/>
<PORT DIR="O" MHS_INDEX="18" NAME="fpga_0_Ethernet_MAC_PHY_MDC_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_MDC_pin"/>
<PORT DIR="IO" MHS_INDEX="19" NAME="fpga_0_Ethernet_MAC_PHY_MDIO_pin" SIGNAME="fpga_0_Ethernet_MAC_PHY_MDIO_pin"/>
<PORT DIR="I" MHS_INDEX="20" NAME="fpga_0_Ethernet_MAC_MDINT_pin" SENSITIVITY="LEVEL_LOW" SIGIS="INTERRUPT" SIGNAME="fpga_0_Ethernet_MAC_MDINT_pin"/>
<PORT DIR="IO" ENDIAN="BIG" LSB="63" MHS_INDEX="21" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_DQ_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DQ_pin"/>
<PORT DIR="IO" ENDIAN="BIG" LSB="7" MHS_INDEX="22" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_DQS_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DQS_pin"/>
<PORT DIR="IO" ENDIAN="BIG" LSB="7" MHS_INDEX="23" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_DQS_N_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DQS_N_pin"/>
<PORT DIR="O" ENDIAN="BIG" LSB="12" MHS_INDEX="24" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_A_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_A_pin"/>
<PORT DIR="O" ENDIAN="BIG" LSB="1" MHS_INDEX="25" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_BA_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_BA_pin"/>
<PORT DIR="O" MHS_INDEX="26" NAME="fpga_0_DDR2_SDRAM_DDR2_RAS_N_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_RAS_N_pin"/>
<PORT DIR="O" MHS_INDEX="27" NAME="fpga_0_DDR2_SDRAM_DDR2_CAS_N_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CAS_N_pin"/>
<PORT DIR="O" MHS_INDEX="28" NAME="fpga_0_DDR2_SDRAM_DDR2_WE_N_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_WE_N_pin"/>
<PORT DIR="O" MHS_INDEX="29" NAME="fpga_0_DDR2_SDRAM_DDR2_CS_N_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CS_N_pin"/>
<PORT DIR="O" ENDIAN="BIG" LSB="1" MHS_INDEX="30" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_ODT_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_ODT_pin"/>
<PORT DIR="O" MHS_INDEX="31" NAME="fpga_0_DDR2_SDRAM_DDR2_CKE_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CKE_pin"/>
<PORT DIR="O" ENDIAN="BIG" LSB="7" MHS_INDEX="32" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_DM_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_DM_pin"/>
<PORT DIR="O" ENDIAN="BIG" LSB="1" MHS_INDEX="33" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_CK_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CK_pin"/>
<PORT DIR="O" ENDIAN="BIG" LSB="1" MHS_INDEX="34" MSB="0" NAME="fpga_0_DDR2_SDRAM_DDR2_CK_N_pin" SIGNAME="fpga_0_DDR2_SDRAM_DDR2_CK_N_pin"/>
<PORT DIR="O" ENDIAN="BIG" LSB="6" MHS_INDEX="35" MSB="0" NAME="fpga_0_SysACE_CompactFlash_SysACE_MPA_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_MPA_pin"/>
<PORT DIR="I" MHS_INDEX="36" NAME="fpga_0_SysACE_CompactFlash_SysACE_CLK_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_CLK_pin"/>
<PORT DIR="I" MHS_INDEX="37" NAME="fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin"/>
<PORT DIR="O" MHS_INDEX="38" NAME="fpga_0_SysACE_CompactFlash_SysACE_CEN_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_CEN_pin"/>
<PORT DIR="O" MHS_INDEX="39" NAME="fpga_0_SysACE_CompactFlash_SysACE_OEN_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_OEN_pin"/>
<PORT DIR="O" MHS_INDEX="40" NAME="fpga_0_SysACE_CompactFlash_SysACE_WEN_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_WEN_pin"/>
<PORT DIR="IO" ENDIAN="BIG" LSB="15" MHS_INDEX="41" MSB="0" NAME="fpga_0_SysACE_CompactFlash_SysACE_MPD_pin" SIGNAME="fpga_0_SysACE_CompactFlash_SysACE_MPD_pin"/>
<PORT DIR="O" ENDIAN="BIG" LSB="7" MHS_INDEX="42" MSB="30" NAME="fpga_0_FLASH_Mem_A_pin" SIGNAME="fpga_0_FLASH_Mem_A_pin_vslice_7_30_concat"/>
<PORT DIR="O" MHS_INDEX="43" NAME="fpga_0_FLASH_Mem_CEN_pin" SIGNAME="fpga_0_FLASH_Mem_CEN_pin"/>
<PORT DIR="O" MHS_INDEX="44" NAME="fpga_0_FLASH_Mem_OEN_pin" SIGNAME="fpga_0_FLASH_Mem_OEN_pin"/>
<PORT DIR="O" MHS_INDEX="45" NAME="fpga_0_FLASH_Mem_WEN_pin" SIGNAME="fpga_0_FLASH_Mem_WEN_pin"/>
<PORT DIR="O" MHS_INDEX="46" NAME="fpga_0_FLASH_Mem_ADV_LDN_pin" SIGNAME="fpga_0_FLASH_Mem_ADV_LDN_pin"/>
<PORT DIR="IO" ENDIAN="BIG" LSB="0" MHS_INDEX="47" MSB="15" NAME="fpga_0_FLASH_Mem_DQ_pin" SIGNAME="fpga_0_FLASH_Mem_DQ_pin"/>
<PORT CLKFREQUENCY="100000000" DIR="I" MHS_INDEX="48" NAME="fpga_0_clk_1_sys_clk_pin" SIGIS="CLK" SIGNAME="dcm_clk_s"/>
<PORT DIR="I" MHS_INDEX="49" NAME="fpga_0_rst_1_sys_rst_pin" RSTPOLARITY="0" SIGIS="RST" SIGNAME="sys_rst_s"/>
<PORT DIR="IO" MHS_INDEX="50" NAME="xps_tft_0_TFT_IIC_SDA" SIGNAME="xps_tft_0_TFT_IIC_SDA"/>
<PORT DIR="O" MHS_INDEX="51" NAME="xps_tft_0_TFT_HSYNC_pin" SIGNAME="xps_tft_0_TFT_HSYNC"/>
<PORT DIR="O" MHS_INDEX="52" NAME="xps_tft_0_TFT_DVI_CLK_N_pin" SIGNAME="xps_tft_0_TFT_DVI_CLK_N"/>
<PORT DIR="O" ENDIAN="BIG" LSB="11" MHS_INDEX="53" MSB="0" NAME="xps_tft_0_TFT_DVI_DATA_pin" SIGNAME="xps_tft_0_TFT_DVI_DATA"/>
<PORT DIR="O" MHS_INDEX="54" NAME="xps_tft_0_TFT_DE_pin" SIGNAME="xps_tft_0_TFT_DE"/>
<PORT DIR="O" MHS_INDEX="55" NAME="xps_tft_0_TFT_VSYNC_pin" SIGNAME="xps_tft_0_TFT_VSYNC"/>
<PORT DIR="O" MHS_INDEX="56" NAME="xps_tft_0_TFT_DVI_CLK_P_pin" SIGNAME="xps_tft_0_TFT_DVI_CLK_P"/>
<PORT DIR="IO" MHS_INDEX="57" NAME="xps_tft_0_TFT_IIC_SCL" SIGNAME="xps_tft_0_TFT_IIC_SCL"/>
<PORT DIR="O" MHS_INDEX="58" NAME="xps_tft_0_TFT_RESET_pin" RSTPOLARITY="1" SIGIS="RST" SIGNAME="sys_rst_s"/>
<PORT DIR="IO" MHS_INDEX="59" NAME="xps_ps2_0_PS2_1_CLK" SIGNAME="xps_ps2_0_PS2_1_CLK"/>
<PORT DIR="IO" MHS_INDEX="60" NAME="xps_ps2_0_PS2_2_DATA" SIGNAME="xps_ps2_0_PS2_2_DATA"/>
<PORT DIR="IO" MHS_INDEX="61" NAME="xps_ps2_0_PS2_2_CLK" SIGNAME="xps_ps2_0_PS2_2_CLK"/>
<PORT DIR="IO" MHS_INDEX="62" NAME="xps_ps2_0_PS2_1_DATA" SIGNAME="xps_ps2_0_PS2_1_DATA"/>
</EXTERNALPORTS>
<MODULES>
<MODULE HWVERSION="1.01.a" INSTANCE="ppc440_0" IPTYPE="PROCESSOR" MHS_INDEX="0" MODCLASS="PROCESSOR" MODTYPE="ppc440_virtex5" PROCTYPE="PPC440">
<DESCRIPTION TYPE="SHORT">PowerPC 440 Virtex-5</DESCRIPTION>
<DESCRIPTION TYPE="LONG">A wrapper to instantiate the PowerPC 440 Processor Block primitive</DESCRIPTION>
<DOCUMENTATION>
<DOCUMENT SOURCE="/opt/Xilinx/12.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/ppc440_virtex5_v1_01_a/doc/ppc440_virtex5.pdf" TYPE="IP"/>
</DOCUMENTATION>
<LICENSEINFO ICON_NAME="ps_core_preferred"/>
<PARAMETERS>
<PARAMETER LSB="31" MPD_INDEX="0" MSB="28" NAME="C_PIR" TYPE="std_logic_vector" VALUE="0b1111">
<DESCRIPTION>Unique Processor ID</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="1" NAME="C_ENDIAN_RESET" TYPE="std_logic" VALUE="0">
<DESCRIPTION>Reset Value for Endian Storage Byte Ordering</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="3" MPD_INDEX="2" MSB="0" NAME="C_USER_RESET" TYPE="std_logic_vector" VALUE="0b0000">
<DESCRIPTION>Reset Value for User Defined Storage Attributes: Tattribute[4:7]</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="31" MPD_INDEX="3" MSB="0" NAME="C_INTERCONNECT_IMASK" TYPE="BIT_VECTOR" VALUE="0xffffffff">
<DESCRIPTION>Interrupt Mask for Crossbar-related Interrupts</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="1" MPD_INDEX="4" MSB="0" NAME="C_ICU_RD_FETCH_PLB_PRIO" TYPE="std_logic_vector" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for all CPU Fetch Requests</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="1" MPD_INDEX="5" MSB="0" NAME="C_ICU_RD_SPEC_PLB_PRIO" TYPE="std_logic_vector" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for all Speculative CPU Fetch Requests</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="1" MPD_INDEX="6" MSB="0" NAME="C_ICU_RD_TOUCH_PLB_PRIO" TYPE="std_logic_vector" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for all CPU Fetch Requests Initiated by ICBT Instructions</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="1" MPD_INDEX="7" MSB="0" NAME="C_DCU_RD_LD_CACHE_PLB_PRIO" TYPE="std_logic_vector" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for all CPU Cacheable Load Requests</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="1" MPD_INDEX="8" MSB="0" NAME="C_DCU_RD_NONCACHE_PLB_PRIO" TYPE="std_logic_vector" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for CPU Non-cacheable Load Requests</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="1" MPD_INDEX="9" MSB="0" NAME="C_DCU_RD_TOUCH_PLB_PRIO" TYPE="std_logic_vector" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for all CPU Load Requests Initiated by DCBT Instructions</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="1" MPD_INDEX="10" MSB="0" NAME="C_DCU_RD_URGENT_PLB_PRIO" TYPE="std_logic_vector" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for an Urgent CPU Load Request</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="1" MPD_INDEX="11" MSB="0" NAME="C_DCU_WR_FLUSH_PLB_PRIO" TYPE="std_logic_vector" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for CPU Write Requests Initiated by flush Instruction</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="1" MPD_INDEX="12" MSB="0" NAME="C_DCU_WR_STORE_PLB_PRIO" TYPE="std_logic_vector" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for CPU Write Requests Initiated by store Instructions</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="1" MPD_INDEX="13" MSB="0" NAME="C_DCU_WR_URGENT_PLB_PRIO" TYPE="std_logic_vector" VALUE="0b00">
<DESCRIPTION>Arbitration Priority for an Urgent CPU Write Request</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="1" MPD_INDEX="14" MSB="0" NAME="C_DMA0_PLB_PRIO" TYPE="bit_vector" VALUE="0b00">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="1" MPD_INDEX="15" MSB="0" NAME="C_DMA1_PLB_PRIO" TYPE="bit_vector" VALUE="0b00">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="1" MPD_INDEX="16" MSB="0" NAME="C_DMA2_PLB_PRIO" TYPE="bit_vector" VALUE="0b00">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="1" MPD_INDEX="17" MSB="0" NAME="C_DMA3_PLB_PRIO" TYPE="bit_vector" VALUE="0b00">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" LSB="9" MHS_INDEX="1" MPD_INDEX="18" MSB="0" NAME="C_IDCR_BASEADDR" TYPE="std_logic_vector" VALUE="0b0000000000">
<DESCRIPTION>Internal DCR Register Base Address</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" LSB="9" MHS_INDEX="2" MPD_INDEX="19" MSB="0" NAME="C_IDCR_HIGHADDR" TYPE="std_logic_vector" VALUE="0b0011111111">
<DESCRIPTION>Internal DCR Register High Address</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="16" MPD_INDEX="20" MSB="0" NAME="C_APU_CONTROL" TYPE="BIT_VECTOR" VALUE="0b00010000000000000">
<DESCRIPTION>APU Controller Configuration Register Value</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="23" MPD_INDEX="21" MSB="0" NAME="C_APU_UDI_0" TYPE="BIT_VECTOR" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 0 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="23" MPD_INDEX="22" MSB="0" NAME="C_APU_UDI_1" TYPE="BIT_VECTOR" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 1 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="23" MPD_INDEX="23" MSB="0" NAME="C_APU_UDI_2" TYPE="BIT_VECTOR" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 2 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="23" MPD_INDEX="24" MSB="0" NAME="C_APU_UDI_3" TYPE="BIT_VECTOR" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 3 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="23" MPD_INDEX="25" MSB="0" NAME="C_APU_UDI_4" TYPE="BIT_VECTOR" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 4 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="23" MPD_INDEX="26" MSB="0" NAME="C_APU_UDI_5" TYPE="BIT_VECTOR" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 5 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="23" MPD_INDEX="27" MSB="0" NAME="C_APU_UDI_6" TYPE="BIT_VECTOR" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 6 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="23" MPD_INDEX="28" MSB="0" NAME="C_APU_UDI_7" TYPE="BIT_VECTOR" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 7 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="23" MPD_INDEX="29" MSB="0" NAME="C_APU_UDI_8" TYPE="BIT_VECTOR" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 8 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="23" MPD_INDEX="30" MSB="0" NAME="C_APU_UDI_9" TYPE="BIT_VECTOR" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 9 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="23" MPD_INDEX="31" MSB="0" NAME="C_APU_UDI_10" TYPE="BIT_VECTOR" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 10 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="23" MPD_INDEX="32" MSB="0" NAME="C_APU_UDI_11" TYPE="BIT_VECTOR" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 11 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="23" MPD_INDEX="33" MSB="0" NAME="C_APU_UDI_12" TYPE="BIT_VECTOR" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 12 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="23" MPD_INDEX="34" MSB="0" NAME="C_APU_UDI_13" TYPE="BIT_VECTOR" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 13 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="23" MPD_INDEX="35" MSB="0" NAME="C_APU_UDI_14" TYPE="BIT_VECTOR" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 14 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="23" MPD_INDEX="36" MSB="0" NAME="C_APU_UDI_15" TYPE="BIT_VECTOR" VALUE="0b000000000000000000000000">
<DESCRIPTION>UDI Configuration Register 15 Value</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" LSB="31" MPD_INDEX="37" MSB="0" NAME="C_PPC440MC_ADDR_BASE" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>Base Address of Memory</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" LSB="31" MPD_INDEX="38" MSB="0" NAME="C_PPC440MC_ADDR_HIGH" TYPE="std_logic_vector" VALUE="0x0fffffff">
<DESCRIPTION>High Address of Memory </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="3" MPD_INDEX="39" MSB="0" NAME="C_PPC440MC_ROW_CONFLICT_MASK" TYPE="BIT_VECTOR" VALUE="0x003FFE00">
<DESCRIPTION>Mask Used to Determine a Row Conflict</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="4" MPD_INDEX="40" MSB="0" NAME="C_PPC440MC_BANK_CONFLICT_MASK" TYPE="BIT_VECTOR" VALUE="0x00C00000">
<DESCRIPTION>Mask Used to Determine a Bank Conflict</DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="5" MPD_INDEX="41" MSB="0" NAME="C_PPC440MC_CONTROL" TYPE="BIT_VECTOR" VALUE="0xF810008F">
<DESCRIPTION>Control and Configuration for the MC Interface</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="42" NAME="C_PPC440MC_PRIO_ICU" TYPE="integer" VALUE="4">
<DESCRIPTION>Secondary Arbitration Priority for all Instruction Fetches from CPU</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="43" NAME="C_PPC440MC_PRIO_DCUW" TYPE="integer" VALUE="3">
<DESCRIPTION>Secondary Arbitration Priority for all Data Writes from CPU</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="44" NAME="C_PPC440MC_PRIO_DCUR" TYPE="integer" VALUE="2">
<DESCRIPTION>Secondary Arbitration Priority for all Data Reads from CPU</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="45" NAME="C_PPC440MC_PRIO_SPLB1" TYPE="integer" VALUE="0">
<DESCRIPTION>Secondary Arbitration Priority for SPLB1, DMA2 and DMA3</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="46" NAME="C_PPC440MC_PRIO_SPLB0" TYPE="integer" VALUE="1">
<DESCRIPTION>Secondary Arbitration Priority for SPLB0, DMA0 and DMA1</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="47" NAME="C_PPC440MC_ARB_MODE" TYPE="integer" VALUE="0">
<DESCRIPTION>Memory Control Interface Arbitration Mode</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="48" NAME="C_PPC440MC_MAX_BURST" TYPE="integer" VALUE="8">
<DESCRIPTION>Max Number of Quad-words per Burst thru Xbar to MC Interface</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="49" NAME="C_MPLB_AWIDTH" TYPE="integer" VALUE="32">
<DESCRIPTION>C_MPLB_AWIDTH</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="50" NAME="C_MPLB_DWIDTH" TYPE="integer" VALUE="128">
<DESCRIPTION>C_MPLB_DWIDTH</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="51" NAME="C_MPLB_NATIVE_DWIDTH" TYPE="integer" VALUE="128">
<DESCRIPTION>C_MPLB_NATIVE_DWIDTH</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="31" MPD_INDEX="52" MSB="0" NAME="C_MPLB_COUNTER" TYPE="BIT_VECTOR" VALUE="0x00000500">
<DESCRIPTION>Watchdog Counter Threshold</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="53" NAME="C_MPLB_PRIO_ICU" TYPE="integer" VALUE="4">
<DESCRIPTION>Secondary Arbitration Prio for Instr Fetches</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="54" NAME="C_MPLB_PRIO_DCUW" TYPE="integer" VALUE="3">
<DESCRIPTION>Secondary Arbitration Prio for Data Writes</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="55" NAME="C_MPLB_PRIO_DCUR" TYPE="integer" VALUE="2">
<DESCRIPTION>Secondary Arbitration Prio for Data Reads</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="56" NAME="C_MPLB_PRIO_SPLB1" TYPE="integer" VALUE="0">
<DESCRIPTION>Secondary Arbitration Prio for SPLB1, DMA2, DMA3</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="57" NAME="C_MPLB_PRIO_SPLB0" TYPE="integer" VALUE="1">
<DESCRIPTION>Secondary Arbitration Prio for SPLB0, DMA0, DMA1</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="58" NAME="C_MPLB_ARB_MODE" TYPE="integer" VALUE="0">
<DESCRIPTION>MPLB Arbitration Mode</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="59" NAME="C_MPLB_SYNC_TATTRIBUTE" TYPE="integer" VALUE="0">
<DESCRIPTION>Allow MBusy to Block MPLB</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="60" NAME="C_MPLB_MAX_BURST" TYPE="integer" VALUE="8">
<DESCRIPTION>Max Num of Quad-words in Bursts</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="61" NAME="C_MPLB_ALLOW_LOCK_XFER" TYPE="integer" VALUE="1">
<DESCRIPTION>Allow Locked Transfer</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="62" NAME="C_MPLB_READ_PIPE_ENABLE" TYPE="integer" VALUE="1">
<DESCRIPTION>Allow Read Addr Pipelining</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="63" NAME="C_MPLB_WRITE_PIPE_ENABLE" TYPE="integer" VALUE="1">
<DESCRIPTION>Allow Write Addr Pipelining</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="64" NAME="C_MPLB_WRITE_POST_ENABLE" TYPE="integer" VALUE="1">
<DESCRIPTION>Allow Posted Writes</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="65" NAME="C_MPLB_P2P" TYPE="integer" VALUE="0">
<DESCRIPTION>C_MPLB_P2P</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="66" NAME="C_MPLB_WDOG_ENABLE" TYPE="integer" VALUE="1">
<DESCRIPTION>Enable Watchdog Timer</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="67" NAME="C_SPLB0_AWIDTH" TYPE="integer" VALUE="32">
<DESCRIPTION>C_SPLB0_AWIDTH</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="68" NAME="C_SPLB0_DWIDTH" TYPE="integer" VALUE="128">
<DESCRIPTION>C_SPLB0_DWIDTH</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="69" NAME="C_SPLB0_NATIVE_DWIDTH" TYPE="integer" VALUE="128">
<DESCRIPTION>C_SPLB0_NATIVE_DWIDTH</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="70" NAME="C_SPLB0_SUPPORT_BURSTS" TYPE="integer" VALUE="1">
<DESCRIPTION>SPLB Support Bursts</DESCRIPTION>
</PARAMETER>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="71" NAME="C_SPLB0_USE_MPLB_ADDR" TYPE="integer" VALUE="0">
<DESCRIPTION>Allow SPLB0 to Access MPLB Addr</DESCRIPTION>
</PARAMETER>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="72" NAME="C_SPLB0_NUM_MPLB_ADDR_RNG" TYPE="integer" VALUE="0">
<DESCRIPTION>Number of MPLB Addr Ranges</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="11" MPD_INDEX="73" MSB="0" NAME="C_SPLB0_RNG_MC_BASEADDR" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>Base Addr </DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="12" MPD_INDEX="74" MSB="0" NAME="C_SPLB0_RNG_MC_HIGHADDR" TYPE="std_logic_vector" VALUE="0x0FFFFFFF">
<DESCRIPTION>High Addr </DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" BRIDGE_TO="MPLB" LSB="31" MPD_INDEX="75" MSB="0" NAME="C_SPLB0_RNG0_MPLB_BASEADDR" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="10" MPD_INDEX="76" MSB="0" NAME="C_SPLB0_RNG0_MPLB_HIGHADDR" TYPE="std_logic_vector" VALUE="0x9fffffff">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" BRIDGE_TO="MPLB" LSB="31" MPD_INDEX="77" MSB="0" NAME="C_SPLB0_RNG1_MPLB_BASEADDR" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" LSB="31" MPD_INDEX="78" MSB="0" NAME="C_SPLB0_RNG1_MPLB_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" BRIDGE_TO="MPLB" LSB="31" MPD_INDEX="79" MSB="0" NAME="C_SPLB0_RNG2_MPLB_BASEADDR" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" LSB="31" MPD_INDEX="80" MSB="0" NAME="C_SPLB0_RNG2_MPLB_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" BRIDGE_TO="MPLB" LSB="31" MPD_INDEX="81" MSB="0" NAME="C_SPLB0_RNG3_MPLB_BASEADDR" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" LSB="31" MPD_INDEX="82" MSB="0" NAME="C_SPLB0_RNG3_MPLB_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="83" NAME="C_SPLB0_NUM_MASTERS" TYPE="INTEGER" VALUE="2">
<DESCRIPTION>Number of Masters</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="84" NAME="C_SPLB0_MID_WIDTH" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Mid Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="85" NAME="C_SPLB0_ALLOW_LOCK_XFER" TYPE="integer" VALUE="1">
<DESCRIPTION>SPLB Allow Locked Transfer</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="86" NAME="C_SPLB0_READ_PIPE_ENABLE" TYPE="integer" VALUE="1">
<DESCRIPTION>Enable SPLB Read Pipeline</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="87" NAME="C_SPLB0_PROPAGATE_MIRQ" TYPE="integer" VALUE="0">
<DESCRIPTION>Propagate MIRQ Signals from Xbar onto SPLB </DESCRIPTION>
</PARAMETER>
<PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="88" NAME="C_SPLB0_P2P" TYPE="integer" VALUE="0">
<DESCRIPTION>Use P2P</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="89" NAME="C_SPLB1_AWIDTH" TYPE="integer" VALUE="32">
<DESCRIPTION>C_SPLB1_AWIDTH</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="90" NAME="C_SPLB1_DWIDTH" TYPE="integer" VALUE="128">
<DESCRIPTION>C_SPLB1_DWIDTH</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="91" NAME="C_SPLB1_NATIVE_DWIDTH" TYPE="integer" VALUE="128">
<DESCRIPTION>C_SPLB1_NATIVE_DWIDTH</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="92" NAME="C_SPLB1_SUPPORT_BURSTS" TYPE="integer" VALUE="1">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="93" NAME="C_SPLB1_USE_MPLB_ADDR" TYPE="integer" VALUE="0">
<DESCRIPTION>Allow SPLB1 to Access MPLB Addr</DESCRIPTION>
</PARAMETER>
<PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="94" NAME="C_SPLB1_NUM_MPLB_ADDR_RNG" TYPE="integer" VALUE="0">
<DESCRIPTION>Number of MPLB Address Ranges</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" LSB="31" MPD_INDEX="95" MSB="0" NAME="C_SPLB1_RNG_MC_BASEADDR" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION>Base Addr </DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" LSB="31" MPD_INDEX="96" MSB="0" NAME="C_SPLB1_RNG_MC_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION>High Addr</DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" BRIDGE_TO="MPLB" LSB="31" MPD_INDEX="97" MSB="0" NAME="C_SPLB1_RNG0_MPLB_BASEADDR" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" LSB="31" MPD_INDEX="98" MSB="0" NAME="C_SPLB1_RNG0_MPLB_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" BRIDGE_TO="MPLB" LSB="31" MPD_INDEX="99" MSB="0" NAME="C_SPLB1_RNG1_MPLB_BASEADDR" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" LSB="31" MPD_INDEX="100" MSB="0" NAME="C_SPLB1_RNG1_MPLB_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" BRIDGE_TO="MPLB" LSB="31" MPD_INDEX="101" MSB="0" NAME="C_SPLB1_RNG2_MPLB_BASEADDR" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" LSB="31" MPD_INDEX="102" MSB="0" NAME="C_SPLB1_RNG2_MPLB_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="BASE" ADDR_TYPE="BRIDGE" BRIDGE_TO="MPLB" LSB="31" MPD_INDEX="103" MSB="0" NAME="C_SPLB1_RNG3_MPLB_BASEADDR" TYPE="std_logic_vector" VALUE="0xffffffff">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER ADDRESS="HIGH" ADDR_TYPE="BRIDGE" LSB="31" MPD_INDEX="104" MSB="0" NAME="C_SPLB1_RNG3_MPLB_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="105" NAME="C_SPLB1_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Number of Masters</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="106" NAME="C_SPLB1_MID_WIDTH" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Mid Width</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="107" NAME="C_SPLB1_ALLOW_LOCK_XFER" TYPE="integer" VALUE="1">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="108" NAME="C_SPLB1_READ_PIPE_ENABLE" TYPE="integer" VALUE="1">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="109" NAME="C_SPLB1_PROPAGATE_MIRQ" TYPE="integer" VALUE="0">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="110" NAME="C_SPLB1_P2P" TYPE="integer" VALUE="-1">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="111" NAME="C_NUM_DMA" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Number of DMA Channel</DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="31" MPD_INDEX="112" MSB="0" NAME="C_DMA0_TXCHANNELCTRL" TYPE="BIT_VECTOR" VALUE="0x01010000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="31" MPD_INDEX="113" MSB="0" NAME="C_DMA0_RXCHANNELCTRL" TYPE="BIT_VECTOR" VALUE="0x01010000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="7" MPD_INDEX="114" MSB="0" NAME="C_DMA0_CONTROL" TYPE="BIT_VECTOR" VALUE="0b00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="9" MPD_INDEX="115" MSB="0" NAME="C_DMA0_TXIRQTIMER" TYPE="BIT_VECTOR" VALUE="0b1111111111">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="9" MPD_INDEX="116" MSB="0" NAME="C_DMA0_RXIRQTIMER" TYPE="BIT_VECTOR" VALUE="0b1111111111">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="31" MPD_INDEX="117" MSB="0" NAME="C_DMA1_TXCHANNELCTRL" TYPE="BIT_VECTOR" VALUE="0x01010000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="31" MPD_INDEX="118" MSB="0" NAME="C_DMA1_RXCHANNELCTRL" TYPE="BIT_VECTOR" VALUE="0x01010000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="7" MPD_INDEX="119" MSB="0" NAME="C_DMA1_CONTROL" TYPE="BIT_VECTOR" VALUE="0b00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="9" MPD_INDEX="120" MSB="0" NAME="C_DMA1_TXIRQTIMER" TYPE="BIT_VECTOR" VALUE="0b1111111111">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="9" MPD_INDEX="121" MSB="0" NAME="C_DMA1_RXIRQTIMER" TYPE="BIT_VECTOR" VALUE="0b1111111111">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="31" MPD_INDEX="122" MSB="0" NAME="C_DMA2_TXCHANNELCTRL" TYPE="BIT_VECTOR" VALUE="0x01010000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="31" MPD_INDEX="123" MSB="0" NAME="C_DMA2_RXCHANNELCTRL" TYPE="BIT_VECTOR" VALUE="0x01010000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="7" MPD_INDEX="124" MSB="0" NAME="C_DMA2_CONTROL" TYPE="BIT_VECTOR" VALUE="0b00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="9" MPD_INDEX="125" MSB="0" NAME="C_DMA2_TXIRQTIMER" TYPE="BIT_VECTOR" VALUE="0b1111111111">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="9" MPD_INDEX="126" MSB="0" NAME="C_DMA2_RXIRQTIMER" TYPE="BIT_VECTOR" VALUE="0b1111111111">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="31" MPD_INDEX="127" MSB="0" NAME="C_DMA3_TXCHANNELCTRL" TYPE="BIT_VECTOR" VALUE="0x01010000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="31" MPD_INDEX="128" MSB="0" NAME="C_DMA3_RXCHANNELCTRL" TYPE="BIT_VECTOR" VALUE="0x01010000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="7" MPD_INDEX="129" MSB="0" NAME="C_DMA3_CONTROL" TYPE="BIT_VECTOR" VALUE="0b00000000">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="9" MPD_INDEX="130" MSB="0" NAME="C_DMA3_TXIRQTIMER" TYPE="BIT_VECTOR" VALUE="0b1111111111">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER LSB="9" MPD_INDEX="131" MSB="0" NAME="C_DMA3_RXIRQTIMER" TYPE="BIT_VECTOR" VALUE="0b1111111111">
<DESCRIPTION></DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="132" NAME="C_DCR_AUTOLOCK_ENABLE" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Enable the Auto-lock Feature for the DCR Indirect Mode</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="133" NAME="C_PPCDM_ASYNCMODE" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Synchronization Mode for the External MDCR Interface</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="134" NAME="C_PPCDS_ASYNCMODE" TYPE="INTEGER" VALUE="0">
<DESCRIPTION>Synchronization Mode for the External SDCR Interface</DESCRIPTION>
</PARAMETER>
<PARAMETER MPD_INDEX="135" NAME="C_GENERATE_PLB_TIMESPECS" TYPE="INTEGER" VALUE="1">
<DESCRIPTION>Generate Timing Constraint to Resynchronize SPLB MBusy Outputs</DESCRIPTION>
</PARAMETER>
</PARAMETERS>
<PORTS>
<PORT CLKFREQUENCY="400000000" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="CPMC440CLK" SIGIS="CLK" SIGNAME="clk_400_0000MHzPLL0"/>
<PORT CLKFREQUENCY="200000000" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="2" NAME="CPMINTERCONNECTCLK" SIGIS="CLK" SIGNAME="clk_200_0000MHzPLL0"/>
<PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="4" NAME="CPMINTERCONNECTCLKNTO1" SIGNAME="net_vcc"/>
<PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="24" NAME="EICC440EXTIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="ppc440_0_EICC440EXTIRQ"/>
<PORT CLKFREQUENCY="200000000" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="78" NAME="CPMMCCLK" SIGIS="CLK" SIGNAME="clk_200_0000MHzPLL0_ADJUST"/>
<PORT DIR="I" MPD_INDEX="1" NAME="CPMC440CLKEN" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="3" NAME="CPMINTERCONNECTCLKEN" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="5" NAME="CPMC440CORECLOCKINACTIVE" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="6" NAME="CPMC440TIMERCLOCK" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="7" NAME="C440MACHINECHECK" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="8" NAME="C440CPMCORESLEEPREQ" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="9" NAME="C440CPMDECIRPTREQ" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="10" NAME="C440CPMFITIRPTREQ" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="11" NAME="C440CPMMSRCE" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="12" NAME="C440CPMMSREE" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="13" NAME="C440CPMTIMERRESETREQ" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="14" NAME="C440CPMWDIRPTREQ" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="15" NAME="PPCCPMINTERCONNECTBUSY" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="16" NAME="DBGC440DEBUGHALT" SIGNAME="__NOC__">
<DESCRIPTION>JTAG HALT</DESCRIPTION>
</PORT>
<PORT DIR="I" MPD_INDEX="17" NAME="DBGC440DEBUGHALTNEG" SIGNAME="__NOC__">
<DESCRIPTION>JTAG HALT INV</DESCRIPTION>
</PORT>
<PORT DIR="I" MPD_INDEX="18" NAME="DBGC440SYSTEMSTATUS" SIGNAME="__NOC__" VECFORMULA="[0:4]"/>
<PORT DIR="I" MPD_INDEX="19" NAME="DBGC440UNCONDDEBUGEVENT" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="20" NAME="C440DBGSYSTEMCONTROL" SIGNAME="__NOC__" VECFORMULA="[0:7]"/>
<PORT DIR="O" MPD_INDEX="21" NAME="SPLB0_Error" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT DIR="O" MPD_INDEX="22" NAME="SPLB1_Error" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT DIR="I" MPD_INDEX="23" NAME="EICC440CRITIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="O" MPD_INDEX="25" NAME="PPCEICINTERCONNECTIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="26" NAME="CPMDCRCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="27" NAME="DCRPPCDMACK" SIGNAME="__NOC__"/>
<PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="28" NAME="DCRPPCDMDBUSIN" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="29" NAME="DCRPPCDMTIMEOUTWAIT" SIGNAME="__NOC__"/>
<PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="30" NAME="PPCDMDCRREAD" SIGNAME="__NOC__"/>
<PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="31" NAME="PPCDMDCRWRITE" SIGNAME="__NOC__"/>
<PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="32" NAME="PPCDMDCRABUS" SIGNAME="__NOC__" VECFORMULA="[0:9]"/>
<PORT BUS="MDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="33" NAME="PPCDMDCRDBUSOUT" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="34" NAME="DCRPPCDSREAD" SIGNAME="__NOC__"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="35" NAME="DCRPPCDSWRITE" SIGNAME="__NOC__"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="36" NAME="DCRPPCDSABUS" SIGNAME="__NOC__" VECFORMULA="[0:9]"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="37" NAME="DCRPPCDSDBUSOUT" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="38" NAME="PPCDSDCRACK" SIGNAME="__NOC__"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="39" NAME="PPCDSDCRDBUSIN" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="SDCR" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="40" NAME="PPCDSDCRTIMEOUTWAIT" SIGNAME="__NOC__"/>
<PORT BUS="MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="41" NAME="CPMFCMCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="42" NAME="FCMAPUCR" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="43" NAME="FCMAPUDONE" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="44" NAME="FCMAPUEXCEPTION" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="45" NAME="FCMAPUFPSCRFEX" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="46" NAME="FCMAPURESULT" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="47" NAME="FCMAPURESULTVALID" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="48" NAME="FCMAPUSLEEPNOTREADY" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="49" NAME="FCMAPUCONFIRMINSTR" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="50" NAME="FCMAPUSTOREDATA" SIGNAME="__NOC__" VECFORMULA="[0:127]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="51" NAME="APUFCMDECNONAUTON" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="52" NAME="APUFCMDECFPUOP" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="53" NAME="APUFCMDECLDSTXFERSIZE" SIGNAME="__NOC__" VECFORMULA="[0:2]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="54" NAME="APUFCMDECLOAD" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="55" NAME="APUFCMNEXTINSTRREADY" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="56" NAME="APUFCMDECSTORE" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="57" NAME="APUFCMDECUDI" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="58" NAME="APUFCMDECUDIVALID" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="59" NAME="APUFCMENDIAN" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="60" NAME="APUFCMFLUSH" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="61" NAME="APUFCMINSTRUCTION" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="62" NAME="APUFCMINSTRVALID" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="63" NAME="APUFCMLOADBYTEADDR" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="64" NAME="APUFCMLOADDATA" SIGNAME="__NOC__" VECFORMULA="[0:127]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="65" NAME="APUFCMLOADDVALID" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="66" NAME="APUFCMOPERANDVALID" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="67" NAME="APUFCMRADATA" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="68" NAME="APUFCMRBDATA" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="69" NAME="APUFCMWRITEBACKOK" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="70" NAME="APUFCMMSRFE0" SIGNAME="__NOC__"/>
<PORT BUS="MFCM:MFCB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="71" NAME="APUFCMMSRFE1" SIGNAME="__NOC__"/>
<PORT BUS="JTAGPPC" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TCK" DIR="I" MPD_INDEX="72" NAME="JTGC440TCK" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TCK">
<DESCRIPTION>JTAG TCK</DESCRIPTION>
</PORT>
<PORT BUS="JTAGPPC" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TDI" DIR="I" MPD_INDEX="73" NAME="JTGC440TDI" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TDI">
<DESCRIPTION>JTAG TDI</DESCRIPTION>
</PORT>
<PORT BUS="JTAGPPC" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TMS" DIR="I" MPD_INDEX="74" NAME="JTGC440TMS" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TMS">
<DESCRIPTION>JTAG TMS</DESCRIPTION>
</PORT>
<PORT BUS="JTAGPPC" DEF_SIGNAME="ppc440_0_jtagppc_bus_JTGC405TRSTNEG" DIR="I" MPD_INDEX="75" NAME="JTGC440TRSTNEG" SIGNAME="ppc440_0_jtagppc_bus_JTGC405TRSTNEG">
<DESCRIPTION>JTAG TRST</DESCRIPTION>
</PORT>
<PORT BUS="JTAGPPC" DEF_SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDO" DIR="O" MPD_INDEX="76" NAME="C440JTGTDO" SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDO">
<DESCRIPTION>JTAG TDO</DESCRIPTION>
</PORT>
<PORT BUS="JTAGPPC" DEF_SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDOEN" DIR="O" MPD_INDEX="77" NAME="C440JTGTDOEN" SIGNAME="ppc440_0_jtagppc_bus_C405JTGTDOEN"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MCMIREADDATA" DIR="I" MPD_INDEX="79" NAME="MCMIREADDATA" SIGNAME="ppc440_0_PPC440MC_MCMIREADDATA" VECFORMULA="[0:127]"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MCMIREADDATAVALID" DIR="I" MPD_INDEX="80" NAME="MCMIREADDATAVALID" SIGNAME="ppc440_0_PPC440MC_MCMIREADDATAVALID"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MCMIREADDATAERR" DIR="I" MPD_INDEX="81" NAME="MCMIREADDATAERR" SIGNAME="ppc440_0_PPC440MC_MCMIREADDATAERR"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MCMIADDRREADYTOACCEPT" DIR="I" MPD_INDEX="82" NAME="MCMIADDRREADYTOACCEPT" SIGNAME="ppc440_0_PPC440MC_MCMIADDRREADYTOACCEPT"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCREADNOTWRITE" DIR="O" MPD_INDEX="83" NAME="MIMCREADNOTWRITE" SIGNAME="ppc440_0_PPC440MC_MIMCREADNOTWRITE"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCADDRESS" DIR="O" MPD_INDEX="84" NAME="MIMCADDRESS" SIGNAME="ppc440_0_PPC440MC_MIMCADDRESS" VECFORMULA="[0:35]"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCADDRESSVALID" DIR="O" MPD_INDEX="85" NAME="MIMCADDRESSVALID" SIGNAME="ppc440_0_PPC440MC_MIMCADDRESSVALID"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCWRITEDATA" DIR="O" MPD_INDEX="86" NAME="MIMCWRITEDATA" SIGNAME="ppc440_0_PPC440MC_MIMCWRITEDATA" VECFORMULA="[0:127]"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCWRITEDATAVALID" DIR="O" MPD_INDEX="87" NAME="MIMCWRITEDATAVALID" SIGNAME="ppc440_0_PPC440MC_MIMCWRITEDATAVALID"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCBYTEENABLE" DIR="O" MPD_INDEX="88" NAME="MIMCBYTEENABLE" SIGNAME="ppc440_0_PPC440MC_MIMCBYTEENABLE" VECFORMULA="[0:15]"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCBANKCONFLICT" DIR="O" MPD_INDEX="89" NAME="MIMCBANKCONFLICT" SIGNAME="ppc440_0_PPC440MC_MIMCBANKCONFLICT"/>
<PORT BUS="PPC440MC" DEF_SIGNAME="ppc440_0_PPC440MC_MIMCROWCONFLICT" DIR="O" MPD_INDEX="90" NAME="MIMCROWCONFLICT" SIGNAME="ppc440_0_PPC440MC_MIMCROWCONFLICT"/>
<PORT BUS="MPLB" CLKFREQUENCY="100000000" DEF_SIGNAME="clk_100_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="91" NAME="CPMPPCMPLBCLK" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0_ADJUST"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MBusy" DIR="I" MPD_INDEX="92" NAME="PLBPPCMMBUSY" SIGNAME="plb_v46_0_PLB_MBusy"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MIRQ" DIR="I" MPD_INDEX="93" NAME="PLBPPCMMIRQ" SIGNAME="plb_v46_0_PLB_MIRQ"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MRdErr" DIR="I" MPD_INDEX="94" NAME="PLBPPCMMRDERR" SIGNAME="plb_v46_0_PLB_MRdErr"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MWrErr" DIR="I" MPD_INDEX="95" NAME="PLBPPCMMWRERR" SIGNAME="plb_v46_0_PLB_MWrErr"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MAddrAck" DIR="I" MPD_INDEX="96" NAME="PLBPPCMADDRACK" SIGNAME="plb_v46_0_PLB_MAddrAck"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MRdBTerm" DIR="I" MPD_INDEX="97" NAME="PLBPPCMRDBTERM" SIGNAME="plb_v46_0_PLB_MRdBTerm"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MRdDAck" DIR="I" MPD_INDEX="98" NAME="PLBPPCMRDDACK" SIGNAME="plb_v46_0_PLB_MRdDAck"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MRdDBus" DIR="I" MPD_INDEX="99" NAME="PLBPPCMRDDBUS" SIGNAME="plb_v46_0_PLB_MRdDBus" VECFORMULA="[0:127]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MRdWdAddr" DIR="I" MPD_INDEX="100" NAME="PLBPPCMRDWDADDR" SIGNAME="plb_v46_0_PLB_MRdWdAddr" VECFORMULA="[0:3]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MRearbitrate" DIR="I" MPD_INDEX="101" NAME="PLBPPCMREARBITRATE" SIGNAME="plb_v46_0_PLB_MRearbitrate"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MSSize" DIR="I" MPD_INDEX="102" NAME="PLBPPCMSSIZE" SIGNAME="plb_v46_0_PLB_MSSize" VECFORMULA="[0:1]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MTimeout" DIR="I" MPD_INDEX="103" NAME="PLBPPCMTIMEOUT" SIGNAME="plb_v46_0_PLB_MTimeout"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MWrBTerm" DIR="I" MPD_INDEX="104" NAME="PLBPPCMWRBTERM" SIGNAME="plb_v46_0_PLB_MWrBTerm"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_MWrDAck" DIR="I" MPD_INDEX="105" NAME="PLBPPCMWRDACK" SIGNAME="plb_v46_0_PLB_MWrDAck"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="106" NAME="PLBPPCMRDPENDPRI" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="107" NAME="PLBPPCMRDPENDREQ" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="108" NAME="PLBPPCMREQPRI" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="109" NAME="PLBPPCMWRPENDPRI" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="110" NAME="PLBPPCMWRPENDREQ" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_abort" DIR="O" MPD_INDEX="111" NAME="PPCMPLBABORT" SIGNAME="plb_v46_0_M_abort"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_ABus" DIR="O" MPD_INDEX="112" NAME="PPCMPLBABUS" SIGNAME="plb_v46_0_M_ABus" VECFORMULA="[0:31]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_BE" DIR="O" MPD_INDEX="113" NAME="PPCMPLBBE" SIGNAME="plb_v46_0_M_BE" VECFORMULA="[0:15]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_busLock" DIR="O" MPD_INDEX="114" NAME="PPCMPLBBUSLOCK" SIGNAME="plb_v46_0_M_busLock"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_lockErr" DIR="O" MPD_INDEX="115" NAME="PPCMPLBLOCKERR" SIGNAME="plb_v46_0_M_lockErr"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_MSize" DIR="O" MPD_INDEX="116" NAME="PPCMPLBMSIZE" SIGNAME="plb_v46_0_M_MSize" VECFORMULA="[0:1]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_priority" DIR="O" MPD_INDEX="117" NAME="PPCMPLBPRIORITY" SIGNAME="plb_v46_0_M_priority" VECFORMULA="[0:1]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_rdBurst" DIR="O" MPD_INDEX="118" NAME="PPCMPLBRDBURST" SIGNAME="plb_v46_0_M_rdBurst"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_request" DIR="O" MPD_INDEX="119" NAME="PPCMPLBREQUEST" SIGNAME="plb_v46_0_M_request"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_RNW" DIR="O" MPD_INDEX="120" NAME="PPCMPLBRNW" SIGNAME="plb_v46_0_M_RNW"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_size" DIR="O" MPD_INDEX="121" NAME="PPCMPLBSIZE" SIGNAME="plb_v46_0_M_size" VECFORMULA="[0:3]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_TAttribute" DIR="O" MPD_INDEX="122" NAME="PPCMPLBTATTRIBUTE" SIGNAME="plb_v46_0_M_TAttribute" VECFORMULA="[0:15]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_type" DIR="O" MPD_INDEX="123" NAME="PPCMPLBTYPE" SIGNAME="plb_v46_0_M_type" VECFORMULA="[0:2]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_UABus" DIR="O" MPD_INDEX="124" NAME="PPCMPLBUABUS" SIGNAME="plb_v46_0_M_UABus" VECFORMULA="[0:31]"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_wrBurst" DIR="O" MPD_INDEX="125" NAME="PPCMPLBWRBURST" SIGNAME="plb_v46_0_M_wrBurst"/>
<PORT BUS="MPLB" DEF_SIGNAME="plb_v46_0_M_wrDBus" DIR="O" MPD_INDEX="126" NAME="PPCMPLBWRDBUS" SIGNAME="plb_v46_0_M_wrDBus" VECFORMULA="[0:127]"/>
<PORT BUS="SPLB0" CLKFREQUENCY="100000000" DEF_SIGNAME="clk_100_0000MHzPLL0_ADJUST" DIR="I" MPD_INDEX="127" NAME="CPMPPCS0PLBCLK" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0_ADJUST"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_masterID" DIR="I" MPD_INDEX="128" NAME="PLBPPCS0MASTERID" SIGNAME="plb_v46_0_PLB_masterID" VECFORMULA="[0:(C_SPLB0_MID_WIDTH-1)]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_PAValid" DIR="I" MPD_INDEX="129" NAME="PLBPPCS0PAVALID" SIGNAME="plb_v46_0_PLB_PAValid"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_SAValid" DIR="I" MPD_INDEX="130" NAME="PLBPPCS0SAVALID" SIGNAME="plb_v46_0_PLB_SAValid"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_rdPendReq" DIR="I" MPD_INDEX="131" NAME="PLBPPCS0RDPENDREQ" SIGNAME="plb_v46_0_PLB_rdPendReq"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_wrPendReq" DIR="I" MPD_INDEX="132" NAME="PLBPPCS0WRPENDREQ" SIGNAME="plb_v46_0_PLB_wrPendReq"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_rdPendPri" DIR="I" MPD_INDEX="133" NAME="PLBPPCS0RDPENDPRI" SIGNAME="plb_v46_0_PLB_rdPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_wrPendPri" DIR="I" MPD_INDEX="134" NAME="PLBPPCS0WRPENDPRI" SIGNAME="plb_v46_0_PLB_wrPendPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_reqPri" DIR="I" MPD_INDEX="135" NAME="PLBPPCS0REQPRI" SIGNAME="plb_v46_0_PLB_reqPri" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_rdPrim" DIR="I" MPD_INDEX="136" NAME="PLBPPCS0RDPRIM" SIGNAME="plb_v46_0_PLB_rdPrim"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_wrPrim" DIR="I" MPD_INDEX="137" NAME="PLBPPCS0WRPRIM" SIGNAME="plb_v46_0_PLB_wrPrim"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_busLock" DIR="I" MPD_INDEX="138" NAME="PLBPPCS0BUSLOCK" SIGNAME="plb_v46_0_PLB_busLock"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_abort" DIR="I" MPD_INDEX="139" NAME="PLBPPCS0ABORT" SIGNAME="plb_v46_0_PLB_abort"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_RNW" DIR="I" MPD_INDEX="140" NAME="PLBPPCS0RNW" SIGNAME="plb_v46_0_PLB_RNW"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_BE" DIR="I" MPD_INDEX="141" NAME="PLBPPCS0BE" SIGNAME="plb_v46_0_PLB_BE" VECFORMULA="[0:15]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_size" DIR="I" MPD_INDEX="142" NAME="PLBPPCS0SIZE" SIGNAME="plb_v46_0_PLB_size" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_type" DIR="I" MPD_INDEX="143" NAME="PLBPPCS0TYPE" SIGNAME="plb_v46_0_PLB_type" VECFORMULA="[0:2]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_TAttribute" DIR="I" MPD_INDEX="144" NAME="PLBPPCS0TATTRIBUTE" SIGNAME="plb_v46_0_PLB_TAttribute" VECFORMULA="[0:15]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_lockErr" DIR="I" MPD_INDEX="145" NAME="PLBPPCS0LOCKERR" SIGNAME="plb_v46_0_PLB_lockErr"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_MSize" DIR="I" MPD_INDEX="146" NAME="PLBPPCS0MSIZE" SIGNAME="plb_v46_0_PLB_MSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_UABus" DIR="I" MPD_INDEX="147" NAME="PLBPPCS0UABUS" SIGNAME="plb_v46_0_PLB_UABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_ABus" DIR="I" MPD_INDEX="148" NAME="PLBPPCS0ABUS" SIGNAME="plb_v46_0_PLB_ABus" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_wrDBus" DIR="I" MPD_INDEX="149" NAME="PLBPPCS0WRDBUS" SIGNAME="plb_v46_0_PLB_wrDBus" VECFORMULA="[0:127]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_wrBurst" DIR="I" MPD_INDEX="150" NAME="PLBPPCS0WRBURST" SIGNAME="plb_v46_0_PLB_wrBurst"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_PLB_rdBurst" DIR="I" MPD_INDEX="151" NAME="PLBPPCS0RDBURST" SIGNAME="plb_v46_0_PLB_rdBurst"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_Sl_addrAck" DIR="O" MPD_INDEX="152" NAME="PPCS0PLBADDRACK" SIGNAME="plb_v46_0_Sl_addrAck"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_Sl_wait" DIR="O" MPD_INDEX="153" NAME="PPCS0PLBWAIT" SIGNAME="plb_v46_0_Sl_wait"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_Sl_rearbitrate" DIR="O" MPD_INDEX="154" NAME="PPCS0PLBREARBITRATE" SIGNAME="plb_v46_0_Sl_rearbitrate"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_Sl_wrDAck" DIR="O" MPD_INDEX="155" NAME="PPCS0PLBWRDACK" SIGNAME="plb_v46_0_Sl_wrDAck"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_Sl_wrComp" DIR="O" MPD_INDEX="156" NAME="PPCS0PLBWRCOMP" SIGNAME="plb_v46_0_Sl_wrComp"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_Sl_rdDBus" DIR="O" MPD_INDEX="157" NAME="PPCS0PLBRDDBUS" SIGNAME="plb_v46_0_Sl_rdDBus" VECFORMULA="[0:127]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_Sl_rdWdAddr" DIR="O" MPD_INDEX="158" NAME="PPCS0PLBRDWDADDR" SIGNAME="plb_v46_0_Sl_rdWdAddr" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_Sl_rdDAck" DIR="O" MPD_INDEX="159" NAME="PPCS0PLBRDDACK" SIGNAME="plb_v46_0_Sl_rdDAck"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_Sl_rdComp" DIR="O" MPD_INDEX="160" NAME="PPCS0PLBRDCOMP" SIGNAME="plb_v46_0_Sl_rdComp"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_Sl_rdBTerm" DIR="O" MPD_INDEX="161" NAME="PPCS0PLBRDBTERM" SIGNAME="plb_v46_0_Sl_rdBTerm"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_Sl_wrBTerm" DIR="O" MPD_INDEX="162" NAME="PPCS0PLBWRBTERM" SIGNAME="plb_v46_0_Sl_wrBTerm"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_Sl_MBusy" DIR="O" MPD_INDEX="163" NAME="PPCS0PLBMBUSY" SIGNAME="plb_v46_0_Sl_MBusy" VECFORMULA="[0:(C_SPLB0_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_Sl_MRdErr" DIR="O" MPD_INDEX="164" NAME="PPCS0PLBMRDERR" SIGNAME="plb_v46_0_Sl_MRdErr" VECFORMULA="[0:(C_SPLB0_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_Sl_MWrErr" DIR="O" MPD_INDEX="165" NAME="PPCS0PLBMWRERR" SIGNAME="plb_v46_0_Sl_MWrErr" VECFORMULA="[0:(C_SPLB0_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_Sl_MIRQ" DIR="O" MPD_INDEX="166" NAME="PPCS0PLBMIRQ" SIGNAME="plb_v46_0_Sl_MIRQ" VECFORMULA="[0:(C_SPLB0_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB0" DEF_SIGNAME="plb_v46_0_Sl_SSize" DIR="O" MPD_INDEX="167" NAME="PPCS0PLBSSIZE" SIGNAME="plb_v46_0_Sl_SSize" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="168" NAME="CPMPPCS1PLBCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="169" NAME="PLBPPCS1MASTERID" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB1_MID_WIDTH-1)]"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="170" NAME="PLBPPCS1PAVALID" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="171" NAME="PLBPPCS1SAVALID" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="172" NAME="PLBPPCS1RDPENDREQ" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="173" NAME="PLBPPCS1WRPENDREQ" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="174" NAME="PLBPPCS1RDPENDPRI" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="175" NAME="PLBPPCS1WRPENDPRI" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="176" NAME="PLBPPCS1REQPRI" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="177" NAME="PLBPPCS1RDPRIM" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="178" NAME="PLBPPCS1WRPRIM" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="179" NAME="PLBPPCS1BUSLOCK" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="180" NAME="PLBPPCS1ABORT" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="181" NAME="PLBPPCS1RNW" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="182" NAME="PLBPPCS1BE" SIGNAME="__NOC__" VECFORMULA="[0:15]"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="183" NAME="PLBPPCS1SIZE" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="184" NAME="PLBPPCS1TYPE" SIGNAME="__NOC__" VECFORMULA="[0:2]"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="185" NAME="PLBPPCS1TATTRIBUTE" SIGNAME="__NOC__" VECFORMULA="[0:15]"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="186" NAME="PLBPPCS1LOCKERR" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="187" NAME="PLBPPCS1MSIZE" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="188" NAME="PLBPPCS1UABUS" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="189" NAME="PLBPPCS1ABUS" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="190" NAME="PLBPPCS1WRDBUS" SIGNAME="__NOC__" VECFORMULA="[0:127]"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="191" NAME="PLBPPCS1WRBURST" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="192" NAME="PLBPPCS1RDBURST" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="193" NAME="PPCS1PLBADDRACK" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="194" NAME="PPCS1PLBWAIT" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="195" NAME="PPCS1PLBREARBITRATE" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="196" NAME="PPCS1PLBWRDACK" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="197" NAME="PPCS1PLBWRCOMP" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="198" NAME="PPCS1PLBRDDBUS" SIGNAME="__NOC__" VECFORMULA="[0:127]"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="199" NAME="PPCS1PLBRDWDADDR" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="200" NAME="PPCS1PLBRDDACK" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="201" NAME="PPCS1PLBRDCOMP" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="202" NAME="PPCS1PLBRDBTERM" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="203" NAME="PPCS1PLBWRBTERM" SIGNAME="__NOC__"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="204" NAME="PPCS1PLBMBUSY" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB1_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="205" NAME="PPCS1PLBMRDERR" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB1_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="206" NAME="PPCS1PLBMWRERR" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB1_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="207" NAME="PPCS1PLBMIRQ" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB1_NUM_MASTERS-1)]"/>
<PORT BUS="SPLB1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="208" NAME="PPCS1PLBSSIZE" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
<PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="209" NAME="CPMDMA0LLCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="210" NAME="LLDMA0TXDSTRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="211" NAME="LLDMA0RXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="212" NAME="LLDMA0RXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="213" NAME="LLDMA0RXSOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="214" NAME="LLDMA0RXEOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="215" NAME="LLDMA0RXSOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="216" NAME="LLDMA0RXEOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="217" NAME="LLDMA0RXSRCRDYN" SIGNAME="__NOC__"/>
<PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="218" NAME="LLDMA0RSTENGINEREQ" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="219" NAME="DMA0LLTXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="220" NAME="DMA0LLTXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="221" NAME="DMA0LLTXSOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="222" NAME="DMA0LLTXEOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="223" NAME="DMA0LLTXSOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="224" NAME="DMA0LLTXEOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="225" NAME="DMA0LLTXSRCRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="226" NAME="DMA0LLRXDSTRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA0" DEF_SIGNAME="__BUS__" DIR="O" IS_VALID="FALSE" MPD_INDEX="227" NAME="DMA0LLRSTENGINEACK" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="228" NAME="DMA0TXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="229" NAME="DMA0RXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="230" NAME="CPMDMA1LLCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="231" NAME="LLDMA1TXDSTRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="232" NAME="LLDMA1RXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="233" NAME="LLDMA1RXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="234" NAME="LLDMA1RXSOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="235" NAME="LLDMA1RXEOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="236" NAME="LLDMA1RXSOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="237" NAME="LLDMA1RXEOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="238" NAME="LLDMA1RXSRCRDYN" SIGNAME="__NOC__"/>
<PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="239" NAME="LLDMA1RSTENGINEREQ" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="240" NAME="DMA1LLTXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="241" NAME="DMA1LLTXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="242" NAME="DMA1LLTXSOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="243" NAME="DMA1LLTXEOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="244" NAME="DMA1LLTXSOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="245" NAME="DMA1LLTXEOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="246" NAME="DMA1LLTXSRCRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="247" NAME="DMA1LLRXDSTRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA1" DEF_SIGNAME="__BUS__" DIR="O" IS_VALID="FALSE" MPD_INDEX="248" NAME="DMA1LLRSTENGINEACK" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="249" NAME="DMA1TXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="250" NAME="DMA1RXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="251" NAME="CPMDMA2LLCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="252" NAME="LLDMA2TXDSTRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="253" NAME="LLDMA2RXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="254" NAME="LLDMA2RXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="255" NAME="LLDMA2RXSOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="256" NAME="LLDMA2RXEOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="257" NAME="LLDMA2RXSOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="258" NAME="LLDMA2RXEOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="259" NAME="LLDMA2RXSRCRDYN" SIGNAME="__NOC__"/>
<PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="260" NAME="LLDMA2RSTENGINEREQ" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="261" NAME="DMA2LLTXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="262" NAME="DMA2LLTXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="263" NAME="DMA2LLTXSOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="264" NAME="DMA2LLTXEOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="265" NAME="DMA2LLTXSOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="266" NAME="DMA2LLTXEOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="267" NAME="DMA2LLTXSRCRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="268" NAME="DMA2LLRXDSTRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA2" DEF_SIGNAME="__BUS__" DIR="O" IS_VALID="FALSE" MPD_INDEX="269" NAME="DMA2LLRSTENGINEACK" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="270" NAME="DMA2TXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="271" NAME="DMA2RXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="272" NAME="CPMDMA3LLCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="273" NAME="LLDMA3TXDSTRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="274" NAME="LLDMA3RXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="275" NAME="LLDMA3RXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="276" NAME="LLDMA3RXSOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="277" NAME="LLDMA3RXEOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="278" NAME="LLDMA3RXSOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="279" NAME="LLDMA3RXEOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="280" NAME="LLDMA3RXSRCRDYN" SIGNAME="__NOC__"/>
<PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="281" NAME="LLDMA3RSTENGINEREQ" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="282" NAME="DMA3LLTXD" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="283" NAME="DMA3LLTXREM" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="284" NAME="DMA3LLTXSOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="285" NAME="DMA3LLTXEOFN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="286" NAME="DMA3LLTXSOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="287" NAME="DMA3LLTXEOPN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="288" NAME="DMA3LLTXSRCRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="289" NAME="DMA3LLRXDSTRDYN" SIGNAME="__NOC__"/>
<PORT BUS="LLDMA3" DEF_SIGNAME="__BUS__" DIR="O" IS_VALID="FALSE" MPD_INDEX="290" NAME="DMA3LLRSTENGINEACK" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="291" NAME="DMA3TXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="292" NAME="DMA3RXIRQ" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
<PORT BUS="RESETPPC" DEF_SIGNAME="ppc_reset_bus_RstcPPCresetcore" DIR="I" MPD_INDEX="293" NAME="RSTC440RESETCORE" SIGIS="RST" SIGNAME="ppc_reset_bus_RstcPPCresetcore"/>
<PORT BUS="RESETPPC" DEF_SIGNAME="ppc_reset_bus_RstsPPCresetchip" DIR="I" MPD_INDEX="294" NAME="RSTC440RESETCHIP" SIGIS="RST" SIGNAME="ppc_reset_bus_RstsPPCresetchip"/>
<PORT BUS="RESETPPC" DEF_SIGNAME="ppc_reset_bus_RstcPPCresetsys" DIR="I" MPD_INDEX="295" NAME="RSTC440RESETSYSTEM" SIGIS="RST" SIGNAME="ppc_reset_bus_RstcPPCresetsys"/>
<PORT BUS="RESETPPC" DEF_SIGNAME="ppc_reset_bus_Core_Reset_Req" DIR="O" MPD_INDEX="296" NAME="C440RSTCORERESETREQ" SIGIS="RST" SIGNAME="ppc_reset_bus_Core_Reset_Req"/>
<PORT BUS="RESETPPC" DEF_SIGNAME="ppc_reset_bus_Chip_Reset_Req" DIR="O" MPD_INDEX="297" NAME="C440RSTCHIPRESETREQ" SIGIS="RST" SIGNAME="ppc_reset_bus_Chip_Reset_Req"/>
<PORT BUS="RESETPPC" DEF_SIGNAME="ppc_reset_bus_System_Reset_Req" DIR="O" MPD_INDEX="298" NAME="C440RSTSYSTEMRESETREQ" SIGIS="RST" SIGNAME="ppc_reset_bus_System_Reset_Req"/>
<PORT DIR="I" MPD_INDEX="299" NAME="TRCC440TRACEDISABLE" SIGNAME="__NOC__"/>
<PORT DIR="I" MPD_INDEX="300" NAME="TRCC440TRIGGEREVENTIN" SIGNAME="__NOC__">
<DESCRIPTION>Trace Trigger Event In</DESCRIPTION>
</PORT>
<PORT DIR="O" MPD_INDEX="301" NAME="C440TRCBRANCHSTATUS" SIGNAME="__NOC__" VECFORMULA="[0:2]">
<DESCRIPTION>Trace Branch Status</DESCRIPTION>
</PORT>
<PORT DIR="O" MPD_INDEX="302" NAME="C440TRCCYCLE" SIGNAME="__NOC__">
<DESCRIPTION>Trace Clock</DESCRIPTION>
</PORT>
<PORT DIR="O" MPD_INDEX="303" NAME="C440TRCEXECUTIONSTATUS" SIGNAME="__NOC__" VECFORMULA="[0:4]">
<DESCRIPTION>Trace Execution Status</DESCRIPTION>
</PORT>
<PORT DIR="O" MPD_INDEX="304" NAME="C440TRCTRACESTATUS" SIGNAME="__NOC__" VECFORMULA="[0:6]">
<DESCRIPTION>Trace Status</DESCRIPTION>
</PORT>
<PORT DIR="O" MPD_INDEX="305" NAME="C440TRCTRIGGEREVENTOUT" SIGNAME="__NOC__">
<DESCRIPTION>Trace Trigger Event Out</DESCRIPTION>
</PORT>
<PORT DIR="O" MPD_INDEX="306" NAME="C440TRCTRIGGEREVENTTYPE" SIGNAME="__NOC__" VECFORMULA="[0:13]"/>
</PORTS>
<BUSINTERFACES>
<BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_DATA="TRUE" IS_INSTANTIATED="TRUE" IS_INSTRUCTION="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="MPLB" TYPE="MASTER"/>
<BUSINTERFACE BUSNAME="ppc440_0_PPC440MC" BUSSTD="XIL" BUSSTD_PSF="XIL_PPC440MC" IS_DATA="TRUE" IS_INSTANTIATED="TRUE" IS_INSTRUCTION="TRUE" MHS_INDEX="1" MPD_INDEX="3" NAME="PPC440MC" TYPE="INITIATOR"/>
<BUSINTERFACE BUSNAME="ppc440_0_jtagppc_bus" BUSSTD="XIL" BUSSTD_PSF="XIL_JTAGPPC" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="12" NAME="JTAGPPC" TYPE="TARGET"/>
<BUSINTERFACE BUSNAME="ppc_reset_bus" BUSSTD="XIL" BUSSTD_PSF="XIL_RESETPPC" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="13" NAME="RESETPPC" TYPE="TARGET"/>
<BUSINTERFACE BUSNAME="plb_v46_0" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="1" NAME="SPLB0" TYPE="SLAVE"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" MPD_INDEX="2" NAME="SPLB1" TYPE="SLAVE"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_LL_DMA" IS_VALID="FALSE" MPD_INDEX="4" NAME="LLDMA0" TYPE="TARGET"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_LL_DMA" IS_VALID="FALSE" MPD_INDEX="5" NAME="LLDMA1" TYPE="TARGET"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_LL_DMA" IS_VALID="FALSE" MPD_INDEX="6" NAME="LLDMA2" TYPE="TARGET"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_LL_DMA" IS_VALID="FALSE" MPD_INDEX="7" NAME="LLDMA3" TYPE="TARGET"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="DCR" BUSSTD_PSF="DCR" MPD_INDEX="8" NAME="MDCR" TYPE="MASTER"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="DCR" BUSSTD_PSF="DCR" MPD_INDEX="9" NAME="SDCR" TYPE="SLAVE"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FCB" BUSSTD_PSF="FCB2" MPD_INDEX="10" NAME="MFCB" TYPE="MASTER"/>
<BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_FCM2" MPD_INDEX="11" NAME="MFCM" TYPE="INITIATOR"/>
</BUSINTERFACES>
<MEMORYMAP>
<MEMRANGE BASEDECIMAL="0" BASENAME="C_IDCR_BASEADDR" BASEVALUE="0b0000000000" HIGHDECIMAL="255" HIGHNAME="C_IDCR_HIGHADDR" HIGHVALUE="0b0011111111" INSTANCE="ppc440_0" MEMTYPE="REGISTER" MINSIZE="0x100" SIZE="256" SIZEABRV="256">
<SLAVES>
<SLAVE BUSINTERFACE="SDCR"/>
<SLAVE BUSINTERFACE="MDCR"/>
</SLAVES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="0" BASENAME="C_SPLB0_RNG_MC_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="268435455" HIGHNAME="C_SPLB0_RNG_MC_HIGHADDR" HIGHVALUE="0x0FFFFFFF" INSTANCE="ppc440_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" MINSIZE="0x08000000" SIZE="268435456" SIZEABRV="256M">
<SLAVES>
<SLAVE BUSINTERFACE="SPLB0"/>
</SLAVES>
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB0_RNG0_MPLB_BASEADDR" BASEVALUE="0xffffffff" BRIDGE_TO="MPLB" HIGHDECIMAL="2684354559" HIGHNAME="C_SPLB0_RNG0_MPLB_HIGHADDR" HIGHVALUE="0x9fffffff" INSTANCE="ppc440_0" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
<SLAVES>
<SLAVE BUSINTERFACE="SPLB0"/>
</SLAVES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB0_RNG1_MPLB_BASEADDR" BASEVALUE="0xffffffff" BRIDGE_TO="MPLB" HIGHDECIMAL="0" HIGHNAME="C_SPLB0_RNG1_MPLB_HIGHADDR" HIGHVALUE="0x00000000" INSTANCE="ppc440_0" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
<SLAVES>
<SLAVE BUSINTERFACE="SPLB0"/>
</SLAVES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB0_RNG2_MPLB_BASEADDR" BASEVALUE="0xffffffff" BRIDGE_TO="MPLB" HIGHDECIMAL="0" HIGHNAME="C_SPLB0_RNG2_MPLB_HIGHADDR" HIGHVALUE="0x00000000" INSTANCE="ppc440_0" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
<SLAVES>
<SLAVE BUSINTERFACE="SPLB0"/>
</SLAVES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB0_RNG3_MPLB_BASEADDR" BASEVALUE="0xffffffff" BRIDGE_TO="MPLB" HIGHDECIMAL="0" HIGHNAME="C_SPLB0_RNG3_MPLB_HIGHADDR" HIGHVALUE="0x00000000" INSTANCE="ppc440_0" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
<SLAVES>
<SLAVE BUSINTERFACE="SPLB0"/>
</SLAVES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB1_RNG_MC_BASEADDR" BASEVALUE="0xffffffff" HIGHDECIMAL="0" HIGHNAME="C_SPLB1_RNG_MC_HIGHADDR" HIGHVALUE="0x00000000" INSTANCE="ppc440_0" MEMTYPE="REGISTER" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
<SLAVES>
<SLAVE BUSINTERFACE="SPLB1"/>
</SLAVES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB1_RNG0_MPLB_BASEADDR" BASEVALUE="0xffffffff" BRIDGE_TO="MPLB" HIGHDECIMAL="0" HIGHNAME="C_SPLB1_RNG0_MPLB_HIGHADDR" HIGHVALUE="0x00000000" INSTANCE="ppc440_0" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
<SLAVES>
<SLAVE BUSINTERFACE="SPLB1"/>
</SLAVES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB1_RNG1_MPLB_BASEADDR" BASEVALUE="0xffffffff" BRIDGE_TO="MPLB" HIGHDECIMAL="0" HIGHNAME="C_SPLB1_RNG1_MPLB_HIGHADDR" HIGHVALUE="0x00000000" INSTANCE="ppc440_0" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
<SLAVES>
<SLAVE BUSINTERFACE="SPLB1"/>
</SLAVES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB1_RNG2_MPLB_BASEADDR" BASEVALUE="0xffffffff" BRIDGE_TO="MPLB" HIGHDECIMAL="0" HIGHNAME="C_SPLB1_RNG2_MPLB_HIGHADDR" HIGHVALUE="0x00000000" INSTANCE="ppc440_0" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
<SLAVES>
<SLAVE BUSINTERFACE="SPLB1"/>
</SLAVES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB1_RNG3_MPLB_BASEADDR" BASEVALUE="0xffffffff" BRIDGE_TO="MPLB" HIGHDECIMAL="0" HIGHNAME="C_SPLB1_RNG3_MPLB_HIGHADDR" HIGHVALUE="0x00000000" INSTANCE="ppc440_0" IS_VALID="FALSE" MEMTYPE="BRIDGE" MINSIZE="0x08000000" SIZE="0" SIZEABRV="U">
<SLAVES>
<SLAVE BUSINTERFACE="SPLB1"/>
</SLAVES>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="4294901760" BASENAME="C_BASEADDR" BASEVALUE="0xffff0000" HIGHDECIMAL="4294967295" HIGHNAME="C_HIGHADDR" HIGHVALUE="0xffffffff" INSTANCE="xps_bram_if_cntlr_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2214592512" BASENAME="C_BASEADDR" BASEVALUE="0x84000000" HIGHDECIMAL="2214658047" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8400ffff" INSTANCE="RS232_Uart_1" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2168717312" BASENAME="C_BASEADDR" BASEVALUE="0x81440000" HIGHDECIMAL="2168782847" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8144ffff" INSTANCE="LEDs_8Bit" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2168586240" BASENAME="C_BASEADDR" BASEVALUE="0x81420000" HIGHDECIMAL="2168651775" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8142ffff" INSTANCE="LEDs_Positions" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2168455168" BASENAME="C_BASEADDR" BASEVALUE="0x81400000" HIGHDECIMAL="2168520703" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8140ffff" INSTANCE="Push_Buttons_5Bit" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2168848384" BASENAME="C_BASEADDR" BASEVALUE="0x81460000" HIGHDECIMAL="2168913919" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8146ffff" INSTANCE="DIP_Switches_8Bit" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2170552320" BASENAME="C_BASEADDR" BASEVALUE="0x81600000" HIGHDECIMAL="2170617855" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8160ffff" INSTANCE="IIC_EEPROM" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2164260864" BASENAME="C_BASEADDR" BASEVALUE="0x81000000" HIGHDECIMAL="2164326399" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8100ffff" INSTANCE="Ethernet_MAC" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2204106752" BASENAME="C_BASEADDR" BASEVALUE="0x83600000" HIGHDECIMAL="2204172287" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8360ffff" INSTANCE="SysACE_CompactFlash" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2348810240" BASENAME="C_MEM0_BASEADDR" BASEVALUE="0x8c000000" HIGHDECIMAL="2382364671" HIGHNAME="C_MEM0_HIGHADDR" HIGHVALUE="0x8dffffff" INSTANCE="FLASH" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="33554432" SIZEABRV="32M">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2208301056" BASENAME="C_BASEADDR" BASEVALUE="0x83a00000" HIGHDECIMAL="2208366591" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x83a0ffff" INSTANCE="xps_timebase_wdt_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2210398208" BASENAME="C_BASEADDR" BASEVALUE="0x83c00000" HIGHDECIMAL="2210463743" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x83c0ffff" INSTANCE="xps_timer_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2172649472" BASENAME="C_BASEADDR" BASEVALUE="0x81800000" HIGHDECIMAL="2172715007" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x8180ffff" INSTANCE="xps_intc_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2262827008" BASENAME="C_SPLB_BASEADDR" BASEVALUE="0x86e00000" HIGHDECIMAL="2262892543" HIGHNAME="C_SPLB_HIGHADDR" HIGHVALUE="0x86e0ffff" INSTANCE="xps_tft_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="2258632704" BASENAME="C_BASEADDR" BASEVALUE="0x86a00000" HIGHDECIMAL="2258698239" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x86a0ffff" INSTANCE="xps_ps2_0" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="plb_v46_0"/>
</ACCESSROUTE>
</MEMRANGE>
<MEMRANGE BASEDECIMAL="0" BASENAME="C_MEM_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="268435455" HIGHNAME="C_MEM_HIGHADDR" HIGHVALUE="0x0fffffff" INSTANCE="DDR2_SDRAM" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="268435456" SIZEABRV="256M">
<ACCESSROUTE>
<ROUTEPNT INDEX="0" INSTANCE="ppc440_0_PPC440MC"/>
</ACCESSROUTE>
</MEMRANGE>
</MEMORYMAP>
<PERIPHERALS>
<PERIPHERAL INSTANCE="xps_bram_if_cntlr_1"/>
<PERIPHERAL INSTANCE="RS232_Uart_1"/>
<PERIPHERAL INSTANCE="LEDs_8Bit"/>
<PERIPHERAL INSTANCE="LEDs_Positions"/>
<PERIPHERAL INSTANCE="Push_Buttons_5Bit"/>
<PERIPHERAL INSTANCE="DIP_Switches_8Bit"/>
<PERIPHERAL INSTANCE="IIC_EEPROM"/>
<PERIPHERAL INSTANCE="Ethernet_MAC"/>
<PERIPHERAL INSTANCE="SysACE_CompactFlash"/>
<PERIPHERAL INSTANCE="FLASH"/>
<PERIPHERAL INSTANCE="xps_timebase_wdt_0"/>
<PERIPHERAL INSTANCE="xps_timer_0"/>
<PERIPHERAL INSTANCE="xps_intc_0"/>
<PERIPHERAL INSTANCE="xps_tft_0"/>
<PERIPHERAL INSTANCE="xps_ps2_0"/>
<PERIPHERAL INSTANCE="DDR2_SDRAM"/>
</PERIPHERALS>
<INTERRUPTINFO TYPE="TARGET">