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dmi_52.ptx
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dmi_52.ptx
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//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-19856038
// Cuda compilation tools, release 7.5, V7.5.17
// Based on LLVM 3.4svn
//
.version 4.3
.target sm_52
.address_size 64
// .weak cudaMalloc
.weak .func (.param .b32 func_retval0) cudaMalloc(
.param .b64 cudaMalloc_param_0,
.param .b64 cudaMalloc_param_1
)
{
.reg .b32 %r<2>;
mov.u32 %r1, 30;
st.param.b32 [func_retval0+0], %r1;
ret;
}
// .weak cudaFuncGetAttributes
.weak .func (.param .b32 func_retval0) cudaFuncGetAttributes(
.param .b64 cudaFuncGetAttributes_param_0,
.param .b64 cudaFuncGetAttributes_param_1
)
{
.reg .b32 %r<2>;
mov.u32 %r1, 30;
st.param.b32 [func_retval0+0], %r1;
ret;
}
// .weak cudaDeviceGetAttribute
.weak .func (.param .b32 func_retval0) cudaDeviceGetAttribute(
.param .b64 cudaDeviceGetAttribute_param_0,
.param .b32 cudaDeviceGetAttribute_param_1,
.param .b32 cudaDeviceGetAttribute_param_2
)
{
.reg .b32 %r<2>;
mov.u32 %r1, 30;
st.param.b32 [func_retval0+0], %r1;
ret;
}
// .weak cudaGetDevice
.weak .func (.param .b32 func_retval0) cudaGetDevice(
.param .b64 cudaGetDevice_param_0
)
{
.reg .b32 %r<2>;
mov.u32 %r1, 30;
st.param.b32 [func_retval0+0], %r1;
ret;
}
// .weak cudaOccupancyMaxActiveBlocksPerMultiprocessor
.weak .func (.param .b32 func_retval0) cudaOccupancyMaxActiveBlocksPerMultiprocessor(
.param .b64 cudaOccupancyMaxActiveBlocksPerMultiprocessor_param_0,
.param .b64 cudaOccupancyMaxActiveBlocksPerMultiprocessor_param_1,
.param .b32 cudaOccupancyMaxActiveBlocksPerMultiprocessor_param_2,
.param .b64 cudaOccupancyMaxActiveBlocksPerMultiprocessor_param_3
)
{
.reg .b32 %r<2>;
mov.u32 %r1, 30;
st.param.b32 [func_retval0+0], %r1;
ret;
}
// .weak cudaOccupancyMaxActiveBlocksPerMultiprocessorWithFlags
.weak .func (.param .b32 func_retval0) cudaOccupancyMaxActiveBlocksPerMultiprocessorWithFlags(
.param .b64 cudaOccupancyMaxActiveBlocksPerMultiprocessorWithFlags_param_0,
.param .b64 cudaOccupancyMaxActiveBlocksPerMultiprocessorWithFlags_param_1,
.param .b32 cudaOccupancyMaxActiveBlocksPerMultiprocessorWithFlags_param_2,
.param .b64 cudaOccupancyMaxActiveBlocksPerMultiprocessorWithFlags_param_3,
.param .b32 cudaOccupancyMaxActiveBlocksPerMultiprocessorWithFlags_param_4
)
{
.reg .b32 %r<2>;
mov.u32 %r1, 30;
st.param.b32 [func_retval0+0], %r1;
ret;
}
// .globl adddmi
.visible .entry adddmi(
.param .u64 adddmi_param_0,
.param .u64 adddmi_param_1,
.param .u64 adddmi_param_2,
.param .u64 adddmi_param_3,
.param .u64 adddmi_param_4,
.param .u64 adddmi_param_5,
.param .u64 adddmi_param_6,
.param .u64 adddmi_param_7,
.param .u64 adddmi_param_8,
.param .f32 adddmi_param_9,
.param .f32 adddmi_param_10,
.param .f32 adddmi_param_11,
.param .u32 adddmi_param_12,
.param .u32 adddmi_param_13,
.param .u32 adddmi_param_14,
.param .u8 adddmi_param_15
)
{
.reg .pred %p<42>;
.reg .b16 %rs<38>;
.reg .f32 %f<232>;
.reg .b32 %r<192>;
.reg .b64 %rd<85>;
ld.param.u64 %rd17, [adddmi_param_0];
ld.param.u64 %rd18, [adddmi_param_1];
ld.param.u64 %rd19, [adddmi_param_2];
ld.param.u64 %rd20, [adddmi_param_3];
ld.param.u64 %rd21, [adddmi_param_4];
ld.param.u64 %rd22, [adddmi_param_5];
ld.param.u64 %rd23, [adddmi_param_6];
ld.param.u8 %rs9, [adddmi_param_15];
ld.param.u64 %rd24, [adddmi_param_7];
ld.param.u64 %rd25, [adddmi_param_8];
ld.param.f32 %f101, [adddmi_param_9];
ld.param.f32 %f102, [adddmi_param_10];
ld.param.f32 %f103, [adddmi_param_11];
ld.param.u32 %r67, [adddmi_param_12];
ld.param.u32 %r68, [adddmi_param_13];
ld.param.u32 %r69, [adddmi_param_14];
cvta.to.global.u64 %rd1, %rd24;
cvta.to.global.u64 %rd2, %rd23;
cvta.to.global.u64 %rd3, %rd25;
cvta.to.global.u64 %rd4, %rd22;
cvta.to.global.u64 %rd5, %rd21;
cvta.to.global.u64 %rd6, %rd20;
mov.u32 %r70, %ntid.x;
mov.u32 %r71, %ctaid.x;
mov.u32 %r72, %tid.x;
mad.lo.s32 %r1, %r70, %r71, %r72;
mov.u32 %r73, %ntid.y;
mov.u32 %r74, %ctaid.y;
mov.u32 %r75, %tid.y;
mad.lo.s32 %r2, %r73, %r74, %r75;
mov.u32 %r76, %ntid.z;
mov.u32 %r77, %ctaid.z;
mov.u32 %r78, %tid.z;
mad.lo.s32 %r3, %r76, %r77, %r78;
setp.ge.s32 %p1, %r2, %r68;
setp.ge.s32 %p2, %r1, %r67;
or.pred %p3, %p1, %p2;
setp.ge.s32 %p4, %r3, %r69;
or.pred %p5, %p3, %p4;
@%p5 bra BB6_73;
mul.lo.s32 %r4, %r3, %r68;
add.s32 %r79, %r4, %r2;
mul.lo.s32 %r5, %r79, %r67;
add.s32 %r80, %r5, %r1;
cvt.s64.s32 %rd7, %r80;
mul.wide.s32 %rd26, %r80, 4;
add.s64 %rd27, %rd6, %rd26;
add.s64 %rd28, %rd5, %rd26;
add.s64 %rd29, %rd4, %rd26;
add.s64 %rd30, %rd3, %rd7;
ld.global.nc.u8 %rs1, [%rd30];
cvt.u32.u16 %r81, %rs1;
and.b32 %r6, %r81, 255;
ld.global.nc.f32 %f1, [%rd27];
ld.global.nc.f32 %f2, [%rd28];
mul.f32 %f104, %f2, %f2;
fma.rn.f32 %f105, %f1, %f1, %f104;
ld.global.nc.f32 %f3, [%rd29];
fma.rn.f32 %f106, %f3, %f3, %f105;
setp.eq.f32 %p6, %f106, 0f00000000;
@%p6 bra BB6_73;
cvta.to.global.u64 %rd31, %rd17;
shl.b64 %rd32, %rd7, 2;
add.s64 %rd8, %rd31, %rd32;
ld.global.f32 %f4, [%rd8];
cvta.to.global.u64 %rd33, %rd18;
add.s64 %rd9, %rd33, %rd32;
ld.global.f32 %f5, [%rd9];
cvta.to.global.u64 %rd34, %rd19;
add.s64 %rd10, %rd34, %rd32;
ld.global.f32 %f6, [%rd10];
and.b16 %rs2, %rs9, 1;
setp.eq.s16 %p7, %rs2, 0;
add.s32 %r7, %r1, -1;
@%p7 bra BB6_4;
rem.s32 %r82, %r7, %r67;
add.s32 %r83, %r82, %r67;
rem.s32 %r176, %r83, %r67;
bra.uni BB6_5;
BB6_4:
mov.u32 %r84, 0;
max.s32 %r176, %r7, %r84;
BB6_5:
and.b16 %rs10, %rs2, 1;
setp.eq.b16 %p8, %rs10, 1;
setp.gt.s32 %p9, %r1, 0;
or.pred %p10, %p9, %p8;
add.s32 %r85, %r176, %r5;
cvt.s64.s32 %rd11, %r85;
mov.f32 %f202, 0f00000000;
mov.f32 %f209, %f202;
mov.f32 %f201, %f202;
@!%p10 bra BB6_7;
bra.uni BB6_6;
BB6_6:
shl.b64 %rd35, %rd11, 2;
add.s64 %rd36, %rd6, %rd35;
ld.global.nc.f32 %f201, [%rd36];
add.s64 %rd37, %rd5, %rd35;
ld.global.nc.f32 %f209, [%rd37];
add.s64 %rd38, %rd4, %rd35;
ld.global.nc.f32 %f202, [%rd38];
BB6_7:
mov.f32 %f11, %f209;
add.s64 %rd39, %rd3, %rd11;
ld.global.nc.u8 %rs3, [%rd39];
cvt.u32.u16 %r86, %rs3;
and.b32 %r11, %r86, 255;
setp.gt.u16 %p11, %rs3, %rs1;
@%p11 bra BB6_9;
bra.uni BB6_8;
BB6_9:
add.s32 %r90, %r11, 1;
mul.lo.s32 %r91, %r90, %r11;
shr.u32 %r92, %r91, 1;
add.s32 %r177, %r92, %r6;
bra.uni BB6_10;
BB6_8:
add.s32 %r87, %r6, 1;
mul.lo.s32 %r88, %r87, %r6;
shr.u32 %r89, %r88, 1;
add.s32 %r177, %r11, %r89;
BB6_10:
mul.wide.s32 %rd40, %r177, 4;
add.s64 %rd41, %rd2, %rd40;
ld.global.nc.f32 %f13, [%rd41];
@%p11 bra BB6_12;
bra.uni BB6_11;
BB6_12:
add.s32 %r96, %r11, 1;
mul.lo.s32 %r97, %r96, %r11;
shr.u32 %r98, %r97, 1;
add.s32 %r178, %r98, %r6;
bra.uni BB6_13;
BB6_11:
add.s32 %r93, %r6, 1;
mul.lo.s32 %r94, %r93, %r6;
shr.u32 %r95, %r94, 1;
add.s32 %r178, %r11, %r95;
BB6_13:
mul.wide.s32 %rd42, %r178, 4;
add.s64 %rd43, %rd1, %rd42;
ld.global.nc.f32 %f14, [%rd43];
mul.f32 %f110, %f11, %f11;
fma.rn.f32 %f111, %f201, %f201, %f110;
fma.rn.f32 %f112, %f202, %f202, %f111;
setp.neu.f32 %p13, %f112, 0f00000000;
mov.f32 %f208, %f11;
@%p13 bra BB6_15;
mul.f32 %f113, %f14, 0f3F000000;
div.rn.f32 %f114, %f113, %f13;
mul.f32 %f115, %f114, %f101;
fma.rn.f32 %f201, %f3, %f115, %f1;
mul.f32 %f116, %f1, %f115;
sub.f32 %f202, %f3, %f116;
mov.f32 %f208, %f2;
BB6_15:
mov.f32 %f18, %f208;
mul.f32 %f20, %f101, %f101;
add.f32 %f117, %f13, %f13;
div.rn.f32 %f118, %f117, %f20;
sub.f32 %f119, %f201, %f1;
sub.f32 %f120, %f18, %f2;
sub.f32 %f121, %f202, %f3;
fma.rn.f32 %f122, %f119, %f118, %f4;
fma.rn.f32 %f21, %f120, %f118, %f5;
fma.rn.f32 %f123, %f118, %f121, %f6;
div.rn.f32 %f124, %f14, %f101;
mul.f32 %f125, %f202, %f124;
sub.f32 %f22, %f122, %f125;
fma.rn.f32 %f23, %f201, %f124, %f123;
add.s32 %r18, %r1, 1;
@%p7 bra BB6_17;
rem.s32 %r99, %r18, %r67;
add.s32 %r100, %r99, %r67;
rem.s32 %r179, %r100, %r67;
bra.uni BB6_18;
BB6_17:
add.s32 %r101, %r67, -1;
min.s32 %r179, %r18, %r101;
BB6_18:
setp.lt.s32 %p15, %r18, %r67;
setp.eq.b16 %p16, %rs10, 1;
or.pred %p17, %p15, %p16;
add.s32 %r102, %r179, %r5;
cvt.s64.s32 %rd12, %r102;
mov.f32 %f211, 0f00000000;
mov.f32 %f210, %f211;
mov.f32 %f203, %f211;
@!%p17 bra BB6_20;
bra.uni BB6_19;
BB6_19:
shl.b64 %rd44, %rd12, 2;
add.s64 %rd45, %rd6, %rd44;
ld.global.nc.f32 %f203, [%rd45];
add.s64 %rd46, %rd5, %rd44;
ld.global.nc.f32 %f210, [%rd46];
add.s64 %rd47, %rd4, %rd44;
ld.global.nc.f32 %f211, [%rd47];
BB6_20:
mov.f32 %f207, %f210;
add.s64 %rd48, %rd3, %rd12;
ld.global.nc.u8 %rs4, [%rd48];
cvt.u32.u16 %r103, %rs4;
and.b32 %r22, %r103, 255;
setp.gt.u16 %p18, %rs4, %rs1;
@%p18 bra BB6_22;
bra.uni BB6_21;
BB6_22:
add.s32 %r107, %r22, 1;
mul.lo.s32 %r108, %r107, %r22;
shr.u32 %r109, %r108, 1;
add.s32 %r180, %r109, %r6;
bra.uni BB6_23;
BB6_21:
add.s32 %r104, %r6, 1;
mul.lo.s32 %r105, %r104, %r6;
shr.u32 %r106, %r105, 1;
add.s32 %r180, %r22, %r106;
BB6_23:
mul.wide.s32 %rd49, %r180, 4;
add.s64 %rd50, %rd2, %rd49;
ld.global.nc.f32 %f30, [%rd50];
@%p18 bra BB6_25;
bra.uni BB6_24;
BB6_25:
add.s32 %r113, %r22, 1;
mul.lo.s32 %r114, %r113, %r22;
shr.u32 %r115, %r114, 1;
add.s32 %r181, %r115, %r6;
bra.uni BB6_26;
BB6_24:
add.s32 %r110, %r6, 1;
mul.lo.s32 %r111, %r110, %r6;
shr.u32 %r112, %r111, 1;
add.s32 %r181, %r22, %r112;
BB6_26:
mul.wide.s32 %rd51, %r181, 4;
add.s64 %rd52, %rd1, %rd51;
ld.global.nc.f32 %f31, [%rd52];
mul.f32 %f129, %f207, %f207;
fma.rn.f32 %f130, %f203, %f203, %f129;
fma.rn.f32 %f131, %f211, %f211, %f130;
setp.neu.f32 %p20, %f131, 0f00000000;
@%p20 bra BB6_28;
mul.f32 %f132, %f31, 0f3F000000;
div.rn.f32 %f133, %f132, %f30;
mul.f32 %f134, %f133, %f101;
mul.f32 %f135, %f3, %f134;
sub.f32 %f203, %f1, %f135;
fma.rn.f32 %f211, %f1, %f134, %f3;
mov.f32 %f207, %f2;
BB6_28:
add.f32 %f136, %f30, %f30;
div.rn.f32 %f137, %f136, %f20;
sub.f32 %f138, %f203, %f1;
sub.f32 %f139, %f207, %f2;
sub.f32 %f140, %f211, %f3;
fma.rn.f32 %f141, %f138, %f137, %f22;
fma.rn.f32 %f37, %f139, %f137, %f21;
fma.rn.f32 %f142, %f137, %f140, %f23;
div.rn.f32 %f143, %f31, %f101;
fma.rn.f32 %f38, %f211, %f143, %f141;
mul.f32 %f144, %f203, %f143;
sub.f32 %f39, %f142, %f144;
and.b16 %rs5, %rs9, 2;
setp.eq.s16 %p21, %rs5, 0;
add.s32 %r29, %r2, -1;
@%p21 bra BB6_30;
rem.s32 %r116, %r29, %r68;
add.s32 %r117, %r116, %r68;
rem.s32 %r182, %r117, %r68;
bra.uni BB6_31;
BB6_30:
mov.u32 %r118, 0;
max.s32 %r182, %r29, %r118;
BB6_31:
add.s32 %r119, %r182, %r4;
mad.lo.s32 %r120, %r119, %r67, %r1;
setp.ne.s16 %p22, %rs5, 0;
setp.gt.s32 %p23, %r2, 0;
or.pred %p24, %p23, %p22;
cvt.s64.s32 %rd13, %r120;
mov.f32 %f213, 0f00000000;
mov.f32 %f212, %f213;
mov.f32 %f219, %f213;
@!%p24 bra BB6_33;
bra.uni BB6_32;
BB6_32:
shl.b64 %rd53, %rd13, 2;
add.s64 %rd54, %rd6, %rd53;
ld.global.nc.f32 %f219, [%rd54];
add.s64 %rd55, %rd5, %rd53;
ld.global.nc.f32 %f212, [%rd55];
add.s64 %rd56, %rd4, %rd53;
ld.global.nc.f32 %f213, [%rd56];
BB6_33:
mov.f32 %f43, %f219;
add.s64 %rd57, %rd3, %rd13;
ld.global.nc.u8 %rs6, [%rd57];
cvt.u32.u16 %r121, %rs6;
and.b32 %r33, %r121, 255;
setp.gt.u16 %p25, %rs6, %rs1;
@%p25 bra BB6_35;
bra.uni BB6_34;
BB6_35:
add.s32 %r125, %r33, 1;
mul.lo.s32 %r126, %r125, %r33;
shr.u32 %r127, %r126, 1;
add.s32 %r183, %r127, %r6;
bra.uni BB6_36;
BB6_34:
add.s32 %r122, %r6, 1;
mul.lo.s32 %r123, %r122, %r6;
shr.u32 %r124, %r123, 1;
add.s32 %r183, %r33, %r124;
BB6_36:
mul.wide.s32 %rd58, %r183, 4;
add.s64 %rd59, %rd2, %rd58;
ld.global.nc.f32 %f46, [%rd59];
@%p25 bra BB6_38;
bra.uni BB6_37;
BB6_38:
add.s32 %r131, %r33, 1;
mul.lo.s32 %r132, %r131, %r33;
shr.u32 %r133, %r132, 1;
add.s32 %r184, %r133, %r6;
bra.uni BB6_39;
BB6_37:
add.s32 %r128, %r6, 1;
mul.lo.s32 %r129, %r128, %r6;
shr.u32 %r130, %r129, 1;
add.s32 %r184, %r33, %r130;
BB6_39:
mul.wide.s32 %rd60, %r184, 4;
add.s64 %rd61, %rd1, %rd60;
ld.global.nc.f32 %f47, [%rd61];
mul.f32 %f148, %f212, %f212;
fma.rn.f32 %f149, %f43, %f43, %f148;
fma.rn.f32 %f150, %f213, %f213, %f149;
setp.neu.f32 %p27, %f150, 0f00000000;
mov.f32 %f218, %f43;
@%p27 bra BB6_41;
mul.f32 %f151, %f47, 0f3F000000;
div.rn.f32 %f152, %f151, %f46;
mul.f32 %f153, %f152, %f102;
fma.rn.f32 %f212, %f3, %f153, %f2;
mul.f32 %f154, %f2, %f153;
sub.f32 %f213, %f3, %f154;
mov.f32 %f218, %f1;
BB6_41:
mov.f32 %f50, %f218;
mul.f32 %f53, %f102, %f102;
add.f32 %f155, %f46, %f46;
div.rn.f32 %f156, %f155, %f53;
sub.f32 %f157, %f50, %f1;
sub.f32 %f158, %f212, %f2;
sub.f32 %f159, %f213, %f3;
fma.rn.f32 %f54, %f157, %f156, %f38;
fma.rn.f32 %f160, %f158, %f156, %f37;
fma.rn.f32 %f161, %f156, %f159, %f39;
div.rn.f32 %f162, %f47, %f102;
mul.f32 %f163, %f213, %f162;
sub.f32 %f55, %f160, %f163;
fma.rn.f32 %f56, %f212, %f162, %f161;
add.s32 %r40, %r2, 1;
@%p21 bra BB6_43;
rem.s32 %r134, %r40, %r68;
add.s32 %r135, %r134, %r68;
rem.s32 %r185, %r135, %r68;
bra.uni BB6_44;
BB6_43:
add.s32 %r136, %r68, -1;
min.s32 %r185, %r40, %r136;
BB6_44:
add.s32 %r137, %r185, %r4;
mad.lo.s32 %r138, %r137, %r67, %r1;
setp.lt.s32 %p29, %r40, %r68;
or.pred %p31, %p29, %p22;
cvt.s64.s32 %rd14, %r138;
mov.f32 %f222, 0f00000000;
mov.f32 %f221, %f222;
mov.f32 %f220, %f222;
@!%p31 bra BB6_46;
bra.uni BB6_45;
BB6_45:
shl.b64 %rd62, %rd14, 2;
add.s64 %rd63, %rd6, %rd62;
ld.global.nc.f32 %f220, [%rd63];
add.s64 %rd64, %rd5, %rd62;
ld.global.nc.f32 %f221, [%rd64];
add.s64 %rd65, %rd4, %rd62;
ld.global.nc.f32 %f222, [%rd65];
BB6_46:
mov.f32 %f217, %f220;
add.s64 %rd66, %rd3, %rd14;
ld.global.nc.u8 %rs7, [%rd66];
cvt.u32.u16 %r139, %rs7;
and.b32 %r44, %r139, 255;
setp.gt.u16 %p32, %rs7, %rs1;
@%p32 bra BB6_48;
bra.uni BB6_47;
BB6_48:
add.s32 %r143, %r44, 1;
mul.lo.s32 %r144, %r143, %r44;
shr.u32 %r145, %r144, 1;
add.s32 %r186, %r145, %r6;
bra.uni BB6_49;
BB6_47:
add.s32 %r140, %r6, 1;
mul.lo.s32 %r141, %r140, %r6;
shr.u32 %r142, %r141, 1;
add.s32 %r186, %r44, %r142;
BB6_49:
mul.wide.s32 %rd67, %r186, 4;
add.s64 %rd68, %rd2, %rd67;
ld.global.nc.f32 %f63, [%rd68];
@%p32 bra BB6_51;
bra.uni BB6_50;
BB6_51:
add.s32 %r149, %r44, 1;
mul.lo.s32 %r150, %r149, %r44;
shr.u32 %r151, %r150, 1;
add.s32 %r187, %r151, %r6;
bra.uni BB6_52;
BB6_50:
add.s32 %r146, %r6, 1;
mul.lo.s32 %r147, %r146, %r6;
shr.u32 %r148, %r147, 1;
add.s32 %r187, %r44, %r148;
BB6_52:
mul.wide.s32 %rd69, %r187, 4;
add.s64 %rd70, %rd1, %rd69;
ld.global.nc.f32 %f64, [%rd70];
mul.f32 %f167, %f221, %f221;
fma.rn.f32 %f168, %f217, %f217, %f167;
fma.rn.f32 %f169, %f222, %f222, %f168;
setp.neu.f32 %p34, %f169, 0f00000000;
@%p34 bra BB6_54;
mul.f32 %f170, %f64, 0f3F000000;
div.rn.f32 %f171, %f170, %f63;
mul.f32 %f172, %f171, %f102;
mul.f32 %f173, %f3, %f172;
sub.f32 %f221, %f2, %f173;
fma.rn.f32 %f222, %f2, %f172, %f3;
mov.f32 %f217, %f1;
BB6_54:
add.f32 %f174, %f63, %f63;
div.rn.f32 %f175, %f174, %f53;
sub.f32 %f176, %f217, %f1;
sub.f32 %f177, %f221, %f2;
sub.f32 %f178, %f222, %f3;
fma.rn.f32 %f229, %f176, %f175, %f54;
fma.rn.f32 %f179, %f177, %f175, %f55;
fma.rn.f32 %f180, %f175, %f178, %f56;
div.rn.f32 %f181, %f64, %f102;
fma.rn.f32 %f230, %f222, %f181, %f179;
mul.f32 %f182, %f221, %f181;
sub.f32 %f231, %f180, %f182;
setp.eq.s32 %p35, %r69, 1;
@%p35 bra BB6_72;
and.b16 %rs8, %rs9, 4;
setp.eq.s16 %p36, %rs8, 0;
add.s32 %r51, %r3, -1;
@%p36 bra BB6_57;
rem.s32 %r152, %r51, %r69;
add.s32 %r153, %r152, %r69;
rem.s32 %r188, %r153, %r69;
bra.uni BB6_58;
BB6_57:
mov.u32 %r154, 0;
max.s32 %r188, %r51, %r154;
BB6_58:
mad.lo.s32 %r155, %r188, %r68, %r2;
mad.lo.s32 %r156, %r155, %r67, %r1;
cvt.s64.s32 %rd15, %r156;
mul.wide.s32 %rd71, %r156, 4;
add.s64 %rd72, %rd6, %rd71;
add.s64 %rd73, %rd5, %rd71;
add.s64 %rd74, %rd4, %rd71;
ld.global.nc.f32 %f223, [%rd72];
ld.global.nc.f32 %f224, [%rd73];
ld.global.nc.f32 %f225, [%rd74];
mul.f32 %f183, %f224, %f224;
fma.rn.f32 %f184, %f223, %f223, %f183;
fma.rn.f32 %f185, %f225, %f225, %f184;
setp.neu.f32 %p37, %f185, 0f00000000;
@%p37 bra BB6_60;
mov.f32 %f225, %f3;
mov.f32 %f224, %f2;
mov.f32 %f223, %f1;
BB6_60:
add.s64 %rd75, %rd3, %rd15;
ld.global.nc.u8 %rs31, [%rd75];
setp.gt.u16 %p38, %rs31, %rs1;
cvt.u32.u16 %r157, %rs31;
and.b32 %r55, %r157, 255;
@%p38 bra BB6_62;
bra.uni BB6_61;
BB6_62:
add.s32 %r161, %r55, 1;
mul.lo.s32 %r162, %r161, %r55;
shr.u32 %r163, %r162, 1;
add.s32 %r189, %r163, %r6;
bra.uni BB6_63;
BB6_61:
add.s32 %r158, %r6, 1;
mul.lo.s32 %r159, %r158, %r6;
shr.u32 %r160, %r159, 1;
add.s32 %r189, %r55, %r160;
BB6_63:
mul.wide.s32 %rd76, %r189, 4;
add.s64 %rd77, %rd2, %rd76;
ld.global.nc.f32 %f186, [%rd77];
add.f32 %f187, %f186, %f186;
mul.f32 %f82, %f103, %f103;
div.rn.f32 %f188, %f187, %f82;
sub.f32 %f189, %f223, %f1;
sub.f32 %f190, %f224, %f2;
sub.f32 %f191, %f225, %f3;
fma.rn.f32 %f83, %f189, %f188, %f229;
fma.rn.f32 %f84, %f190, %f188, %f230;
fma.rn.f32 %f85, %f191, %f188, %f231;
add.s32 %r59, %r3, 1;
@%p36 bra BB6_65;
rem.s32 %r164, %r59, %r69;
add.s32 %r165, %r164, %r69;
rem.s32 %r190, %r165, %r69;
bra.uni BB6_66;
BB6_65:
add.s32 %r166, %r69, -1;
min.s32 %r190, %r59, %r166;
BB6_66:
mad.lo.s32 %r167, %r190, %r68, %r2;
mad.lo.s32 %r168, %r167, %r67, %r1;
cvt.s64.s32 %rd16, %r168;
mul.wide.s32 %rd78, %r168, 4;
add.s64 %rd79, %rd6, %rd78;
add.s64 %rd80, %rd5, %rd78;
add.s64 %rd81, %rd4, %rd78;
ld.global.nc.f32 %f226, [%rd79];
ld.global.nc.f32 %f227, [%rd80];
ld.global.nc.f32 %f228, [%rd81];
mul.f32 %f192, %f227, %f227;
fma.rn.f32 %f193, %f226, %f226, %f192;
fma.rn.f32 %f194, %f228, %f228, %f193;
setp.neu.f32 %p40, %f194, 0f00000000;
@%p40 bra BB6_68;
mov.f32 %f228, %f3;
mov.f32 %f227, %f2;
mov.f32 %f226, %f1;
BB6_68:
add.s64 %rd82, %rd3, %rd16;
ld.global.nc.u8 %rs35, [%rd82];
setp.gt.u16 %p41, %rs35, %rs1;
cvt.u32.u16 %r169, %rs35;
and.b32 %r63, %r169, 255;
@%p41 bra BB6_70;
bra.uni BB6_69;
BB6_70:
add.s32 %r173, %r63, 1;
mul.lo.s32 %r174, %r173, %r63;
shr.u32 %r175, %r174, 1;
add.s32 %r191, %r175, %r6;
bra.uni BB6_71;
BB6_69:
add.s32 %r170, %r6, 1;
mul.lo.s32 %r171, %r170, %r6;
shr.u32 %r172, %r171, 1;
add.s32 %r191, %r63, %r172;
BB6_71:
mul.wide.s32 %rd83, %r191, 4;
add.s64 %rd84, %rd2, %rd83;
ld.global.nc.f32 %f195, [%rd84];
add.f32 %f196, %f195, %f195;
div.rn.f32 %f197, %f196, %f82;
sub.f32 %f198, %f226, %f1;
sub.f32 %f199, %f227, %f2;
sub.f32 %f200, %f228, %f3;
fma.rn.f32 %f229, %f198, %f197, %f83;
fma.rn.f32 %f230, %f199, %f197, %f84;
fma.rn.f32 %f231, %f200, %f197, %f85;
BB6_72:
st.global.f32 [%rd8], %f229;
st.global.f32 [%rd9], %f230;
st.global.f32 [%rd10], %f231;
BB6_73:
ret;
}