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dmibulk_wrapper.go
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dmibulk_wrapper.go
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package cuda
/*
THIS FILE IS AUTO-GENERATED BY CUDA2GO.
EDITING IS FUTILE.
*/
import (
"github.com/mumax/3/cuda/cu"
"github.com/mumax/3/timer"
"sync"
"unsafe"
)
// CUDA handle for adddmibulk kernel
var adddmibulk_code cu.Function
// Stores the arguments for adddmibulk kernel invocation
type adddmibulk_args_t struct {
arg_Hx unsafe.Pointer
arg_Hy unsafe.Pointer
arg_Hz unsafe.Pointer
arg_mx unsafe.Pointer
arg_my unsafe.Pointer
arg_mz unsafe.Pointer
arg_aLUT2d unsafe.Pointer
arg_DLUT2d unsafe.Pointer
arg_regions unsafe.Pointer
arg_cx float32
arg_cy float32
arg_cz float32
arg_Nx int
arg_Ny int
arg_Nz int
arg_PBC byte
argptr [16]unsafe.Pointer
sync.Mutex
}
// Stores the arguments for adddmibulk kernel invocation
var adddmibulk_args adddmibulk_args_t
func init() {
// CUDA driver kernel call wants pointers to arguments, set them up once.
adddmibulk_args.argptr[0] = unsafe.Pointer(&adddmibulk_args.arg_Hx)
adddmibulk_args.argptr[1] = unsafe.Pointer(&adddmibulk_args.arg_Hy)
adddmibulk_args.argptr[2] = unsafe.Pointer(&adddmibulk_args.arg_Hz)
adddmibulk_args.argptr[3] = unsafe.Pointer(&adddmibulk_args.arg_mx)
adddmibulk_args.argptr[4] = unsafe.Pointer(&adddmibulk_args.arg_my)
adddmibulk_args.argptr[5] = unsafe.Pointer(&adddmibulk_args.arg_mz)
adddmibulk_args.argptr[6] = unsafe.Pointer(&adddmibulk_args.arg_aLUT2d)
adddmibulk_args.argptr[7] = unsafe.Pointer(&adddmibulk_args.arg_DLUT2d)
adddmibulk_args.argptr[8] = unsafe.Pointer(&adddmibulk_args.arg_regions)
adddmibulk_args.argptr[9] = unsafe.Pointer(&adddmibulk_args.arg_cx)
adddmibulk_args.argptr[10] = unsafe.Pointer(&adddmibulk_args.arg_cy)
adddmibulk_args.argptr[11] = unsafe.Pointer(&adddmibulk_args.arg_cz)
adddmibulk_args.argptr[12] = unsafe.Pointer(&adddmibulk_args.arg_Nx)
adddmibulk_args.argptr[13] = unsafe.Pointer(&adddmibulk_args.arg_Ny)
adddmibulk_args.argptr[14] = unsafe.Pointer(&adddmibulk_args.arg_Nz)
adddmibulk_args.argptr[15] = unsafe.Pointer(&adddmibulk_args.arg_PBC)
}
// Wrapper for adddmibulk CUDA kernel, asynchronous.
func k_adddmibulk_async(Hx unsafe.Pointer, Hy unsafe.Pointer, Hz unsafe.Pointer, mx unsafe.Pointer, my unsafe.Pointer, mz unsafe.Pointer, aLUT2d unsafe.Pointer, DLUT2d unsafe.Pointer, regions unsafe.Pointer, cx float32, cy float32, cz float32, Nx int, Ny int, Nz int, PBC byte, cfg *config) {
if Synchronous { // debug
Sync()
timer.Start("adddmibulk")
}
adddmibulk_args.Lock()
defer adddmibulk_args.Unlock()
if adddmibulk_code == 0 {
adddmibulk_code = fatbinLoad(adddmibulk_map, "adddmibulk")
}
adddmibulk_args.arg_Hx = Hx
adddmibulk_args.arg_Hy = Hy
adddmibulk_args.arg_Hz = Hz
adddmibulk_args.arg_mx = mx
adddmibulk_args.arg_my = my
adddmibulk_args.arg_mz = mz
adddmibulk_args.arg_aLUT2d = aLUT2d
adddmibulk_args.arg_DLUT2d = DLUT2d
adddmibulk_args.arg_regions = regions
adddmibulk_args.arg_cx = cx
adddmibulk_args.arg_cy = cy
adddmibulk_args.arg_cz = cz
adddmibulk_args.arg_Nx = Nx
adddmibulk_args.arg_Ny = Ny
adddmibulk_args.arg_Nz = Nz
adddmibulk_args.arg_PBC = PBC
args := adddmibulk_args.argptr[:]
cu.LaunchKernel(adddmibulk_code, cfg.Grid.X, cfg.Grid.Y, cfg.Grid.Z, cfg.Block.X, cfg.Block.Y, cfg.Block.Z, 0, stream0, args)
if Synchronous { // debug
Sync()
timer.Stop("adddmibulk")
}
}
// maps compute capability on PTX code for adddmibulk kernel.
var adddmibulk_map = map[int]string{0: "",
20: adddmibulk_ptx_20,
30: adddmibulk_ptx_30,
35: adddmibulk_ptx_35,
50: adddmibulk_ptx_50,
52: adddmibulk_ptx_52,
53: adddmibulk_ptx_53}
// adddmibulk PTX code for various compute capabilities.
const (
adddmibulk_ptx_20 = `
.version 4.3
.target sm_20
.address_size 64
// .globl adddmibulk
.visible .entry adddmibulk(
.param .u64 adddmibulk_param_0,
.param .u64 adddmibulk_param_1,
.param .u64 adddmibulk_param_2,
.param .u64 adddmibulk_param_3,
.param .u64 adddmibulk_param_4,
.param .u64 adddmibulk_param_5,
.param .u64 adddmibulk_param_6,
.param .u64 adddmibulk_param_7,
.param .u64 adddmibulk_param_8,
.param .f32 adddmibulk_param_9,
.param .f32 adddmibulk_param_10,
.param .f32 adddmibulk_param_11,
.param .u32 adddmibulk_param_12,
.param .u32 adddmibulk_param_13,
.param .u32 adddmibulk_param_14,
.param .u8 adddmibulk_param_15
)
{
.reg .pred %p<38>;
.reg .b16 %rs<15>;
.reg .f32 %f<215>;
.reg .b32 %r<201>;
.reg .b64 %rd<81>;
ld.param.u64 %rd2, [adddmibulk_param_0];
ld.param.u64 %rd3, [adddmibulk_param_1];
ld.param.u64 %rd4, [adddmibulk_param_2];
ld.param.u64 %rd5, [adddmibulk_param_3];
ld.param.u64 %rd6, [adddmibulk_param_4];
ld.param.u64 %rd7, [adddmibulk_param_5];
ld.param.u64 %rd8, [adddmibulk_param_6];
ld.param.u64 %rd9, [adddmibulk_param_7];
ld.param.u64 %rd10, [adddmibulk_param_8];
ld.param.f32 %f79, [adddmibulk_param_9];
ld.param.f32 %f80, [adddmibulk_param_10];
ld.param.f32 %f81, [adddmibulk_param_11];
ld.param.u32 %r26, [adddmibulk_param_12];
ld.param.u32 %r27, [adddmibulk_param_13];
ld.param.u32 %r28, [adddmibulk_param_14];
ld.param.u8 %rs3, [adddmibulk_param_15];
mov.u32 %r29, %ntid.x;
mov.u32 %r30, %ctaid.x;
mov.u32 %r31, %tid.x;
mad.lo.s32 %r1, %r29, %r30, %r31;
mov.u32 %r32, %ntid.y;
mov.u32 %r33, %ctaid.y;
mov.u32 %r34, %tid.y;
mad.lo.s32 %r2, %r32, %r33, %r34;
mov.u32 %r35, %ntid.z;
mov.u32 %r36, %ctaid.z;
mov.u32 %r37, %tid.z;
mad.lo.s32 %r3, %r35, %r36, %r37;
setp.ge.s32 %p1, %r2, %r27;
setp.ge.s32 %p2, %r1, %r26;
or.pred %p3, %p1, %p2;
setp.ge.s32 %p4, %r3, %r28;
or.pred %p5, %p3, %p4;
@%p5 bra BB0_35;
cvta.to.global.u64 %rd11, %rd7;
cvta.to.global.u64 %rd12, %rd6;
cvta.to.global.u64 %rd13, %rd5;
mad.lo.s32 %r38, %r3, %r27, %r2;
mad.lo.s32 %r39, %r38, %r26, %r1;
cvt.s64.s32 %rd1, %r39;
mul.wide.s32 %rd14, %r39, 4;
add.s64 %rd15, %rd13, %rd14;
add.s64 %rd16, %rd12, %rd14;
add.s64 %rd17, %rd11, %rd14;
cvta.to.global.u64 %rd18, %rd10;
add.s64 %rd19, %rd18, %rd1;
ld.global.u8 %r40, [%rd19];
add.s32 %r41, %r40, 1;
mul.lo.s32 %r42, %r41, %r40;
shr.u32 %r43, %r42, 1;
add.s32 %r44, %r43, %r40;
cvta.to.global.u64 %rd20, %rd8;
mul.wide.s32 %rd21, %r44, 4;
add.s64 %rd22, %rd20, %rd21;
cvta.to.global.u64 %rd23, %rd9;
add.s64 %rd24, %rd23, %rd21;
ld.global.f32 %f82, [%rd22];
add.f32 %f1, %f82, %f82;
ld.global.f32 %f2, [%rd24];
div.rn.f32 %f3, %f2, %f1;
ld.global.f32 %f4, [%rd15];
ld.global.f32 %f5, [%rd16];
mul.f32 %f83, %f5, %f5;
fma.rn.f32 %f84, %f4, %f4, %f83;
ld.global.f32 %f6, [%rd17];
fma.rn.f32 %f85, %f6, %f6, %f84;
setp.eq.f32 %p6, %f85, 0f00000000;
@%p6 bra BB0_35;
cvta.to.global.u64 %rd25, %rd2;
shl.b64 %rd26, %rd1, 2;
add.s64 %rd27, %rd25, %rd26;
ld.global.f32 %f7, [%rd27];
cvta.to.global.u64 %rd28, %rd3;
add.s64 %rd29, %rd28, %rd26;
ld.global.f32 %f8, [%rd29];
cvta.to.global.u64 %rd30, %rd4;
add.s64 %rd31, %rd30, %rd26;
ld.global.f32 %f9, [%rd31];
and.b16 %rs4, %rs3, 1;
setp.eq.b16 %p7, %rs4, 1;
add.s32 %r4, %r1, -1;
@!%p7 bra BB0_4;
bra.uni BB0_3;
BB0_3:
rem.s32 %r49, %r4, %r26;
add.s32 %r50, %r49, %r26;
rem.s32 %r195, %r50, %r26;
bra.uni BB0_5;
BB0_4:
mov.u32 %r51, 0;
max.s32 %r195, %r4, %r51;
BB0_5:
setp.gt.s32 %p8, %r1, 0;
setp.eq.b16 %p9, %rs4, 1;
or.pred %p10, %p8, %p9;
mov.f32 %f196, 0f00000000;
mov.f32 %f195, %f196;
mov.f32 %f194, %f196;
@!%p10 bra BB0_7;
bra.uni BB0_6;
BB0_6:
mad.lo.s32 %r65, %r38, %r26, %r195;
mul.wide.s32 %rd33, %r65, 4;
add.s64 %rd34, %rd13, %rd33;
ld.global.f32 %f194, [%rd34];
add.s64 %rd36, %rd12, %rd33;
ld.global.f32 %f195, [%rd36];
add.s64 %rd38, %rd11, %rd33;
ld.global.f32 %f196, [%rd38];
BB0_7:
setp.eq.b16 %p11, %rs4, 1;
mul.f32 %f89, %f195, %f195;
fma.rn.f32 %f90, %f194, %f194, %f89;
fma.rn.f32 %f91, %f196, %f196, %f90;
setp.eq.f32 %p12, %f91, 0f00000000;
mul.f32 %f92, %f3, %f79;
mul.f32 %f16, %f6, %f92;
add.f32 %f93, %f5, %f16;
mul.f32 %f17, %f5, %f92;
sub.f32 %f94, %f6, %f17;
selp.f32 %f95, %f4, %f194, %p12;
selp.f32 %f96, %f93, %f195, %p12;
selp.f32 %f97, %f94, %f196, %p12;
mul.f32 %f98, %f79, %f79;
div.rn.f32 %f18, %f1, %f98;
sub.f32 %f99, %f95, %f4;
sub.f32 %f100, %f96, %f5;
sub.f32 %f101, %f97, %f6;
fma.rn.f32 %f19, %f18, %f99, %f7;
fma.rn.f32 %f102, %f18, %f100, %f8;
fma.rn.f32 %f103, %f18, %f101, %f9;
div.rn.f32 %f20, %f2, %f79;
mul.f32 %f104, %f20, %f97;
sub.f32 %f21, %f102, %f104;
fma.rn.f32 %f22, %f20, %f96, %f103;
@!%p11 bra BB0_9;
bra.uni BB0_8;
BB0_8:
add.s32 %r70, %r1, 1;
rem.s32 %r71, %r70, %r26;
add.s32 %r72, %r71, %r26;
rem.s32 %r196, %r72, %r26;
bra.uni BB0_10;
BB0_9:
add.s32 %r73, %r26, -1;
add.s32 %r78, %r1, 1;
min.s32 %r196, %r78, %r73;
BB0_10:
setp.eq.b16 %p13, %rs4, 1;
add.s32 %r83, %r1, 1;
setp.lt.s32 %p14, %r83, %r26;
or.pred %p15, %p14, %p13;
mov.f32 %f199, 0f00000000;
mov.f32 %f198, %f199;
mov.f32 %f197, %f199;
@!%p15 bra BB0_12;
bra.uni BB0_11;
BB0_11:
mad.lo.s32 %r93, %r38, %r26, %r196;
mul.wide.s32 %rd40, %r93, 4;
add.s64 %rd41, %rd13, %rd40;
ld.global.f32 %f197, [%rd41];
add.s64 %rd43, %rd12, %rd40;
ld.global.f32 %f198, [%rd43];
add.s64 %rd45, %rd11, %rd40;
ld.global.f32 %f199, [%rd45];
BB0_12:
mul.f32 %f108, %f198, %f198;
fma.rn.f32 %f109, %f197, %f197, %f108;
fma.rn.f32 %f110, %f199, %f199, %f109;
setp.eq.f32 %p16, %f110, 0f00000000;
selp.f32 %f111, %f4, %f197, %p16;
sub.f32 %f112, %f5, %f16;
selp.f32 %f113, %f112, %f198, %p16;
add.f32 %f114, %f6, %f17;
selp.f32 %f115, %f114, %f199, %p16;
sub.f32 %f116, %f111, %f4;
sub.f32 %f117, %f113, %f5;
sub.f32 %f118, %f115, %f6;
fma.rn.f32 %f29, %f18, %f116, %f19;
fma.rn.f32 %f119, %f18, %f117, %f21;
fma.rn.f32 %f120, %f18, %f118, %f22;
fma.rn.f32 %f30, %f20, %f115, %f119;
mul.f32 %f121, %f20, %f113;
sub.f32 %f31, %f120, %f121;
and.b16 %rs1, %rs3, 2;
setp.eq.s16 %p17, %rs1, 0;
add.s32 %r11, %r2, -1;
@%p17 bra BB0_14;
rem.s32 %r98, %r11, %r27;
add.s32 %r99, %r98, %r27;
rem.s32 %r197, %r99, %r27;
bra.uni BB0_15;
BB0_14:
mov.u32 %r100, 0;
max.s32 %r197, %r11, %r100;
BB0_15:
setp.gt.s32 %p18, %r2, 0;
setp.ne.s16 %p19, %rs1, 0;
or.pred %p20, %p18, %p19;
mov.f32 %f202, 0f00000000;
mov.f32 %f201, %f202;
mov.f32 %f200, %f202;
@!%p20 bra BB0_17;
bra.uni BB0_16;
BB0_16:
mad.lo.s32 %r109, %r3, %r27, %r197;
mad.lo.s32 %r114, %r109, %r26, %r1;
mul.wide.s32 %rd47, %r114, 4;
add.s64 %rd48, %rd13, %rd47;
ld.global.f32 %f200, [%rd48];
add.s64 %rd50, %rd12, %rd47;
ld.global.f32 %f201, [%rd50];
add.s64 %rd52, %rd11, %rd47;
ld.global.f32 %f202, [%rd52];
BB0_17:
mul.f32 %f125, %f201, %f201;
fma.rn.f32 %f126, %f200, %f200, %f125;
fma.rn.f32 %f127, %f202, %f202, %f126;
setp.eq.f32 %p21, %f127, 0f00000000;
mul.f32 %f128, %f3, %f80;
mul.f32 %f38, %f6, %f128;
sub.f32 %f129, %f4, %f38;
mul.f32 %f39, %f4, %f128;
add.f32 %f130, %f6, %f39;
selp.f32 %f131, %f129, %f200, %p21;
selp.f32 %f132, %f5, %f201, %p21;
selp.f32 %f133, %f130, %f202, %p21;
mul.f32 %f134, %f80, %f80;
div.rn.f32 %f40, %f1, %f134;
sub.f32 %f135, %f131, %f4;
sub.f32 %f136, %f132, %f5;
sub.f32 %f137, %f133, %f6;
fma.rn.f32 %f138, %f40, %f135, %f29;
fma.rn.f32 %f41, %f40, %f136, %f30;
fma.rn.f32 %f139, %f40, %f137, %f31;
div.rn.f32 %f42, %f2, %f80;
fma.rn.f32 %f43, %f42, %f133, %f138;
mul.f32 %f140, %f42, %f131;
sub.f32 %f44, %f139, %f140;
@%p17 bra BB0_19;
add.s32 %r119, %r2, 1;
rem.s32 %r120, %r119, %r27;
add.s32 %r121, %r120, %r27;
rem.s32 %r198, %r121, %r27;
bra.uni BB0_20;
BB0_19:
add.s32 %r122, %r27, -1;
add.s32 %r127, %r2, 1;
min.s32 %r198, %r127, %r122;
BB0_20:
shr.u16 %rs10, %rs3, 1;
and.b16 %rs11, %rs10, 1;
setp.eq.b16 %p23, %rs11, 1;
add.s32 %r132, %r2, 1;
setp.lt.s32 %p24, %r132, %r27;
or.pred %p25, %p24, %p23;
mov.f32 %f205, 0f00000000;
mov.f32 %f204, %f205;
mov.f32 %f203, %f205;
@!%p25 bra BB0_22;
bra.uni BB0_21;
BB0_21:
mad.lo.s32 %r137, %r3, %r27, %r198;
mad.lo.s32 %r142, %r137, %r26, %r1;
mul.wide.s32 %rd54, %r142, 4;
add.s64 %rd55, %rd13, %rd54;
ld.global.f32 %f203, [%rd55];
add.s64 %rd57, %rd12, %rd54;
ld.global.f32 %f204, [%rd57];
add.s64 %rd59, %rd11, %rd54;
ld.global.f32 %f205, [%rd59];
BB0_22:
mul.f32 %f144, %f204, %f204;
fma.rn.f32 %f145, %f203, %f203, %f144;
fma.rn.f32 %f146, %f205, %f205, %f145;
setp.eq.f32 %p26, %f146, 0f00000000;
add.f32 %f147, %f4, %f38;
selp.f32 %f148, %f147, %f203, %p26;
selp.f32 %f149, %f5, %f204, %p26;
sub.f32 %f150, %f6, %f39;
selp.f32 %f151, %f150, %f205, %p26;
sub.f32 %f152, %f148, %f4;
sub.f32 %f153, %f149, %f5;
sub.f32 %f154, %f151, %f6;
fma.rn.f32 %f155, %f40, %f152, %f43;
fma.rn.f32 %f213, %f40, %f153, %f41;
fma.rn.f32 %f156, %f40, %f154, %f44;
mul.f32 %f157, %f42, %f151;
sub.f32 %f212, %f155, %f157;
fma.rn.f32 %f214, %f42, %f148, %f156;
setp.eq.s32 %p27, %r28, 1;
@%p27 bra BB0_34;
and.b16 %rs2, %rs3, 4;
setp.eq.s16 %p28, %rs2, 0;
add.s32 %r18, %r3, -1;
@%p28 bra BB0_25;
rem.s32 %r147, %r18, %r28;
add.s32 %r148, %r147, %r28;
rem.s32 %r199, %r148, %r28;
bra.uni BB0_26;
BB0_25:
mov.u32 %r149, 0;
max.s32 %r199, %r18, %r149;
BB0_26:
setp.gt.s32 %p29, %r3, 0;
setp.ne.s16 %p30, %rs2, 0;
or.pred %p31, %p29, %p30;
mov.f32 %f208, 0f00000000;
mov.f32 %f207, %f208;
mov.f32 %f206, %f208;
@!%p31 bra BB0_28;
bra.uni BB0_27;
BB0_27:
mad.lo.s32 %r158, %r199, %r27, %r2;
mad.lo.s32 %r163, %r158, %r26, %r1;
mul.wide.s32 %rd61, %r163, 4;
add.s64 %rd62, %rd13, %rd61;
ld.global.f32 %f206, [%rd62];
add.s64 %rd64, %rd12, %rd61;
ld.global.f32 %f207, [%rd64];
add.s64 %rd66, %rd11, %rd61;
ld.global.f32 %f208, [%rd66];
BB0_28:
mul.f32 %f161, %f207, %f207;
fma.rn.f32 %f162, %f206, %f206, %f161;
fma.rn.f32 %f163, %f208, %f208, %f162;
setp.eq.f32 %p32, %f163, 0f00000000;
mul.f32 %f164, %f3, %f81;
mul.f32 %f60, %f5, %f164;
add.f32 %f165, %f4, %f60;
mul.f32 %f61, %f4, %f164;
sub.f32 %f166, %f5, %f61;
selp.f32 %f167, %f165, %f206, %p32;
selp.f32 %f168, %f166, %f207, %p32;
selp.f32 %f169, %f6, %f208, %p32;
mul.f32 %f170, %f81, %f81;
div.rn.f32 %f62, %f1, %f170;
sub.f32 %f171, %f167, %f4;
sub.f32 %f172, %f168, %f5;
sub.f32 %f173, %f169, %f6;
fma.rn.f32 %f174, %f62, %f171, %f212;
fma.rn.f32 %f175, %f62, %f172, %f213;
fma.rn.f32 %f63, %f62, %f173, %f214;
div.rn.f32 %f64, %f2, %f81;
mul.f32 %f176, %f64, %f168;
sub.f32 %f65, %f174, %f176;
fma.rn.f32 %f66, %f64, %f167, %f175;
add.s32 %r22, %r3, 1;
@%p28 bra BB0_30;
rem.s32 %r168, %r22, %r28;
add.s32 %r169, %r168, %r28;
rem.s32 %r200, %r169, %r28;
bra.uni BB0_31;
BB0_30:
add.s32 %r170, %r28, -1;
min.s32 %r200, %r22, %r170;
BB0_31:
setp.lt.s32 %p34, %r22, %r28;
or.pred %p36, %p34, %p30;
mov.f32 %f211, 0f00000000;
mov.f32 %f210, %f211;
mov.f32 %f209, %f211;
@!%p36 bra BB0_33;
bra.uni BB0_32;
BB0_32:
mad.lo.s32 %r175, %r200, %r27, %r2;
mad.lo.s32 %r180, %r175, %r26, %r1;
mul.wide.s32 %rd68, %r180, 4;
add.s64 %rd69, %rd13, %rd68;
ld.global.f32 %f211, [%rd69];
add.s64 %rd71, %rd12, %rd68;
ld.global.f32 %f210, [%rd71];
add.s64 %rd73, %rd11, %rd68;
ld.global.f32 %f209, [%rd73];
BB0_33:
mul.f32 %f180, %f211, %f211;
fma.rn.f32 %f181, %f210, %f210, %f180;
fma.rn.f32 %f182, %f209, %f209, %f181;
setp.eq.f32 %p37, %f182, 0f00000000;
selp.f32 %f183, %f6, %f209, %p37;
add.f32 %f184, %f5, %f61;
selp.f32 %f185, %f184, %f210, %p37;
sub.f32 %f186, %f4, %f60;
selp.f32 %f187, %f186, %f211, %p37;
sub.f32 %f188, %f187, %f4;
sub.f32 %f189, %f185, %f5;
sub.f32 %f190, %f183, %f6;
fma.rn.f32 %f191, %f62, %f188, %f65;
fma.rn.f32 %f192, %f62, %f189, %f66;
fma.rn.f32 %f214, %f62, %f190, %f63;
fma.rn.f32 %f212, %f64, %f185, %f191;
mul.f32 %f193, %f64, %f187;
sub.f32 %f213, %f192, %f193;
BB0_34:
add.s64 %rd76, %rd25, %rd14;
st.global.f32 [%rd76], %f212;
add.s64 %rd78, %rd28, %rd14;
st.global.f32 [%rd78], %f213;
add.s64 %rd80, %rd30, %rd14;
st.global.f32 [%rd80], %f214;
BB0_35:
ret;
}
`
adddmibulk_ptx_30 = `
.version 4.3
.target sm_30
.address_size 64
// .globl adddmibulk
.visible .entry adddmibulk(
.param .u64 adddmibulk_param_0,
.param .u64 adddmibulk_param_1,
.param .u64 adddmibulk_param_2,
.param .u64 adddmibulk_param_3,
.param .u64 adddmibulk_param_4,
.param .u64 adddmibulk_param_5,
.param .u64 adddmibulk_param_6,
.param .u64 adddmibulk_param_7,
.param .u64 adddmibulk_param_8,
.param .f32 adddmibulk_param_9,
.param .f32 adddmibulk_param_10,
.param .f32 adddmibulk_param_11,
.param .u32 adddmibulk_param_12,
.param .u32 adddmibulk_param_13,
.param .u32 adddmibulk_param_14,
.param .u8 adddmibulk_param_15
)
{
.reg .pred %p<38>;
.reg .b16 %rs<15>;
.reg .f32 %f<215>;
.reg .b32 %r<201>;
.reg .b64 %rd<81>;
ld.param.u64 %rd2, [adddmibulk_param_0];
ld.param.u64 %rd3, [adddmibulk_param_1];
ld.param.u64 %rd4, [adddmibulk_param_2];
ld.param.u64 %rd5, [adddmibulk_param_3];
ld.param.u64 %rd6, [adddmibulk_param_4];
ld.param.u64 %rd7, [adddmibulk_param_5];
ld.param.u64 %rd8, [adddmibulk_param_6];
ld.param.u64 %rd9, [adddmibulk_param_7];
ld.param.u64 %rd10, [adddmibulk_param_8];
ld.param.f32 %f79, [adddmibulk_param_9];
ld.param.f32 %f80, [adddmibulk_param_10];
ld.param.f32 %f81, [adddmibulk_param_11];
ld.param.u32 %r26, [adddmibulk_param_12];
ld.param.u32 %r27, [adddmibulk_param_13];
ld.param.u32 %r28, [adddmibulk_param_14];
ld.param.u8 %rs3, [adddmibulk_param_15];
mov.u32 %r29, %ntid.x;
mov.u32 %r30, %ctaid.x;
mov.u32 %r31, %tid.x;
mad.lo.s32 %r1, %r29, %r30, %r31;
mov.u32 %r32, %ntid.y;
mov.u32 %r33, %ctaid.y;
mov.u32 %r34, %tid.y;
mad.lo.s32 %r2, %r32, %r33, %r34;
mov.u32 %r35, %ntid.z;
mov.u32 %r36, %ctaid.z;
mov.u32 %r37, %tid.z;
mad.lo.s32 %r3, %r35, %r36, %r37;
setp.ge.s32 %p1, %r2, %r27;
setp.ge.s32 %p2, %r1, %r26;
or.pred %p3, %p1, %p2;
setp.ge.s32 %p4, %r3, %r28;
or.pred %p5, %p3, %p4;
@%p5 bra BB0_35;
cvta.to.global.u64 %rd11, %rd7;
cvta.to.global.u64 %rd12, %rd6;
cvta.to.global.u64 %rd13, %rd5;
mad.lo.s32 %r38, %r3, %r27, %r2;
mad.lo.s32 %r39, %r38, %r26, %r1;
cvt.s64.s32 %rd1, %r39;
mul.wide.s32 %rd14, %r39, 4;
add.s64 %rd15, %rd13, %rd14;
add.s64 %rd16, %rd12, %rd14;
add.s64 %rd17, %rd11, %rd14;
cvta.to.global.u64 %rd18, %rd10;
add.s64 %rd19, %rd18, %rd1;
ld.global.u8 %r40, [%rd19];
add.s32 %r41, %r40, 1;
mul.lo.s32 %r42, %r41, %r40;
shr.u32 %r43, %r42, 1;
add.s32 %r44, %r43, %r40;
cvta.to.global.u64 %rd20, %rd8;
mul.wide.s32 %rd21, %r44, 4;
add.s64 %rd22, %rd20, %rd21;
cvta.to.global.u64 %rd23, %rd9;
add.s64 %rd24, %rd23, %rd21;
ld.global.f32 %f82, [%rd22];
add.f32 %f1, %f82, %f82;
ld.global.f32 %f2, [%rd24];
div.rn.f32 %f3, %f2, %f1;
ld.global.f32 %f4, [%rd15];
ld.global.f32 %f5, [%rd16];
mul.f32 %f83, %f5, %f5;
fma.rn.f32 %f84, %f4, %f4, %f83;
ld.global.f32 %f6, [%rd17];
fma.rn.f32 %f85, %f6, %f6, %f84;
setp.eq.f32 %p6, %f85, 0f00000000;
@%p6 bra BB0_35;
cvta.to.global.u64 %rd25, %rd2;
shl.b64 %rd26, %rd1, 2;
add.s64 %rd27, %rd25, %rd26;
ld.global.f32 %f7, [%rd27];
cvta.to.global.u64 %rd28, %rd3;
add.s64 %rd29, %rd28, %rd26;
ld.global.f32 %f8, [%rd29];
cvta.to.global.u64 %rd30, %rd4;
add.s64 %rd31, %rd30, %rd26;
ld.global.f32 %f9, [%rd31];
and.b16 %rs4, %rs3, 1;
setp.eq.b16 %p7, %rs4, 1;
add.s32 %r4, %r1, -1;
@!%p7 bra BB0_4;
bra.uni BB0_3;
BB0_3:
rem.s32 %r49, %r4, %r26;
add.s32 %r50, %r49, %r26;
rem.s32 %r195, %r50, %r26;
bra.uni BB0_5;
BB0_4:
mov.u32 %r51, 0;
max.s32 %r195, %r4, %r51;
BB0_5:
setp.gt.s32 %p8, %r1, 0;
setp.eq.b16 %p9, %rs4, 1;
or.pred %p10, %p8, %p9;
mov.f32 %f196, 0f00000000;
mov.f32 %f195, %f196;
mov.f32 %f194, %f196;
@!%p10 bra BB0_7;
bra.uni BB0_6;
BB0_6:
mad.lo.s32 %r65, %r38, %r26, %r195;
mul.wide.s32 %rd33, %r65, 4;
add.s64 %rd34, %rd13, %rd33;
ld.global.f32 %f194, [%rd34];
add.s64 %rd36, %rd12, %rd33;
ld.global.f32 %f195, [%rd36];
add.s64 %rd38, %rd11, %rd33;
ld.global.f32 %f196, [%rd38];
BB0_7:
setp.eq.b16 %p11, %rs4, 1;
mul.f32 %f89, %f195, %f195;
fma.rn.f32 %f90, %f194, %f194, %f89;
fma.rn.f32 %f91, %f196, %f196, %f90;
setp.eq.f32 %p12, %f91, 0f00000000;
mul.f32 %f92, %f3, %f79;
mul.f32 %f16, %f6, %f92;
add.f32 %f93, %f5, %f16;
mul.f32 %f17, %f5, %f92;
sub.f32 %f94, %f6, %f17;
selp.f32 %f95, %f4, %f194, %p12;
selp.f32 %f96, %f93, %f195, %p12;
selp.f32 %f97, %f94, %f196, %p12;
mul.f32 %f98, %f79, %f79;
div.rn.f32 %f18, %f1, %f98;
sub.f32 %f99, %f95, %f4;
sub.f32 %f100, %f96, %f5;
sub.f32 %f101, %f97, %f6;
fma.rn.f32 %f19, %f18, %f99, %f7;
fma.rn.f32 %f102, %f18, %f100, %f8;
fma.rn.f32 %f103, %f18, %f101, %f9;
div.rn.f32 %f20, %f2, %f79;
mul.f32 %f104, %f20, %f97;
sub.f32 %f21, %f102, %f104;
fma.rn.f32 %f22, %f20, %f96, %f103;
@!%p11 bra BB0_9;
bra.uni BB0_8;
BB0_8:
add.s32 %r70, %r1, 1;
rem.s32 %r71, %r70, %r26;
add.s32 %r72, %r71, %r26;
rem.s32 %r196, %r72, %r26;
bra.uni BB0_10;
BB0_9:
add.s32 %r73, %r26, -1;
add.s32 %r78, %r1, 1;
min.s32 %r196, %r78, %r73;
BB0_10:
setp.eq.b16 %p13, %rs4, 1;
add.s32 %r83, %r1, 1;
setp.lt.s32 %p14, %r83, %r26;
or.pred %p15, %p14, %p13;
mov.f32 %f199, 0f00000000;
mov.f32 %f198, %f199;
mov.f32 %f197, %f199;
@!%p15 bra BB0_12;
bra.uni BB0_11;
BB0_11:
mad.lo.s32 %r93, %r38, %r26, %r196;
mul.wide.s32 %rd40, %r93, 4;
add.s64 %rd41, %rd13, %rd40;
ld.global.f32 %f197, [%rd41];
add.s64 %rd43, %rd12, %rd40;
ld.global.f32 %f198, [%rd43];
add.s64 %rd45, %rd11, %rd40;
ld.global.f32 %f199, [%rd45];
BB0_12:
mul.f32 %f108, %f198, %f198;
fma.rn.f32 %f109, %f197, %f197, %f108;
fma.rn.f32 %f110, %f199, %f199, %f109;
setp.eq.f32 %p16, %f110, 0f00000000;
selp.f32 %f111, %f4, %f197, %p16;
sub.f32 %f112, %f5, %f16;
selp.f32 %f113, %f112, %f198, %p16;
add.f32 %f114, %f6, %f17;
selp.f32 %f115, %f114, %f199, %p16;
sub.f32 %f116, %f111, %f4;
sub.f32 %f117, %f113, %f5;
sub.f32 %f118, %f115, %f6;
fma.rn.f32 %f29, %f18, %f116, %f19;
fma.rn.f32 %f119, %f18, %f117, %f21;
fma.rn.f32 %f120, %f18, %f118, %f22;
fma.rn.f32 %f30, %f20, %f115, %f119;
mul.f32 %f121, %f20, %f113;
sub.f32 %f31, %f120, %f121;
and.b16 %rs1, %rs3, 2;
setp.eq.s16 %p17, %rs1, 0;
add.s32 %r11, %r2, -1;
@%p17 bra BB0_14;
rem.s32 %r98, %r11, %r27;
add.s32 %r99, %r98, %r27;
rem.s32 %r197, %r99, %r27;
bra.uni BB0_15;
BB0_14:
mov.u32 %r100, 0;
max.s32 %r197, %r11, %r100;
BB0_15:
setp.gt.s32 %p18, %r2, 0;
setp.ne.s16 %p19, %rs1, 0;
or.pred %p20, %p18, %p19;
mov.f32 %f202, 0f00000000;
mov.f32 %f201, %f202;
mov.f32 %f200, %f202;
@!%p20 bra BB0_17;
bra.uni BB0_16;
BB0_16:
mad.lo.s32 %r109, %r3, %r27, %r197;
mad.lo.s32 %r114, %r109, %r26, %r1;
mul.wide.s32 %rd47, %r114, 4;
add.s64 %rd48, %rd13, %rd47;
ld.global.f32 %f200, [%rd48];
add.s64 %rd50, %rd12, %rd47;
ld.global.f32 %f201, [%rd50];
add.s64 %rd52, %rd11, %rd47;
ld.global.f32 %f202, [%rd52];
BB0_17:
mul.f32 %f125, %f201, %f201;
fma.rn.f32 %f126, %f200, %f200, %f125;
fma.rn.f32 %f127, %f202, %f202, %f126;
setp.eq.f32 %p21, %f127, 0f00000000;
mul.f32 %f128, %f3, %f80;
mul.f32 %f38, %f6, %f128;
sub.f32 %f129, %f4, %f38;
mul.f32 %f39, %f4, %f128;
add.f32 %f130, %f6, %f39;
selp.f32 %f131, %f129, %f200, %p21;
selp.f32 %f132, %f5, %f201, %p21;
selp.f32 %f133, %f130, %f202, %p21;
mul.f32 %f134, %f80, %f80;
div.rn.f32 %f40, %f1, %f134;
sub.f32 %f135, %f131, %f4;
sub.f32 %f136, %f132, %f5;
sub.f32 %f137, %f133, %f6;
fma.rn.f32 %f138, %f40, %f135, %f29;
fma.rn.f32 %f41, %f40, %f136, %f30;
fma.rn.f32 %f139, %f40, %f137, %f31;
div.rn.f32 %f42, %f2, %f80;
fma.rn.f32 %f43, %f42, %f133, %f138;
mul.f32 %f140, %f42, %f131;
sub.f32 %f44, %f139, %f140;
@%p17 bra BB0_19;
add.s32 %r119, %r2, 1;
rem.s32 %r120, %r119, %r27;
add.s32 %r121, %r120, %r27;
rem.s32 %r198, %r121, %r27;
bra.uni BB0_20;
BB0_19:
add.s32 %r122, %r27, -1;
add.s32 %r127, %r2, 1;
min.s32 %r198, %r127, %r122;
BB0_20:
shr.u16 %rs10, %rs3, 1;
and.b16 %rs11, %rs10, 1;
setp.eq.b16 %p23, %rs11, 1;
add.s32 %r132, %r2, 1;
setp.lt.s32 %p24, %r132, %r27;
or.pred %p25, %p24, %p23;
mov.f32 %f205, 0f00000000;
mov.f32 %f204, %f205;
mov.f32 %f203, %f205;
@!%p25 bra BB0_22;
bra.uni BB0_21;
BB0_21:
mad.lo.s32 %r137, %r3, %r27, %r198;
mad.lo.s32 %r142, %r137, %r26, %r1;
mul.wide.s32 %rd54, %r142, 4;
add.s64 %rd55, %rd13, %rd54;
ld.global.f32 %f203, [%rd55];
add.s64 %rd57, %rd12, %rd54;
ld.global.f32 %f204, [%rd57];
add.s64 %rd59, %rd11, %rd54;
ld.global.f32 %f205, [%rd59];
BB0_22:
mul.f32 %f144, %f204, %f204;
fma.rn.f32 %f145, %f203, %f203, %f144;
fma.rn.f32 %f146, %f205, %f205, %f145;
setp.eq.f32 %p26, %f146, 0f00000000;
add.f32 %f147, %f4, %f38;
selp.f32 %f148, %f147, %f203, %p26;
selp.f32 %f149, %f5, %f204, %p26;
sub.f32 %f150, %f6, %f39;
selp.f32 %f151, %f150, %f205, %p26;
sub.f32 %f152, %f148, %f4;
sub.f32 %f153, %f149, %f5;
sub.f32 %f154, %f151, %f6;
fma.rn.f32 %f155, %f40, %f152, %f43;
fma.rn.f32 %f213, %f40, %f153, %f41;
fma.rn.f32 %f156, %f40, %f154, %f44;
mul.f32 %f157, %f42, %f151;
sub.f32 %f212, %f155, %f157;
fma.rn.f32 %f214, %f42, %f148, %f156;
setp.eq.s32 %p27, %r28, 1;
@%p27 bra BB0_34;
and.b16 %rs2, %rs3, 4;
setp.eq.s16 %p28, %rs2, 0;
add.s32 %r18, %r3, -1;
@%p28 bra BB0_25;
rem.s32 %r147, %r18, %r28;
add.s32 %r148, %r147, %r28;
rem.s32 %r199, %r148, %r28;
bra.uni BB0_26;
BB0_25:
mov.u32 %r149, 0;
max.s32 %r199, %r18, %r149;
BB0_26:
setp.gt.s32 %p29, %r3, 0;
setp.ne.s16 %p30, %rs2, 0;
or.pred %p31, %p29, %p30;
mov.f32 %f208, 0f00000000;
mov.f32 %f207, %f208;
mov.f32 %f206, %f208;
@!%p31 bra BB0_28;
bra.uni BB0_27;
BB0_27:
mad.lo.s32 %r158, %r199, %r27, %r2;
mad.lo.s32 %r163, %r158, %r26, %r1;
mul.wide.s32 %rd61, %r163, 4;
add.s64 %rd62, %rd13, %rd61;
ld.global.f32 %f206, [%rd62];
add.s64 %rd64, %rd12, %rd61;
ld.global.f32 %f207, [%rd64];
add.s64 %rd66, %rd11, %rd61;
ld.global.f32 %f208, [%rd66];
BB0_28:
mul.f32 %f161, %f207, %f207;
fma.rn.f32 %f162, %f206, %f206, %f161;
fma.rn.f32 %f163, %f208, %f208, %f162;
setp.eq.f32 %p32, %f163, 0f00000000;
mul.f32 %f164, %f3, %f81;
mul.f32 %f60, %f5, %f164;
add.f32 %f165, %f4, %f60;
mul.f32 %f61, %f4, %f164;
sub.f32 %f166, %f5, %f61;
selp.f32 %f167, %f165, %f206, %p32;
selp.f32 %f168, %f166, %f207, %p32;
selp.f32 %f169, %f6, %f208, %p32;
mul.f32 %f170, %f81, %f81;
div.rn.f32 %f62, %f1, %f170;
sub.f32 %f171, %f167, %f4;
sub.f32 %f172, %f168, %f5;
sub.f32 %f173, %f169, %f6;
fma.rn.f32 %f174, %f62, %f171, %f212;
fma.rn.f32 %f175, %f62, %f172, %f213;
fma.rn.f32 %f63, %f62, %f173, %f214;
div.rn.f32 %f64, %f2, %f81;
mul.f32 %f176, %f64, %f168;
sub.f32 %f65, %f174, %f176;
fma.rn.f32 %f66, %f64, %f167, %f175;
add.s32 %r22, %r3, 1;
@%p28 bra BB0_30;