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drv_types.h
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/******************************************************************************
*
* Copyright(c) 2007 - 2019 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
/*-------------------------------------------------------------------------------
For type defines and data structure defines
--------------------------------------------------------------------------------*/
#ifndef __DRV_TYPES_H__
#define __DRV_TYPES_H__
#include <drv_conf.h>
#include <basic_types.h>
#include <osdep_service.h>
#include <rtw_byteorder.h>
#include <wlan_bssdef.h>
#include <wifi.h>
#include <ieee80211.h>
#ifdef CONFIG_ARP_KEEP_ALIVE
#include <net/neighbour.h>
#include <net/arp.h>
#endif
#ifdef PLATFORM_OS_XP
#include <drv_types_xp.h>
#endif
#ifdef PLATFORM_OS_CE
#include <drv_types_ce.h>
#endif
#ifdef PLATFORM_LINUX
#include <drv_types_linux.h>
#endif
enum _NIC_VERSION {
RTL8711_NIC,
RTL8712_NIC,
RTL8713_NIC,
RTL8716_NIC
};
typedef struct _ADAPTER _adapter, ADAPTER, *PADAPTER;
#include <rtw_debug.h>
#include <cmn_info/rtw_sta_info.h>
#include <rtw_rf.h>
#include "../core/rtw_chplan.h"
#ifdef CONFIG_80211N_HT
#include <rtw_ht.h>
#endif
#ifdef CONFIG_80211AC_VHT
#include <rtw_vht.h>
#endif
#include <rtw_cmd.h>
#include <cmd_osdep.h>
#include <rtw_security.h>
#include <rtw_xmit.h>
#include <xmit_osdep.h>
#include <rtw_recv.h>
#include <rtw_rm.h>
#ifdef CONFIG_BEAMFORMING
#include <rtw_beamforming.h>
#endif
#include <recv_osdep.h>
#include <rtw_efuse.h>
#include <rtw_sreset.h>
#include <hal_intf.h>
#include <hal_com.h>
#include<hal_com_h2c.h>
#include <hal_com_led.h>
#include "../hal/hal_dm.h"
#include <rtw_qos.h>
#include <rtw_pwrctrl.h>
#ifdef CONFIG_RTW_80211R
#include <rtw_ft.h>
#endif
#if defined(CONFIG_RTW_WNM) || defined(CONFIG_RTW_80211K)
#include <rtw_wnm.h>
#endif
#ifdef CONFIG_RTW_MBO
#include <rtw_mbo.h>
#endif
#include <rtw_mlme.h>
#include <mlme_osdep.h>
#include <rtw_io.h>
#include <rtw_ioctl.h>
#include <rtw_ioctl_set.h>
#include <rtw_ioctl_query.h>
#include <osdep_intf.h>
#include <rtw_eeprom.h>
#include <sta_info.h>
#include <rtw_event.h>
#include <rtw_mlme_ext.h>
#include <rtw_mi.h>
#include <rtw_ap.h>
#ifdef CONFIG_RTW_WDS
#include "../core/wds/rtw_wds.h"
#endif
#ifdef CONFIG_RTW_MESH
#include "../core/mesh/rtw_mesh.h"
#endif
#ifdef CONFIG_WIFI_MONITOR
#include "../core/monitor/rtw_radiotap.h"
#endif
#include <rtw_efuse.h>
#include <rtw_version.h>
#include <rtw_odm.h>
#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER
#include <rtw_mem.h>
#endif
#include <rtw_p2p.h>
#ifdef CONFIG_TDLS
#include <rtw_tdls.h>
#endif /* CONFIG_TDLS */
#ifdef CONFIG_WAPI_SUPPORT
#include <rtw_wapi.h>
#endif /* CONFIG_WAPI_SUPPORT */
#ifdef CONFIG_MP_INCLUDED
#include <rtw_mp.h>
#endif /* CONFIG_MP_INCLUDED */
#ifdef CONFIG_BR_EXT
#include <rtw_br_ext.h>
#endif /* CONFIG_BR_EXT */
#ifdef CONFIG_IOL
#include <rtw_iol.h>
#endif /* CONFIG_IOL */
#include <ip.h>
#include <if_ether.h>
#include <ethernet.h>
#include <circ_buf.h>
#include <rtw_android.h>
#include <rtw_btcoex_wifionly.h>
#include <rtw_btcoex.h>
#ifdef CONFIG_MCC_MODE
#include <rtw_mcc.h>
#endif /*CONFIG_MCC_MODE */
#ifdef CONFIG_RTW_REPEATER_SON
#include <rtw_rson.h>
#endif /*CONFIG_RTW_REPEATER_SON */
#include <rtw_roch.h>
#define SPEC_DEV_ID_NONE BIT(0)
#define SPEC_DEV_ID_DISABLE_HT BIT(1)
#define SPEC_DEV_ID_ENABLE_PS BIT(2)
#define SPEC_DEV_ID_RF_CONFIG_1T1R BIT(3)
#define SPEC_DEV_ID_RF_CONFIG_2T2R BIT(4)
#define SPEC_DEV_ID_ASSIGN_IFNAME BIT(5)
struct specific_device_id {
u32 flags;
u16 idVendor;
u16 idProduct;
};
struct registry_priv {
u8 chip_version;
u8 rfintfs;
u8 lbkmode;
u8 hci;
NDIS_802_11_SSID ssid;
u8 network_mode; /* infra, ad-hoc, auto */
u8 channel;/* ad-hoc support requirement */
u8 wireless_mode;/* A, B, G, auto */
u8 scan_mode;/* active, passive */
u8 radio_enable;
u8 preamble;/* long, short, auto */
u8 vrtl_carrier_sense;/* Enable, Disable, Auto */
u8 vcs_type;/* RTS/CTS, CTS-to-self */
u16 rts_thresh;
u16 frag_thresh;
u8 adhoc_tx_pwr;
u8 soft_ap;
u8 power_mgnt;
u8 ips_mode;
u8 lps_level;
#ifdef CONFIG_LPS_1T1R
u8 lps_1t1r;
#endif
u8 lps_chk_by_tp;
#ifdef CONFIG_WOWLAN
u8 wow_power_mgnt;
u8 wow_lps_level;
#ifdef CONFIG_LPS_1T1R
u8 wow_lps_1t1r;
#endif
#endif /* CONFIG_WOWLAN */
u8 smart_ps;
#ifdef CONFIG_WMMPS_STA
u8 wmm_smart_ps;
#endif /* CONFIG_WMMPS_STA */
u8 usb_rxagg_mode;
u8 dynamic_agg_enable;
u8 long_retry_lmt;
u8 short_retry_lmt;
u16 busy_thresh;
u16 max_bss_cnt;
u8 ack_policy;
u8 mp_mode;
#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTW_CUSTOMER_STR)
u8 mp_customer_str;
#endif
u8 mp_dm;
u8 software_encrypt;
u8 software_decrypt;
#ifdef CONFIG_TX_EARLY_MODE
u8 early_mode;
#endif
#ifdef CONFIG_RTW_SW_LED
u8 led_ctrl;
#endif
#ifdef CONFIG_NARROWBAND_SUPPORTING
u8 rtw_nb_config;
#endif
u8 acm_method;
/* WMM */
u8 wmm_enable;
#ifdef CONFIG_WMMPS_STA
/* uapsd (unscheduled automatic power-save delivery) = a kind of wmmps */
u8 uapsd_max_sp_len;
/* BIT0: AC_VO UAPSD, BIT1: AC_VI UAPSD, BIT2: AC_BK UAPSD, BIT3: AC_BE UAPSD */
u8 uapsd_ac_enable;
#endif /* CONFIG_WMMPS_STA */
WLAN_BSSID_EX dev_network;
#if CONFIG_TX_AC_LIFETIME
u8 tx_aclt_flags;
struct tx_aclt_conf_t tx_aclt_confs[TX_ACLT_CONF_NUM];
#endif
u8 tx_bw_mode;
#ifdef CONFIG_AP_MODE
u8 bmc_tx_rate;
#if CONFIG_RTW_AP_DATA_BMC_TO_UC
u8 ap_src_b2u_flags;
u8 ap_fwd_b2u_flags;
#endif
#endif
#ifdef CONFIG_RTW_MESH
#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
u8 msrc_b2u_flags;
u8 mfwd_b2u_flags;
#endif
#endif
#ifdef CONFIG_80211N_HT
u8 ht_enable;
/* 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160MHz */
/* 2.4G use bit 0 ~ 3, 5G use bit 4 ~ 7 */
/* 0x21 means enable 2.4G 40MHz & 5G 80MHz */
u8 bw_mode;
u8 ampdu_enable;/* for tx */
u8 rx_stbc;
u8 rx_ampdu_amsdu;/* Rx A-MPDU Supports A-MSDU is permitted */
u8 tx_ampdu_amsdu;/* Tx A-MPDU Supports A-MSDU is permitted */
u8 tx_quick_addba_req;
u8 rx_ampdu_sz_limit_by_nss_bw[4][4]; /* 1~4SS, BW20~BW160 */
/* Short GI support Bit Map */
/* BIT0 - 20MHz, 1: support, 0: non-support */
/* BIT1 - 40MHz, 1: support, 0: non-support */
/* BIT2 - 80MHz, 1: support, 0: non-support */
/* BIT3 - 160MHz, 1: support, 0: non-support */
u8 short_gi;
/* BIT0: Enable VHT LDPC Rx, BIT1: Enable VHT LDPC Tx, BIT4: Enable HT LDPC Rx, BIT5: Enable HT LDPC Tx */
u8 ldpc_cap;
/* BIT0: Enable VHT STBC Rx, BIT1: Enable VHT STBC Tx, BIT4: Enable HT STBC Rx, BIT5: Enable HT STBC Tx */
u8 stbc_cap;
#if defined(CONFIG_RTW_TX_NPATH_EN)
u8 tx_npath;
#endif
#if defined(CONFIG_RTW_PATH_DIV)
u8 path_div;
#endif
/*
* BIT0: Enable VHT SU Beamformer
* BIT1: Enable VHT SU Beamformee
* BIT2: Enable VHT MU Beamformer, depend on VHT SU Beamformer
* BIT3: Enable VHT MU Beamformee, depend on VHT SU Beamformee
* BIT4: Enable HT Beamformer
* BIT5: Enable HT Beamformee
*/
u8 beamform_cap;
u8 beamformer_rf_num;
u8 beamformee_rf_num;
#endif /* CONFIG_80211N_HT */
#ifdef CONFIG_80211AC_VHT
u8 vht_enable; /* 0:disable, 1:enable, 2:auto */
u8 vht_24g_enable; /* 0:disable, 1:enable */
u8 ampdu_factor;
u8 vht_rx_mcs_map[2];
#endif /* CONFIG_80211AC_VHT */
u8 low_power ;
u8 wifi_spec;/* !turbo_mode */
u8 trx_path_bmp; /* [7:4]TX path bmp, [0:3]RX path bmp, 0: not specified */
u8 tx_path_lmt; /* limit of TX path number, 0: not specified */
u8 rx_path_lmt; /* limit of TX path number, 0: not specified */
u8 tx_nss;
u8 rx_nss;
#ifdef CONFIG_REGD_SRC_FROM_OS
enum regd_src_t regd_src;
#endif
char alpha2[2];
u8 channel_plan;
u8 excl_chs[MAX_CHANNEL_NUM];
u8 full_ch_in_p2p_handshake; /* 0: reply only softap channel, 1: reply full channel list*/
#ifdef CONFIG_BT_COEXIST
u8 btcoex;
u8 bt_iso;
u8 bt_sco;
u8 bt_ampdu;
u8 ant_num;
u8 single_ant_path;
#endif
BOOLEAN bAcceptAddbaReq;
u8 antdiv_cfg;
u8 antdiv_type;
u8 drv_ant_band_switch;
u8 switch_usb_mode;
u8 usbss_enable;/* 0:disable,1:enable */
u8 hwpdn_mode;/* 0:disable,1:enable,2:decide by EFUSE config */
u8 hwpwrp_detect;/* 0:disable,1:enable */
u8 hw_wps_pbc;/* 0:disable,1:enable */
#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
char adaptor_info_caching_file_path[PATH_LENGTH_MAX];
#endif
#ifdef CONFIG_LAYER2_ROAMING
u8 max_roaming_times; /* the max number driver will try to roaming */
#endif
#ifdef CONFIG_IOL
u8 fw_iol; /* enable iol without other concern */
#endif
#ifdef CONFIG_80211D
u8 enable80211d;
#endif
u8 ifname[16];
u8 if2name[16];
u8 notch_filter;
/* for pll reference clock selction */
u8 pll_ref_clk_sel;
/* define for tx power adjust */
#if CONFIG_TXPWR_LIMIT
u8 RegEnableTxPowerLimit;
#endif
u8 RegEnableTxPowerByRate;
u8 target_tx_pwr_valid;
s8 target_tx_pwr_2g[RF_PATH_MAX][RATE_SECTION_NUM];
#if CONFIG_IEEE80211_BAND_5GHZ
s8 target_tx_pwr_5g[RF_PATH_MAX][RATE_SECTION_NUM - 1];
#endif
s16 antenna_gain;
u8 tsf_update_pause_factor;
u8 tsf_update_restore_factor;
s8 TxBBSwing_2G;
s8 TxBBSwing_5G;
u8 AmplifierType_2G;
u8 AmplifierType_5G;
u8 bEn_RFE;
u8 RFE_Type;
u8 PowerTracking_Type;
u8 GLNA_Type;
u8 check_fw_ps;
u8 RegPwrTrimEnable;
#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
u8 load_phy_file;
u8 RegDecryptCustomFile;
#endif
#ifdef CONFIG_CONCURRENT_MODE
u8 virtual_iface_num;
#ifdef CONFIG_P2P
u8 sel_p2p_iface;
#endif
#endif
u8 qos_opt_enable;
u8 hiq_filter;
u8 adaptivity_en;
u8 adaptivity_mode;
s8 adaptivity_th_l2h_ini;
s8 adaptivity_th_edcca_hl_diff;
u8 boffefusemask;
BOOLEAN bFileMaskEfuse;
BOOLEAN bBTFileMaskEfuse;
#ifdef CONFIG_RTW_ACS
u8 acs_auto_scan;
u8 acs_mode;
#endif
#ifdef CONFIG_BACKGROUND_NOISE_MONITOR
u8 nm_mode;
#endif
u32 reg_rxgain_offset_2g;
u32 reg_rxgain_offset_5gl;
u32 reg_rxgain_offset_5gm;
u32 reg_rxgain_offset_5gh;
#ifdef CONFIG_DFS_MASTER
u8 dfs_region_domain;
#endif
u8 amsdu_mode;
#ifdef CONFIG_MCC_MODE
u8 en_mcc;
u32 rtw_mcc_single_tx_cri;
u32 rtw_mcc_ap_bw20_target_tx_tp;
u32 rtw_mcc_ap_bw40_target_tx_tp;
u32 rtw_mcc_ap_bw80_target_tx_tp;
u32 rtw_mcc_sta_bw20_target_tx_tp;
u32 rtw_mcc_sta_bw40_target_tx_tp;
u32 rtw_mcc_sta_bw80_target_tx_tp;
s8 rtw_mcc_policy_table_idx;
u8 rtw_mcc_duration;
u8 rtw_mcc_enable_runtime_duration;
u8 rtw_mcc_phydm_offload;
#endif /* CONFIG_MCC_MODE */
#ifdef CONFIG_RTW_NAPI
u8 en_napi;
#ifdef CONFIG_RTW_NAPI_DYNAMIC
u32 napi_threshold; /* unit: Mbps */
#endif /* CONFIG_RTW_NAPI_DYNAMIC */
#ifdef CONFIG_RTW_GRO
u8 en_gro;
#endif /* CONFIG_RTW_GRO */
#endif /* CONFIG_RTW_NAPI */
#ifdef CONFIG_WOWLAN
u8 wowlan_enable;
u8 wakeup_event;
u8 suspend_type;
#endif
u8 recvbuf_nr;
#ifdef CONFIG_SUPPORT_TRX_SHARED
u8 trx_share_mode;
#endif
u8 check_hw_status;
u8 wowlan_sta_mix_mode;
#ifdef CONFIG_PCI_HCI
u32 pci_aspm_config;
u32 pci_dynamic_aspm_linkctrl;
#endif
u8 iqk_fw_offload;
u8 ch_switch_offload;
#ifdef CONFIG_TDLS
u8 en_tdls;
#endif
#ifdef CONFIG_ADVANCE_OTA
u8 adv_ota;
#endif
#ifdef CONFIG_FW_OFFLOAD_PARAM_INIT
u8 fw_param_init;
#endif
#ifdef CONFIG_DYNAMIC_SOML
u8 dyn_soml_en;
u8 dyn_soml_train_num;
u8 dyn_soml_interval;
u8 dyn_soml_period;
u8 dyn_soml_delay;
#endif
#ifdef CONFIG_FW_HANDLE_TXBCN
u8 fw_tbtt_rpt;
#endif
#ifdef DBG_LA_MODE
u8 la_mode_en;
#endif
u32 phydm_ability;
u32 halrf_ability;
#ifdef CONFIG_TDMADIG
u8 tdmadig_en;
u8 tdmadig_mode;
u8 tdmadig_dynamic;
#endif/*CONFIG_TDMADIG*/
u8 en_dyn_rrsr;
u32 set_rrsr_value;
#ifdef CONFIG_RTW_MESH
u8 peer_alive_based_preq;
#endif
#ifdef RTW_BUSY_DENY_SCAN
/*
* scan_interval_thr means scan interval threshold which is used to
* judge if user is in scan page or not.
* If scan interval < scan_interval_thr we guess user is in scan page,
* and driver won't deny any scan request at that time.
* Its default value comes from compiler flag
* BUSY_TRAFFIC_SCAN_DENY_PERIOD, and unit is ms.
*/
u32 scan_interval_thr;
#endif
#ifdef CONFIG_RTL8822C_XCAP_NEW_POLICY
u8 rtw_8822c_xcap_overwrite;
#endif
#ifdef CONFIG_RTW_MULTI_AP
u8 unassoc_sta_mode_of_stype[UNASOC_STA_SRC_NUM];
u16 max_unassoc_sta_cnt;
#endif
};
/* For registry parameters */
#define RGTRY_OFT(field) ((u32)FIELD_OFFSET(struct registry_priv, field))
#define RGTRY_SZ(field) sizeof(((struct registry_priv *) 0)->field)
#define GetRegAmplifierType2G(_Adapter) (_Adapter->registrypriv.AmplifierType_2G)
#define GetRegAmplifierType5G(_Adapter) (_Adapter->registrypriv.AmplifierType_5G)
#define GetRegTxBBSwing_2G(_Adapter) (_Adapter->registrypriv.TxBBSwing_2G)
#define GetRegTxBBSwing_5G(_Adapter) (_Adapter->registrypriv.TxBBSwing_5G)
#define GetRegbENRFEType(_Adapter) (_Adapter->registrypriv.bEn_RFE)
#define GetRegRFEType(_Adapter) (_Adapter->registrypriv.RFE_Type)
#define GetRegGLNAType(_Adapter) (_Adapter->registrypriv.GLNA_Type)
#define GetRegPowerTrackingType(_Adapter) (_Adapter->registrypriv.PowerTracking_Type)
#define WOWLAN_IS_STA_MIX_MODE(_Adapter) (_Adapter->registrypriv.wowlan_sta_mix_mode)
#define BSSID_OFT(field) ((u32)FIELD_OFFSET(WLAN_BSSID_EX, field))
#define BSSID_SZ(field) sizeof(((PWLAN_BSSID_EX) 0)->field)
#define BW_MODE_2G(bw_mode) ((bw_mode) & 0x0F)
#define BW_MODE_5G(bw_mode) ((bw_mode) >> 4)
#ifdef CONFIG_80211N_HT
#define REGSTY_BW_2G(regsty) BW_MODE_2G((regsty)->bw_mode)
#define REGSTY_BW_5G(regsty) BW_MODE_5G((regsty)->bw_mode)
#else
#define REGSTY_BW_2G(regsty) CHANNEL_WIDTH_20
#define REGSTY_BW_5G(regsty) CHANNEL_WIDTH_20
#endif
#define REGSTY_IS_BW_2G_SUPPORT(regsty, bw) (REGSTY_BW_2G((regsty)) >= (bw))
#define REGSTY_IS_BW_5G_SUPPORT(regsty, bw) (REGSTY_BW_5G((regsty)) >= (bw))
#ifdef CONFIG_80211AC_VHT
#define REGSTY_IS_11AC_ENABLE(regsty) ((regsty)->vht_enable != 0)
#define REGSTY_IS_11AC_AUTO(regsty) ((regsty)->vht_enable == 2)
#define REGSTY_IS_11AC_24G_ENABLE(regsty) ((regsty)->vht_24g_enable != 0)
#else
#define REGSTY_IS_11AC_ENABLE(regsty) 0
#define REGSTY_IS_11AC_AUTO(regsty) 0
#define REGSTY_IS_11AC_24G_ENABLE(regsty) 0
#endif
#ifdef CONFIG_REGD_SRC_FROM_OS
#define REGSTY_REGD_SRC_FROM_OS(regsty) ((regsty)->regd_src == REGD_SRC_OS)
#else
#define REGSTY_REGD_SRC_FROM_OS(regsty) 0
#endif
typedef struct rtw_if_operations {
int __must_check (*read)(struct dvobj_priv *d, unsigned int addr, void *buf,
size_t len, bool fixed);
int __must_check (*write)(struct dvobj_priv *d, unsigned int addr, void *buf,
size_t len, bool fixed);
} RTW_IF_OPS, *PRTW_IF_OPS;
#ifdef CONFIG_SDIO_HCI
#include <drv_types_sdio.h>
#define INTF_DATA SDIO_DATA
#define INTF_OPS PRTW_IF_OPS
#elif defined(CONFIG_GSPI_HCI)
#include <drv_types_gspi.h>
#define INTF_DATA GSPI_DATA
#elif defined(CONFIG_PCI_HCI)
#include <drv_types_pci.h>
#endif
#define get_hw_port(adapter) (adapter->hw_port)
#ifdef CONFIG_CONCURRENT_MODE
#define is_primary_adapter(adapter) (adapter->adapter_type == PRIMARY_ADAPTER)
#define is_vir_adapter(adapter) (adapter->adapter_type == VIRTUAL_ADAPTER)
#else
#define is_primary_adapter(adapter) (1)
#define is_vir_adapter(adapter) (0)
#endif
#define GET_PRIMARY_ADAPTER(padapter) (((_adapter *)padapter)->dvobj->padapters[IFACE_ID0])
#define GET_IFACE_NUMS(padapter) (((_adapter *)padapter)->dvobj->iface_nums)
#define GET_ADAPTER(padapter, iface_id) (((_adapter *)padapter)->dvobj->padapters[iface_id])
#define GetDefaultAdapter(padapter) padapter
enum _IFACE_ID {
IFACE_ID0, /*PRIMARY_ADAPTER*/
IFACE_ID1,
IFACE_ID2,
IFACE_ID3,
IFACE_ID4,
IFACE_ID5,
IFACE_ID6,
IFACE_ID7,
IFACE_ID_MAX,
};
#define VIF_START_ID 1
#ifdef CONFIG_DBG_COUNTER
struct rx_logs {
u32 intf_rx;
u32 intf_rx_err_recvframe;
u32 intf_rx_err_skb;
u32 intf_rx_report;
u32 core_rx;
u32 core_rx_pre;
u32 core_rx_pre_ver_err;
u32 core_rx_pre_mgmt;
u32 core_rx_pre_mgmt_err_80211w;
u32 core_rx_pre_mgmt_err;
u32 core_rx_pre_ctrl;
u32 core_rx_pre_ctrl_err;
u32 core_rx_pre_data;
u32 core_rx_pre_data_wapi_seq_err;
u32 core_rx_pre_data_wapi_key_err;
u32 core_rx_pre_data_handled;
u32 core_rx_pre_data_err;
u32 core_rx_pre_data_unknown;
u32 core_rx_pre_unknown;
u32 core_rx_enqueue;
u32 core_rx_dequeue;
u32 core_rx_post;
u32 core_rx_post_decrypt;
u32 core_rx_post_decrypt_wep;
u32 core_rx_post_decrypt_tkip;
u32 core_rx_post_decrypt_aes;
u32 core_rx_post_decrypt_wapi;
u32 core_rx_post_decrypt_gcmp;
u32 core_rx_post_decrypt_hw;
u32 core_rx_post_decrypt_unknown;
u32 core_rx_post_decrypt_err;
u32 core_rx_post_defrag_err;
u32 core_rx_post_portctrl_err;
u32 core_rx_post_indicate;
u32 core_rx_post_indicate_in_oder;
u32 core_rx_post_indicate_reoder;
u32 core_rx_post_indicate_err;
u32 os_indicate;
u32 os_indicate_ap_mcast;
u32 os_indicate_ap_forward;
u32 os_indicate_ap_self;
u32 os_indicate_err;
u32 os_netif_ok;
u32 os_netif_err;
};
struct tx_logs {
u32 os_tx;
u32 os_tx_err_up;
u32 os_tx_err_xmit;
u32 os_tx_m2u;
u32 os_tx_m2u_ignore_fw_linked;
u32 os_tx_m2u_ignore_self;
u32 os_tx_m2u_entry;
u32 os_tx_m2u_entry_err_xmit;
u32 os_tx_m2u_entry_err_skb;
u32 os_tx_m2u_stop;
u32 core_tx;
u32 core_tx_err_pxmitframe;
u32 core_tx_err_brtx;
u32 core_tx_upd_attrib;
u32 core_tx_upd_attrib_adhoc;
u32 core_tx_upd_attrib_sta;
u32 core_tx_upd_attrib_ap;
u32 core_tx_upd_attrib_unknown;
u32 core_tx_upd_attrib_dhcp;
u32 core_tx_upd_attrib_icmp;
u32 core_tx_upd_attrib_active;
u32 core_tx_upd_attrib_err_ucast_sta;
u32 core_tx_upd_attrib_err_ucast_ap_link;
u32 core_tx_upd_attrib_err_sta;
u32 core_tx_upd_attrib_err_link;
u32 core_tx_upd_attrib_err_sec;
u32 core_tx_ap_enqueue_warn_fwstate;
u32 core_tx_ap_enqueue_warn_sta;
u32 core_tx_ap_enqueue_warn_nosta;
u32 core_tx_ap_enqueue_warn_link;
u32 core_tx_ap_enqueue_warn_trigger;
u32 core_tx_ap_enqueue_mcast;
u32 core_tx_ap_enqueue_ucast;
u32 core_tx_ap_enqueue;
u32 intf_tx;
u32 intf_tx_pending_ac;
u32 intf_tx_pending_fw_under_survey;
u32 intf_tx_pending_fw_under_linking;
u32 intf_tx_pending_xmitbuf;
u32 intf_tx_enqueue;
u32 core_tx_enqueue;
u32 core_tx_enqueue_class;
u32 core_tx_enqueue_class_err_sta;
u32 core_tx_enqueue_class_err_nosta;
u32 core_tx_enqueue_class_err_fwlink;
u32 intf_tx_direct;
u32 intf_tx_direct_err_coalesce;
u32 intf_tx_dequeue;
u32 intf_tx_dequeue_err_coalesce;
u32 intf_tx_dump_xframe;
u32 intf_tx_dump_xframe_err_txdesc;
u32 intf_tx_dump_xframe_err_port;
};
struct int_logs {
u32 all;
u32 err;
u32 tbdok;
u32 tbder;
u32 bcnderr;
u32 bcndma;
u32 bcndma_e;
u32 rx;
u32 rx_rdu;
u32 rx_fovw;
u32 txfovw;
u32 mgntok;
u32 highdok;
u32 bkdok;
u32 bedok;
u32 vidok;
u32 vodok;
};
#endif /* CONFIG_DBG_COUNTER */
struct debug_priv {
u32 dbg_sdio_free_irq_error_cnt;
u32 dbg_sdio_alloc_irq_error_cnt;
u32 dbg_sdio_free_irq_cnt;
u32 dbg_sdio_alloc_irq_cnt;
u32 dbg_sdio_deinit_error_cnt;
u32 dbg_sdio_init_error_cnt;
u32 dbg_suspend_error_cnt;
u32 dbg_suspend_cnt;
u32 dbg_resume_cnt;
u32 dbg_resume_error_cnt;
u32 dbg_deinit_fail_cnt;
u32 dbg_carddisable_cnt;
u32 dbg_carddisable_error_cnt;
u32 dbg_ps_insuspend_cnt;
u32 dbg_dev_unload_inIPS_cnt;
u32 dbg_wow_leave_ps_fail_cnt;
u32 dbg_scan_pwr_state_cnt;
u32 dbg_downloadfw_pwr_state_cnt;
u32 dbg_fw_read_ps_state_fail_cnt;
u32 dbg_leave_ips_fail_cnt;
u32 dbg_leave_lps_fail_cnt;
u32 dbg_h2c_leave32k_fail_cnt;
u32 dbg_diswow_dload_fw_fail_cnt;
u32 dbg_enwow_dload_fw_fail_cnt;
u32 dbg_ips_drvopen_fail_cnt;
u32 dbg_poll_fail_cnt;
u32 dbg_rpwm_toogle_cnt;
u32 dbg_rpwm_timeout_fail_cnt;
u32 dbg_sreset_cnt;
u32 dbg_fw_mem_dl_error_cnt;
u64 dbg_rx_fifo_last_overflow;
u64 dbg_rx_fifo_curr_overflow;
u64 dbg_rx_fifo_diff_overflow;
};
struct rtw_traffic_statistics {
/* tx statistics */
u64 tx_bytes;
u64 tx_pkts;
u64 tx_drop;
u64 cur_tx_bytes;
u64 last_tx_bytes;
u32 cur_tx_tp; /* Tx throughput in Mbps. */
/* rx statistics */
u64 rx_bytes;
u64 rx_pkts;
u64 rx_drop;
u64 cur_rx_bytes;
u64 last_rx_bytes;
u32 cur_rx_tp; /* Rx throughput in Mbps. */
};
#define SEC_CAP_CHK_BMC BIT0
#define SEC_CAP_CHK_EXTRA_SEC BIT1 /* 256 bit */
#define SEC_CAP_CHK_WRITE_CAM_NEW_RULE BIT2
#define MACID_DROP BIT0
#define MACID_DROP_INDIRECT BIT1
#define SEC_STATUS_STA_PK_GK_CONFLICT_DIS_BMC_SEARCH BIT0
struct sec_cam_bmp {
u32 m0;
#if (SEC_CAM_ENT_NUM_SW_LIMIT > 32)
u32 m1;
#endif
#if (SEC_CAM_ENT_NUM_SW_LIMIT > 64)
u32 m2;
#endif
#if (SEC_CAM_ENT_NUM_SW_LIMIT > 96)
u32 m3;
#endif
};
struct cam_ctl_t {
_lock lock;
u8 sec_cap;
u32 flags;
u8 num;
struct sec_cam_bmp used;
_mutex sec_cam_access_mutex;
};
struct sec_cam_ent {
u16 ctrl;
u8 mac[ETH_ALEN];
u8 key[16];
};
#define KEY_FMT "%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x"
#define KEY_ARG(x) ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2], ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5], \
((u8 *)(x))[6], ((u8 *)(x))[7], ((u8 *)(x))[8], ((u8 *)(x))[9], ((u8 *)(x))[10], ((u8 *)(x))[11], \
((u8 *)(x))[12], ((u8 *)(x))[13], ((u8 *)(x))[14], ((u8 *)(x))[15]
#define RTW_DEFAULT_MGMT_MACID 1
struct macid_bmp {
u32 m0;
#if (MACID_NUM_SW_LIMIT > 32)
u32 m1;
#endif
#if (MACID_NUM_SW_LIMIT > 64)
u32 m2;
#endif
#if (MACID_NUM_SW_LIMIT > 96)
u32 m3;
#endif
};
#ifdef CONFIG_CLIENT_PORT_CFG
struct clt_port_t{
_lock lock;
u8 bmp;
s8 num;
};
#define get_clt_num(adapter) (adapter_to_dvobj(adapter)->clt_port.num)
#endif
struct macid_ctl_t {
_lock lock;
u8 num;
struct macid_bmp used;
struct macid_bmp bmc;
struct macid_bmp if_g[CONFIG_IFACE_NUMBER];
struct macid_bmp ch_g[2]; /* 2 ch concurrency */
u8 iface_bmc[CONFIG_IFACE_NUMBER]; /* bmc TX macid for each iface*/
u8 h2c_msr[MACID_NUM_SW_LIMIT];
u8 bw[MACID_NUM_SW_LIMIT];
u8 vht_en[MACID_NUM_SW_LIMIT];
u32 rate_bmp0[MACID_NUM_SW_LIMIT];
u32 rate_bmp1[MACID_NUM_SW_LIMIT];
u8 op_num[H2C_MSR_ROLE_MAX]; /* number of macid having h2c_msr's OPMODE = 1 for specific ROLE */
struct sta_info *sta[MACID_NUM_SW_LIMIT]; /* corresponding stainfo when macid is not shared */
u8 macid_cap;
/* macid sleep registers */
#ifdef CONFIG_PROTSEL_MACSLEEP
u16 reg_sleep_ctrl;
u16 reg_sleep_info;
u16 reg_drop_ctrl;
u16 reg_drop_info;
#else
u16 reg_sleep_m0;
u16 reg_drop_m0;
#if (MACID_NUM_SW_LIMIT > 32)
u16 reg_sleep_m1;
u16 reg_drop_m1;
#endif
#if (MACID_NUM_SW_LIMIT > 64)
u16 reg_sleep_m2;
u16 reg_drop_m2;
#endif
#if (MACID_NUM_SW_LIMIT > 96)
u16 reg_sleep_m3;
u16 reg_drop_m3;
#endif
#endif
u16 macid_txrpt;
u8 macid_txrpt_pgsz;
};
/* used for rf_ctl_t.rate_bmp_cck_ofdm */
#define RATE_BMP_CCK 0x000F
#define RATE_BMP_OFDM 0xFFF0
#define RATE_BMP_HAS_CCK(_bmp_cck_ofdm) (_bmp_cck_ofdm & RATE_BMP_CCK)
#define RATE_BMP_HAS_OFDM(_bmp_cck_ofdm) (_bmp_cck_ofdm & RATE_BMP_OFDM)
#define RATE_BMP_GET_CCK(_bmp_cck_ofdm) (_bmp_cck_ofdm & RATE_BMP_CCK)
#define RATE_BMP_GET_OFDM(_bmp_cck_ofdm) ((_bmp_cck_ofdm & RATE_BMP_OFDM) >> 4)
/* used for rf_ctl_t.rate_bmp_ht_by_bw */
#define RATE_BMP_HT_1SS 0x000000FF
#define RATE_BMP_HT_2SS 0x0000FF00
#define RATE_BMP_HT_3SS 0x00FF0000
#define RATE_BMP_HT_4SS 0xFF000000
#define RATE_BMP_HAS_HT_1SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_1SS)
#define RATE_BMP_HAS_HT_2SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_2SS)
#define RATE_BMP_HAS_HT_3SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_3SS)
#define RATE_BMP_HAS_HT_4SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_4SS)
#define RATE_BMP_GET_HT_1SS(_bmp_ht) (_bmp_ht & RATE_BMP_HT_1SS)
#define RATE_BMP_GET_HT_2SS(_bmp_ht) ((_bmp_ht & RATE_BMP_HT_2SS) >> 8)
#define RATE_BMP_GET_HT_3SS(_bmp_ht) ((_bmp_ht & RATE_BMP_HT_3SS) >> 16)
#define RATE_BMP_GET_HT_4SS(_bmp_ht) ((_bmp_ht & RATE_BMP_HT_4SS) >> 24)
/* used for rf_ctl_t.rate_bmp_vht_by_bw */
#define RATE_BMP_VHT_1SS 0x00000003FF
#define RATE_BMP_VHT_2SS 0x00000FFC00
#define RATE_BMP_VHT_3SS 0x003FF00000
#define RATE_BMP_VHT_4SS 0xFFC0000000
#define RATE_BMP_HAS_VHT_1SS(_bmp_vht) (_bmp_vht & RATE_BMP_VHT_1SS)
#define RATE_BMP_HAS_VHT_2SS(_bmp_vht) (_bmp_vht & RATE_BMP_VHT_2SS)
#define RATE_BMP_HAS_VHT_3SS(_bmp_vht) (_bmp_vht & RATE_BMP_VHT_3SS)
#define RATE_BMP_HAS_VHT_4SS(_bmp_vht) (_bmp_vht & RATE_BMP_VHT_4SS)
#define RATE_BMP_GET_VHT_1SS(_bmp_vht) ((u16)(_bmp_vht & RATE_BMP_VHT_1SS))
#define RATE_BMP_GET_VHT_2SS(_bmp_vht) ((u16)((_bmp_vht & RATE_BMP_VHT_2SS) >> 10))
#define RATE_BMP_GET_VHT_3SS(_bmp_vht) ((u16)((_bmp_vht & RATE_BMP_VHT_3SS) >> 20))
#define RATE_BMP_GET_VHT_4SS(_bmp_vht) ((u16)((_bmp_vht & RATE_BMP_VHT_4SS) >> 30))
#define TXPWR_LMT_REF_VHT_FROM_HT BIT0
#define TXPWR_LMT_REF_HT_FROM_VHT BIT1
#define TXPWR_LMT_HAS_CCK_1T BIT0
#define TXPWR_LMT_HAS_CCK_2T BIT1
#define TXPWR_LMT_HAS_CCK_3T BIT2
#define TXPWR_LMT_HAS_CCK_4T BIT3
#define TXPWR_LMT_HAS_OFDM_1T BIT4
#define TXPWR_LMT_HAS_OFDM_2T BIT5
#define TXPWR_LMT_HAS_OFDM_3T BIT6