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3 stars written in Verilog
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Verilog Ethernet components for FPGA implementation

Verilog 2,367 710 Updated Jul 18, 2024

synthesiseable ieee 754 floating point library in verilog

Verilog 544 147 Updated Mar 13, 2023

An FPGA-based GZIP (Deflate algorithm) compressor, which inputs raw data and outputs standard GZIP format (as known as .gz file format). 基于FPGA的GZIP压缩器。输入原始数据,输出标准的GZIP格式,即常见的 .gz / .tar.gz 文件的格式。

Verilog 102 23 Updated Sep 15, 2023