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Commits on Oct 25, 2019

• Reduce assembly flattening memory usage by 10% by eliminating some unnecessary instantiation pressure and specializing for some common assembly cases

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Commits on Oct 4, 2019

• Update README.md

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Commits on Oct 1, 2019

• Implement support for probing the final signal level of any top-level output wire once a simulation has completed

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Commits on Sep 30, 2019

• Fix bug in macro compiler's assembly_flattener that led to parallel identically-named inner wire structures being assigned identical names

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Commits on Sep 28, 2019

• Implement optimization in macro compiler to only store one instance of any unique delay

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• Fix bugs in map mpl library causing presence checks to be inverted, and remove calls to fail

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Commits on Sep 27, 2019

• Fix gate error in test_preprocessing

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• Fix include guard type in xor_function

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Commits on Sep 26, 2019

• Merge remote-tracking branch 'origin/master'

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• Fix missing include in macro compiler

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Commits on Sep 24, 2019

• Update README.md

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• Update README.md

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• Update README.md

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• Implement macro system for assembling arbitrarily-nested, multi-output digital systems

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Commits on Sep 16, 2019

• Merge remote-tracking branch 'origin/master'

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• Implement several basic logic functions in "block" directory

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Commits on Sep 15, 2019

• Create README.md

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• Initial commit

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