Is it possible to set the processing width with the "width"/"W" parameter?

[BLangOS]

In the servant module there is a parameter "with" which is mapped to the parameter "W" of the serv_top module.
As far as I understand this parameter, it can be used to change the internal processing width of the serv-processor.
I have therefore tried to change the parameter to 2 or 4 in order to process 2 or 4 bits per clock cycle. However, I received warnings from yosys that the synthesis was resizing vectors, e.g:
“Warning: Resizing cell port $paramod$3eec962ce36018ce51e96f0857ef22d18d21aa80\serv_top.bufreg2.o_q from 2 bits to 1 bits.”
Further warnings reported that inputs are not connected, e.g:
“Warning: Wire servant.\cpu.cpu.state.o_cnt [0] is used but has no driver.”
Is it possible to change the processing width of the processor or does the “width” parameter have a different purpose?
Many thanks for more information about this parameter.