iCESugar FPGA Board (base on iCE40UP5k)

Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation

Various iCE40 cores / projects to play around with (mostly targeted at the icebreaker)

FM sound source written in Verilog, fully compatible with YM2612, YM3438 (JT12), YM2203 (JT03) and YM2610 (JT10)

Public examples of ICE40 HX8K examples using Icestorm

Upduino v2 with the ice40 up5k FPGA demos

A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs

A small 6502 system with MS BASIC in ROM

Low-area DVI experiment for iCE40 UP5k and HX1k FPGAs

A complete 65C02 computer with VGA output on a Lattice Ultra Plus FPGA

Mods of the FPGA code from @jamesbowman's Gameduino file repository

ice40 UltraPlus demos

Mecrisp-Ice Forth running on 16bit j1a processor (iCE40UP5k based UPduino board) with full 15kB of bram and 48bit Floating Point Library.

Using UPduino 3.0 to follow along with the book 'Designing Video Game Hardware In Verilog' by Steven Hugg