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g-oikonomoug-oikonomou
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Merge branch 'develop' into bugfix/simplelink/board
2 parents 5cecd5f + f101e47 commit 3cc4d2d

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20 files changed

+61
-286
lines changed

20 files changed

+61
-286
lines changed

‎arch/cpu/cc26xx-cc13xx/Makefile.cc13xx

+1-1
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,6 @@ TI_XXWARE_PATH = lib/cc13xxware
22

33
CONTIKI_CPU_SOURCEFILES += smartrf-settings.c prop-mode.c prop-mode-tx-power.c
44

5-
CFLAGS += -DCPU_FAMILY_CC13XX=1
5+
CFLAGS += -DCPU_FAMILY_CC13X0=1 -DCPU_FAMILY_CC13XX=1
66

77
include $(CONTIKI_CPU)/Makefile.cc26xx-cc13xx

‎arch/cpu/cc26xx-cc13xx/Makefile.cc26x0r2f

+2
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,5 @@
11
TI_XXWARE_PATH = lib/cc2640r2-sdk
22

3+
CFLAGS += -DCPU_FAMILY_CC26X0R2=1 -DCPU_FAMILY_CC26XXR2=1
4+
35
include $(CONTIKI_CPU)/Makefile.cc26xx-cc13xx

‎arch/cpu/cc26xx-cc13xx/Makefile.cc26xx

+2
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,5 @@
11
TI_XXWARE_PATH = lib/cc26xxware
22

3+
CFLAGS += -DCPU_FAMILY_CC26X0=1 -DCPU_FAMILY_CC26XX=1
4+
35
include $(CONTIKI_CPU)/Makefile.cc26xx-cc13xx

‎arch/cpu/cc26xx-cc13xx/cc13xx-cc26xx-conf.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -64,11 +64,11 @@
6464
* project has specified otherwise. Depending on the final mode, determine a
6565
* default channel (again, if unspecified) and configure RDC params
6666
*/
67-
#if CPU_FAMILY_CC13XX
67+
#if CPU_FAMILY_CC13X0
6868
#ifndef CC13XX_CONF_PROP_MODE
6969
#define CC13XX_CONF_PROP_MODE 1
7070
#endif /* CC13XX_CONF_PROP_MODE */
71-
#endif /* CPU_FAMILY_CC13XX */
71+
#endif /* CPU_FAMILY_CC13X0 */
7272

7373
#if CC13XX_CONF_PROP_MODE
7474
#ifndef NETSTACK_CONF_RADIO

‎arch/cpu/cc26xx-cc13xx/dev/gpio-hal-arch.c

+1-10
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,6 @@
3939
/*---------------------------------------------------------------------------*/
4040
#include "contiki.h"
4141
#include "ti-lib.h"
42-
#include "ti-lib-rom.h"
4342
#include "dev/gpio-hal.h"
4443

4544
#include <stdint.h>
@@ -53,11 +52,7 @@ gpio_hal_arch_pin_cfg_set(gpio_hal_pin_t pin, gpio_hal_pin_cfg_t cfg)
5352
gpio_hal_pin_cfg_t tmp;
5453

5554
/* Clear settings that we are about to change, keep everything else */
56-
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
5755
config = ti_lib_ioc_port_configure_get(pin);
58-
#else
59-
config = ti_lib_rom_ioc_port_configure_get(pin);
60-
#endif
6156
config &= ~CONFIG_MASK;
6257

6358
tmp = cfg & GPIO_HAL_PIN_CFG_EDGE_BOTH;
@@ -87,7 +82,7 @@ gpio_hal_arch_pin_cfg_set(gpio_hal_pin_t pin, gpio_hal_pin_cfg_t cfg)
8782
config |= IOC_INT_ENABLE;
8883
}
8984

90-
ti_lib_rom_ioc_port_configure_set(pin, IOC_PORT_GPIO, config);
85+
ti_lib_ioc_port_configure_set(pin, IOC_PORT_GPIO, config);
9186
}
9287
/*---------------------------------------------------------------------------*/
9388
gpio_hal_pin_cfg_t
@@ -98,11 +93,7 @@ gpio_hal_arch_pin_cfg_get(gpio_hal_pin_t pin)
9893
uint32_t config;
9994

10095
cfg = 0;
101-
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
10296
config = ti_lib_ioc_port_configure_get(pin);
103-
#else
104-
config = ti_lib_rom_ioc_port_configure_get(pin);
105-
#endif
10697

10798
/* Pull */
10899
tmp = config & IOC_IOPULL_M;

‎arch/cpu/cc26xx-cc13xx/dev/gpio-hal-arch.h

+1-11
Original file line numberDiff line numberDiff line change
@@ -49,23 +49,17 @@
4949
/*---------------------------------------------------------------------------*/
5050
#include "contiki.h"
5151
#include "ti-lib.h"
52-
#include "ti-lib-rom.h"
5352

5453
#include <stdint.h>
5554
/*---------------------------------------------------------------------------*/
5655
#define gpio_hal_arch_init() do { /* Do nothing */ } while(0)
5756

5857
#define gpio_hal_arch_interrupt_enable(p) interrupt_enable(p)
5958

60-
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
6159
#define gpio_hal_arch_interrupt_disable(p) ti_lib_ioc_int_disable(p)
6260
#define gpio_hal_arch_pin_set_input(p) ti_lib_ioc_pin_type_gpio_input(p)
6361
#define gpio_hal_arch_pin_set_output(p) ti_lib_ioc_pin_type_gpio_output(p)
64-
#else
65-
#define gpio_hal_arch_interrupt_disable(p) ti_lib_rom_ioc_int_disable(p)
66-
#define gpio_hal_arch_pin_set_input(p) ti_lib_rom_ioc_pin_type_gpio_input(p)
67-
#define gpio_hal_arch_pin_set_output(p) ti_lib_rom_ioc_pin_type_gpio_output(p)
68-
#endif
62+
6963
#define gpio_hal_arch_set_pin(p) ti_lib_gpio_set_dio(p)
7064
#define gpio_hal_arch_clear_pin(p) ti_lib_gpio_clear_dio(p)
7165
#define gpio_hal_arch_toggle_pin(p) ti_lib_gpio_toggle_dio(p)
@@ -80,11 +74,7 @@ static inline void
8074
interrupt_enable(gpio_hal_pin_t pin)
8175
{
8276
ti_lib_gpio_clear_event_dio(pin);
83-
#ifndef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
84-
ti_lib_rom_ioc_int_enable(pin);
85-
#else
8677
ti_lib_ioc_int_enable(pin);
87-
#endif
8878
}
8979
/*---------------------------------------------------------------------------*/
9080
#endif /* GPIO_HAL_ARCH_H_ */

‎arch/cpu/cc26xx-cc13xx/dev/soc-rtc.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -99,7 +99,7 @@ soc_rtc_init(void)
9999
ti_lib_aon_rtc_channel_enable(AON_RTC_CH1);
100100
ti_lib_aon_rtc_enable();
101101

102-
ti_lib_rom_int_enable(INT_AON_RTC_COMB);
102+
ti_lib_int_enable(INT_AON_RTC_COMB);
103103

104104
/* Re-enable interrupts */
105105
if(!interrupts_disabled) {

‎arch/cpu/cc26xx-cc13xx/dev/soc-trng.c

+9-9
Original file line numberDiff line numberDiff line change
@@ -71,22 +71,22 @@ static void
7171
disable_number_ready_interrupt(void)
7272
{
7373
ti_lib_trng_int_disable(TRNG_NUMBER_READY);
74-
ti_lib_rom_int_disable(INT_TRNG_IRQ);
74+
ti_lib_int_disable(INT_TRNG_IRQ);
7575
}
7676
/*---------------------------------------------------------------------------*/
7777
static void
7878
enable_number_ready_interrupt(void)
7979
{
8080
ti_lib_trng_int_clear(TRNG_NUMBER_READY);
8181
ti_lib_trng_int_enable(TRNG_NUMBER_READY);
82-
ti_lib_rom_int_enable(INT_TRNG_IRQ);
82+
ti_lib_int_enable(INT_TRNG_IRQ);
8383
}
8484
/*---------------------------------------------------------------------------*/
8585
static bool
8686
accessible(void)
8787
{
8888
/* First, check the PD */
89-
if(ti_lib_rom_prcm_power_domain_status(PRCM_DOMAIN_PERIPH)
89+
if(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_PERIPH)
9090
!= PRCM_DOMAIN_POWER_ON) {
9191
return false;
9292
}
@@ -104,12 +104,12 @@ static void
104104
power_up(void)
105105
{
106106
/* First, make sure the PERIPH PD is on */
107-
ti_lib_rom_prcm_power_domain_on(PRCM_DOMAIN_PERIPH);
108-
while((ti_lib_rom_prcm_power_domain_status(PRCM_DOMAIN_PERIPH)
107+
ti_lib_prcm_power_domain_on(PRCM_DOMAIN_PERIPH);
108+
while((ti_lib_prcm_power_domain_status(PRCM_DOMAIN_PERIPH)
109109
!= PRCM_DOMAIN_POWER_ON));
110110

111111
/* Enable clock in active mode */
112-
ti_lib_rom_prcm_peripheral_run_enable(PRCM_PERIPH_TRNG);
112+
ti_lib_prcm_peripheral_run_enable(PRCM_PERIPH_TRNG);
113113
ti_lib_prcm_load_set();
114114
while(!ti_lib_prcm_load_get());
115115
}
@@ -136,7 +136,7 @@ static uint64_t
136136
read_number(void)
137137
{
138138
uint64_t ran = (uint64_t)HWREG(TRNG_BASE + TRNG_O_OUT1) << 32;
139-
ran += ti_lib_rom_trng_number_get(TRNG_LOW_WORD);
139+
ran += ti_lib_trng_number_get(TRNG_LOW_WORD);
140140

141141
return ran;
142142
}
@@ -237,7 +237,7 @@ soc_trng_rand_asynchronous(uint32_t samples, soc_trng_callback_t cb)
237237
ti_lib_trng_int_clear(TRNG_NUMBER_READY);
238238

239239
/* Enable clock in sleep mode and register with LPM */
240-
ti_lib_rom_prcm_peripheral_sleep_enable(PRCM_PERIPH_TRNG);
240+
ti_lib_prcm_peripheral_sleep_enable(PRCM_PERIPH_TRNG);
241241
ti_lib_prcm_load_set();
242242
while(!ti_lib_prcm_load_get());
243243

@@ -271,7 +271,7 @@ PROCESS_THREAD(soc_trng_process, ev, data)
271271
}
272272

273273
/* Disable clock in sleep mode */
274-
ti_lib_rom_prcm_peripheral_sleep_disable(PRCM_PERIPH_TRNG);
274+
ti_lib_prcm_peripheral_sleep_disable(PRCM_PERIPH_TRNG);
275275
ti_lib_prcm_load_set();
276276
while(!ti_lib_prcm_load_get());
277277

‎arch/cpu/cc26xx-cc13xx/dev/spi-arch.c

+10-21
Original file line numberDiff line numberDiff line change
@@ -123,25 +123,22 @@ spi_arch_lock_and_open(const spi_device_t *dev)
123123
!= PRCM_DOMAIN_POWER_ON)) ;
124124

125125
/* Enable clock in active mode */
126-
ti_lib_rom_prcm_peripheral_run_enable(spi_controller[dev->spi_controller].prcm_periph);
126+
ti_lib_prcm_peripheral_run_enable(spi_controller[dev->spi_controller].prcm_periph);
127127
ti_lib_prcm_load_set();
128128
while(!ti_lib_prcm_load_get()) ;
129129

130130
/* SPI configuration */
131131
ti_lib_ssi_int_disable(spi_controller[dev->spi_controller].ssi_base, SSI_RXOR | SSI_RXFF | SSI_RXTO | SSI_TXFF);
132132
ti_lib_ssi_int_clear(spi_controller[dev->spi_controller].ssi_base, SSI_RXOR | SSI_RXTO);
133133

134-
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
135-
ti_lib_ssi_config_set_exp_clk(spi_controller[dev->spi_controller].ssi_base, ti_lib_sys_ctrl_clock_get(),
136-
get_mode(dev), SSI_MODE_MASTER, dev->spi_bit_rate, 8);
137-
ti_lib_ioc_pin_type_ssi_master(spi_controller[dev->spi_controller].ssi_base, dev->pin_spi_miso,
138-
dev->pin_spi_mosi, IOID_UNUSED, dev->pin_spi_sck);
139-
#else
140-
ti_lib_rom_ssi_config_set_exp_clk(spi_controller[dev->spi_controller].ssi_base, ti_lib_sys_ctrl_clock_get(),
141-
get_mode(dev), SSI_MODE_MASTER, dev->spi_bit_rate, 8);
142-
ti_lib_rom_ioc_pin_type_ssi_master(spi_controller[dev->spi_controller].ssi_base, dev->pin_spi_miso,
143-
dev->pin_spi_mosi, IOID_UNUSED, dev->pin_spi_sck);
144-
#endif
134+
ti_lib_ssi_config_set_exp_clk(spi_controller[dev->spi_controller].ssi_base,
135+
ti_lib_sys_ctrl_clock_get(),
136+
get_mode(dev), SSI_MODE_MASTER,
137+
dev->spi_bit_rate, 8);
138+
ti_lib_ioc_pin_type_ssi_master(spi_controller[dev->spi_controller].ssi_base,
139+
dev->pin_spi_miso,
140+
dev->pin_spi_mosi, IOID_UNUSED,
141+
dev->pin_spi_sck);
145142

146143
ti_lib_ssi_enable(spi_controller[dev->spi_controller].ssi_base);
147144

@@ -159,7 +156,7 @@ spi_arch_close_and_unlock(const spi_device_t *dev)
159156
}
160157

161158
/* Power down SSI */
162-
ti_lib_rom_prcm_peripheral_run_disable(spi_controller[dev->spi_controller].prcm_periph);
159+
ti_lib_prcm_peripheral_run_disable(spi_controller[dev->spi_controller].prcm_periph);
163160
ti_lib_prcm_load_set();
164161
while(!ti_lib_prcm_load_get()) ;
165162

@@ -213,20 +210,12 @@ spi_arch_transfer(const spi_device_t *dev,
213210
for(i = 0; i < totlen; i++) {
214211
c = i < wlen ? write_buf[i] : 0;
215212
ti_lib_ssi_data_put(spi_controller[dev->spi_controller].ssi_base, (uint8_t)c);
216-
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
217213
ti_lib_ssi_data_get(spi_controller[dev->spi_controller].ssi_base, &c);
218-
#else
219-
ti_lib_rom_ssi_data_get(spi_controller[dev->spi_controller].ssi_base, &c);
220-
#endif
221214
if(i < rlen) {
222215
inbuf[i] = (uint8_t)c;
223216
}
224217
}
225-
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
226218
while(ti_lib_ssi_data_get_non_blocking(spi_controller[dev->spi_controller].ssi_base, &c)) ;
227-
#else
228-
while(ti_lib_rom_ssi_data_get_non_blocking(spi_controller[dev->spi_controller].ssi_base, &c)) ;
229-
#endif
230219
return SPI_DEV_STATUS_OK;
231220
}
232221
/*---------------------------------------------------------------------------*/

‎arch/cpu/cc26xx-cc13xx/lpm.c

+3-8
Original file line numberDiff line numberDiff line change
@@ -162,10 +162,10 @@ lpm_shutdown(uint32_t wakeup_pin, uint32_t io_pull, uint32_t wake_on)
162162
ti_lib_aon_wuc_mcu_power_off_config(MCU_VIRT_PWOFF_DISABLE);
163163

164164
/* Latch the IOs in the padring and enable I/O pad sleep mode */
165-
#if !defined(ThisLibraryIsFor_CC26x0R2_HaltIfViolated)
166-
ti_lib_pwr_ctrl_io_freeze_enable();
165+
ti_lib_aon_ioc_freeze_enable();
166+
HWREG(AON_SYSCTL_BASE + AON_SYSCTL_O_SLEEPCTL) = 0;
167+
ti_lib_sys_ctrl_aon_sync();
167168

168-
#endif
169169
/* Turn off VIMS cache, CRAM and TRAM - possibly not required */
170170
ti_lib_prcm_cache_retention_disable();
171171
ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_OFF);
@@ -193,12 +193,7 @@ wake_up(void)
193193
ti_lib_sys_ctrl_aon_sync();
194194

195195
/* Adjust recharge settings */
196-
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
197-
// May need to change to XOSC_IN_LOW_POWER_MODE
198-
ti_lib_sys_ctrl_adjust_recharge_after_power_down(XOSC_IN_HIGH_POWER_MODE);
199-
#else
200196
ti_lib_sys_ctrl_adjust_recharge_after_power_down();
201-
#endif
202197

203198
/*
204199
* Release the request to the uLDO

‎arch/cpu/cc26xx-cc13xx/rf-core/rf-core.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -399,8 +399,8 @@ rf_core_set_modesel()
399399
} else if(chip_type == CHIP_TYPE_CC1350) {
400400
HWREG(PRCM_BASE + PRCM_O_RFCMODESEL) = PRCM_RFCMODESEL_CURR_MODE5;
401401
rv = RF_CORE_CMD_OK;
402-
#ifdef ThisLibraryIsFor_CC26x0R2_HaltIfViolated
403-
} else if (chip_type == CHIP_TYPE_CC2640R2) {
402+
#if CPU_FAMILY_CC26X0R2
403+
} else if(chip_type == CHIP_TYPE_CC2640R2) {
404404
HWREG(PRCM_BASE + PRCM_O_RFCMODESEL) = PRCM_RFCMODESEL_CURR_MODE1;
405405
rv = RF_CORE_CMD_OK;
406406
#endif

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