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Rye Effects Research
- Philadelphia, PA
Highlights
- Pro
Softcores
Project that uses the NIOS processor with NIOSDuino libraries. It is written with the VHDPlus IDE
MIPSfpga+ allows loading programs via UART and has a switchable clock
Simple SoC in VHDL with full toolchain and custom board.
Reference designs and firmware for open-source RISC-V core implementation on MX10 and SpiderSoM
The AVR softcore from opencores.org with a makefile and some useable demo code
SoC design for Milkymist One - LM32, DDR SDRAM, 2D TMU, PFPU
The original high performance and small footprint system-on-chip based on Migen™
The core files for Mega/Xmega designs.
A 32-bit MIPS / RISC-V core & SoC, 1.55 DMIPS/MHz, 2.96 CM/Mhz
Python module containing verilog files for picorv32 cpu (for use with LiteX).
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
An Arduino hardware package for ATmega4809, ATmega4808, ATmega3209, ATmega3208, ATmega1609, ATmega1608, ATmega809 and ATmega808
A highly-configurable and compact variant of the ZPU processor core
tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.