Build a minimal kernel for RISC-V

Open-source high-performance RISC-V processor

The Ultra-Low Power RISC-V Core

Arduino compatible Risc-V Based SOC

The CORE-V CVE2 is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, based on the original zero-riscy work from ETH Zurich and Ibex work from lowRISC.

教科书《计算机体系结构基础》（胡伟武等，第三版）的开源版本