Skip to content

Commit 4ba0d42

Browse files
committed
AMDGPU/GlobalISel: fix inst-select-load-local.mir in -DLLVM_ENABLE_ASSERTIONS=off builds after r367498
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367514 91177308-0d34-0410-b5e6-96231b3b80d8
1 parent b216057 commit 4ba0d42

File tree

1 file changed

+2
-4
lines changed

1 file changed

+2
-4
lines changed

test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local.mir

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -123,7 +123,6 @@ body: |
123123
bb.0:
124124
liveins: $vgpr0
125125
126-
; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORDX2_]]
127126
; GFX6-LABEL: name: load_local_v2s32
128127
; GFX6: liveins: $vgpr0
129128
; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
@@ -158,7 +157,6 @@ body: |
158157
bb.0:
159158
liveins: $vgpr0
160159
161-
; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORDX2_]]
162160
; GFX6-LABEL: name: load_local_v2s32_align4
163161
; GFX6: liveins: $vgpr0
164162
; GFX6: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0
@@ -196,7 +194,7 @@ body: |
196194
; GFX6-LABEL: name: load_local_v3s32
197195
; GFX6: liveins: $vgpr0
198196
; GFX6: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0
199-
; GFX6: [[LOAD:%[0-9]+]]:vgpr(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 12, align 4, addrspace 3)
197+
; GFX6: [[LOAD:%[0-9]+]]:{{vgpr|vreg_96}}(<3 x s32>) = G_LOAD [[COPY]](p3) :: (load 12, align 4, addrspace 3)
200198
; GFX6: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](<3 x s32>)
201199
; GFX7-LABEL: name: load_local_v3s32
202200
; GFX7: liveins: $vgpr0
@@ -399,7 +397,7 @@ body: |
399397
; GFX6-LABEL: name: load_local_s96
400398
; GFX6: liveins: $vgpr0
401399
; GFX6: [[COPY:%[0-9]+]]:vgpr(p3) = COPY $vgpr0
402-
; GFX6: [[LOAD:%[0-9]+]]:vgpr(s96) = G_LOAD [[COPY]](p3) :: (load 12, align 4, addrspace 3)
400+
; GFX6: [[LOAD:%[0-9]+]]:{{vgpr|vreg_96}}(s96) = G_LOAD [[COPY]](p3) :: (load 12, align 4, addrspace 3)
403401
; GFX6: $vgpr0_vgpr1_vgpr2 = COPY [[LOAD]](s96)
404402
; GFX7-LABEL: name: load_local_s96
405403
; GFX7: liveins: $vgpr0

0 commit comments

Comments
 (0)