@@ -1649,14 +1649,18 @@ void AMDGPURegisterBankInfo::applyMappingImpl(
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}
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case Intrinsic::amdgcn_raw_buffer_load:
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case Intrinsic::amdgcn_raw_buffer_load_format:
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+ case Intrinsic::amdgcn_raw_tbuffer_load:
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case Intrinsic::amdgcn_raw_buffer_store:
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- case Intrinsic::amdgcn_raw_buffer_store_format: {
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+ case Intrinsic::amdgcn_raw_buffer_store_format:
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+ case Intrinsic::amdgcn_raw_tbuffer_store: {
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applyDefaultMapping (OpdMapper);
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executeInWaterfallLoop (MI, MRI, {2 , 4 });
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return ;
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}
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case Intrinsic::amdgcn_struct_buffer_load:
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- case Intrinsic::amdgcn_struct_buffer_store: {
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+ case Intrinsic::amdgcn_struct_buffer_store:
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+ case Intrinsic::amdgcn_struct_tbuffer_load:
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+ case Intrinsic::amdgcn_struct_tbuffer_store: {
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applyDefaultMapping (OpdMapper);
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executeInWaterfallLoop (MI, MRI, {2 , 5 });
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return ;
@@ -2602,7 +2606,8 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
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OpdsMapping[1 ] = AMDGPU::getValueMapping (AMDGPU::VCCRegBankID, 1 );
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break ;
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}
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- case Intrinsic::amdgcn_raw_buffer_load: {
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+ case Intrinsic::amdgcn_raw_buffer_load:
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+ case Intrinsic::amdgcn_raw_tbuffer_load: {
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// FIXME: Should make intrinsic ID the last operand of the instruction,
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// then this would be the same as store
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OpdsMapping[0 ] = getVGPROpMapping (MI.getOperand (0 ).getReg (), MRI, *TRI);
@@ -2612,22 +2617,25 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
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break ;
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}
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case Intrinsic::amdgcn_raw_buffer_store:
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- case Intrinsic::amdgcn_raw_buffer_store_format: {
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+ case Intrinsic::amdgcn_raw_buffer_store_format:
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+ case Intrinsic::amdgcn_raw_tbuffer_store: {
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OpdsMapping[1 ] = getVGPROpMapping (MI.getOperand (1 ).getReg (), MRI, *TRI);
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OpdsMapping[2 ] = getSGPROpMapping (MI.getOperand (2 ).getReg (), MRI, *TRI);
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OpdsMapping[3 ] = getVGPROpMapping (MI.getOperand (3 ).getReg (), MRI, *TRI);
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OpdsMapping[4 ] = getSGPROpMapping (MI.getOperand (4 ).getReg (), MRI, *TRI);
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break ;
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}
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- case Intrinsic::amdgcn_struct_buffer_load: {
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+ case Intrinsic::amdgcn_struct_buffer_load:
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+ case Intrinsic::amdgcn_struct_tbuffer_load: {
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OpdsMapping[0 ] = getVGPROpMapping (MI.getOperand (0 ).getReg (), MRI, *TRI);
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OpdsMapping[2 ] = getSGPROpMapping (MI.getOperand (2 ).getReg (), MRI, *TRI);
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OpdsMapping[3 ] = getVGPROpMapping (MI.getOperand (3 ).getReg (), MRI, *TRI);
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OpdsMapping[4 ] = getVGPROpMapping (MI.getOperand (4 ).getReg (), MRI, *TRI);
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OpdsMapping[5 ] = getSGPROpMapping (MI.getOperand (5 ).getReg (), MRI, *TRI);
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break ;
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}
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- case Intrinsic::amdgcn_struct_buffer_store: {
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+ case Intrinsic::amdgcn_struct_buffer_store:
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+ case Intrinsic::amdgcn_struct_tbuffer_store: {
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OpdsMapping[1 ] = getVGPROpMapping (MI.getOperand (1 ).getReg (), MRI, *TRI);
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OpdsMapping[2 ] = getSGPROpMapping (MI.getOperand (2 ).getReg (), MRI, *TRI);
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OpdsMapping[3 ] = getVGPROpMapping (MI.getOperand (3 ).getReg (), MRI, *TRI);
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