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| 1 | +; RUN: opt -licm -basicaa < %s -S | FileCheck %s |
| 2 | +; RUN: opt -aa-pipeline=basic-aa -passes='require<aa>,require<targetir>,require<scalar-evolution>,require<opt-remark-emit>,loop(licm)' < %s -S | FileCheck %s |
| 3 | + |
| 4 | +define void @test1(i64 %n) { |
| 5 | +; CHECK-LABEL: @test1 |
| 6 | +; CHECK-LABEL: loop: |
| 7 | +; CHECK: fence |
| 8 | +entry: |
| 9 | + br label %loop |
| 10 | +loop: |
| 11 | + %iv = phi i64 [0, %entry], [%iv.next, %loop] |
| 12 | + fence release |
| 13 | + %iv.next = add i64 %iv, 1 |
| 14 | + %test = icmp slt i64 %iv, %n |
| 15 | + br i1 %test, label %loop, label %exit |
| 16 | +exit: |
| 17 | + ret void |
| 18 | +} |
| 19 | + |
| 20 | +define void @test2(i64 %n) { |
| 21 | +; CHECK-LABEL: @test2 |
| 22 | +; CHECK-LABEL: loop: |
| 23 | +; CHECK: fence |
| 24 | +entry: |
| 25 | + br label %loop |
| 26 | +loop: |
| 27 | + %iv = phi i64 [0, %entry], [%iv.next, %loop] |
| 28 | + fence acquire |
| 29 | + %iv.next = add i64 %iv, 1 |
| 30 | + %test = icmp slt i64 %iv, %n |
| 31 | + br i1 %test, label %loop, label %exit |
| 32 | +exit: |
| 33 | + ret void |
| 34 | +} |
| 35 | + |
| 36 | +define void @test3(i64 %n) { |
| 37 | +; CHECK-LABEL: @test3 |
| 38 | +; CHECK-LABEL: loop: |
| 39 | +; CHECK: fence |
| 40 | +entry: |
| 41 | + br label %loop |
| 42 | +loop: |
| 43 | + %iv = phi i64 [0, %entry], [%iv.next, %loop] |
| 44 | + fence acq_rel |
| 45 | + %iv.next = add i64 %iv, 1 |
| 46 | + %test = icmp slt i64 %iv, %n |
| 47 | + br i1 %test, label %loop, label %exit |
| 48 | +exit: |
| 49 | + ret void |
| 50 | +} |
| 51 | + |
| 52 | +define void @test4(i64 %n) { |
| 53 | +; CHECK-LABEL: @test4 |
| 54 | +; CHECK-LABEL: loop: |
| 55 | +; CHECK: fence |
| 56 | +entry: |
| 57 | + br label %loop |
| 58 | +loop: |
| 59 | + %iv = phi i64 [0, %entry], [%iv.next, %loop] |
| 60 | + fence seq_cst |
| 61 | + %iv.next = add i64 %iv, 1 |
| 62 | + %test = icmp slt i64 %iv, %n |
| 63 | + br i1 %test, label %loop, label %exit |
| 64 | +exit: |
| 65 | + ret void |
| 66 | +} |
| 67 | + |
| 68 | +define void @testneg1(i64 %n, i64* %p) { |
| 69 | +; CHECK-LABEL: @testneg1 |
| 70 | +; CHECK-LABEL: loop: |
| 71 | +; CHECK: fence |
| 72 | +entry: |
| 73 | + br label %loop |
| 74 | +loop: |
| 75 | + %iv = phi i64 [0, %entry], [%iv.next, %loop] |
| 76 | + store i64 %iv, i64* %p |
| 77 | + fence release |
| 78 | + %iv.next = add i64 %iv, 1 |
| 79 | + %test = icmp slt i64 %iv, %n |
| 80 | + br i1 %test, label %loop, label %exit |
| 81 | +exit: |
| 82 | + ret void |
| 83 | +} |
| 84 | + |
| 85 | +define void @testneg2(i64* %p) { |
| 86 | +; CHECK-LABEL: @testneg2 |
| 87 | +; CHECK-LABEL: loop: |
| 88 | +; CHECK: fence |
| 89 | +entry: |
| 90 | + br label %loop |
| 91 | +loop: |
| 92 | + %iv = phi i64 [0, %entry], [%iv.next, %loop] |
| 93 | + fence acquire |
| 94 | + %n = load i64, i64* %p |
| 95 | + %iv.next = add i64 %iv, 1 |
| 96 | + %test = icmp slt i64 %iv, %n |
| 97 | + br i1 %test, label %loop, label %exit |
| 98 | +exit: |
| 99 | + ret void |
| 100 | +} |
| 101 | + |
| 102 | +define void @testfp1(i64 %n, i64* %p) { |
| 103 | +; CHECK-LABEL: @testfp1 |
| 104 | +; CHECK-LABEL: loop: |
| 105 | +; CHECK: fence |
| 106 | +entry: |
| 107 | + br label %loop |
| 108 | +loop: |
| 109 | + %iv = phi i64 [0, %entry], [%iv.next, %loop] |
| 110 | + fence release |
| 111 | + fence release |
| 112 | + %iv.next = add i64 %iv, 1 |
| 113 | + %test = icmp slt i64 %iv, %n |
| 114 | + br i1 %test, label %loop, label %exit |
| 115 | +exit: |
| 116 | + ret void |
| 117 | +} |
| 118 | + |
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