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AMDGPU/GlobalISel: Select local atomic cmpxchg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@367511 91177308-0d34-0410-b5e6-96231b3b80d8
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-28
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4 files changed

+104
-28
lines changed

‎lib/Target/AMDGPU/AMDGPUInstructions.td‎

Lines changed: 12 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -303,6 +303,10 @@ def TEX_SHADOW_ARRAY : PatLeaf<
303303
// Load/Store Pattern Fragments
304304
//===----------------------------------------------------------------------===//
305305

306+
def atomic_cmp_swap_glue : SDNode <"ISD::ATOMIC_CMP_SWAP", SDTAtomic3,
307+
[SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand, SDNPInGlue]
308+
>;
309+
306310
class AddressSpaceList<list<int> AS> {
307311
list<int> AddrSpaces = AS;
308312
}
@@ -555,23 +559,15 @@ def mskor_global : PatFrag<(ops node:$val, node:$ptr),
555559
return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;
556560
}]>;
557561

558-
class AtomicCmpSwapLocal <SDNode cmp_swap_node> : PatFrag<
559-
(ops node:$ptr, node:$cmp, node:$swap),
560-
(cmp_swap_node node:$ptr, node:$cmp, node:$swap), [{
561-
AtomicSDNode *AN = cast<AtomicSDNode>(N);
562-
return AN->getAddressSpace() == AMDGPUAS::LOCAL_ADDRESS;
563-
}]>;
564-
565-
class AtomicCmpSwapRegion <SDNode cmp_swap_node> : PatFrag<
566-
(ops node:$ptr, node:$cmp, node:$swap),
567-
(cmp_swap_node node:$ptr, node:$cmp, node:$swap), [{
568-
AtomicSDNode *AN = cast<AtomicSDNode>(N);
569-
return AN->getAddressSpace() == AMDGPUAS::REGION_ADDRESS;
570-
}]>;
562+
let AddressSpaces = StoreAddress_local.AddrSpaces in {
563+
defm atomic_cmp_swap_local : ternary_atomic_op<atomic_cmp_swap>;
564+
defm atomic_cmp_swap_local_m0 : ternary_atomic_op<atomic_cmp_swap_glue>;
565+
}
571566

572-
// FIXME: Actually set MemoryVT
573-
def atomic_cmp_swap_local_32 : AtomicCmpSwapLocal <atomic_cmp_swap>;
574-
def atomic_cmp_swap_local_64 : AtomicCmpSwapLocal <atomic_cmp_swap>;
567+
let AddressSpaces = StoreAddress_region.AddrSpaces in {
568+
defm atomic_cmp_swap_region : ternary_atomic_op<atomic_cmp_swap>;
569+
defm atomic_cmp_swap_region_m0 : ternary_atomic_op<atomic_cmp_swap_glue>;
570+
}
575571

576572
class global_binary_atomic_op_frag<SDNode atomic_op> : PatFrag<
577573
(ops node:$ptr, node:$value),

‎lib/Target/AMDGPU/DSInstructions.td‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -765,7 +765,7 @@ multiclass DSAtomicRetPat_mc<DS_Pseudo inst, ValueType vt, string frag> {
765765

766766
class DSAtomicCmpXChg<DS_Pseudo inst, ValueType vt, PatFrag frag, bit gds=0> : GCNPat <
767767
(frag (DS1Addr1Offset i32:$ptr, i16:$offset), vt:$cmp, vt:$swap),
768-
(inst $ptr, $cmp, $swap, offset:$offset, (i1 gds))
768+
(inst $ptr, getVregSrcForVT<vt>.ret:$cmp, getVregSrcForVT<vt>.ret:$swap, offset:$offset, (i1 gds))
769769
>;
770770

771771
multiclass DSAtomicCmpXChg_mc<DS_Pseudo inst, ValueType vt, string frag> {

‎lib/Target/AMDGPU/SIInstrInfo.td‎

Lines changed: 0 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -635,17 +635,6 @@ defm atomic_load_fadd : SIAtomicM0Glue2 <"LOAD_FADD", 0, SDTAtomic2_f32, 0>;
635635
defm atomic_load_fmin : SIAtomicM0Glue2 <"LOAD_FMIN", 1, SDTAtomic2_f32, 0>;
636636
defm atomic_load_fmax : SIAtomicM0Glue2 <"LOAD_FMAX", 1, SDTAtomic2_f32, 0>;
637637

638-
def atomic_cmp_swap_glue : SDNode <"ISD::ATOMIC_CMP_SWAP", SDTAtomic3,
639-
[SDNPHasChain, SDNPMayStore, SDNPMayLoad, SDNPMemOperand, SDNPInGlue]
640-
>;
641-
642-
// FIXME:
643-
def atomic_cmp_swap_local_m0_32 : AtomicCmpSwapLocal<atomic_cmp_swap_glue>;
644-
def atomic_cmp_swap_region_m0_32 : AtomicCmpSwapRegion<atomic_cmp_swap_glue>;
645-
def atomic_cmp_swap_local_m0_64 : AtomicCmpSwapLocal<atomic_cmp_swap_glue>;
646-
def atomic_cmp_swap_region_m0_64 : AtomicCmpSwapRegion<atomic_cmp_swap_glue>;
647-
648-
649638
def as_i1imm : SDNodeXForm<imm, [{
650639
return CurDAG->getTargetConstant(N->getZExtValue(), SDLoc(N), MVT::i1);
651640
}]>;

‎test/CodeGen/AMDGPU/GlobalISel/inst-select-atomic-cmpxchg-local.mir‎

Lines changed: 91 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,91 @@
1+
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2+
# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX6 %s
3+
# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX7 %s
4+
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX7 %s
5+
# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
6+
# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=0 -o - %s | FileCheck -check-prefix=GFX9 %s
7+
8+
9+
---
10+
name: atomic_cmpxchg_s32_local
11+
legalized: true
12+
regBankSelected: true
13+
tracksRegLiveness: true
14+
body: |
15+
bb.0:
16+
liveins: $vgpr0, $vgpr1, $vgpr2
17+
18+
; GFX6-LABEL: name: atomic_cmpxchg_s32_local
19+
; GFX6: liveins: $vgpr0, $vgpr1, $vgpr2
20+
; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
21+
; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
22+
; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
23+
; GFX6: $m0 = S_MOV_B32 -1
24+
; GFX6: [[DS_CMPST_RTN_B32_:%[0-9]+]]:vgpr_32 = DS_CMPST_RTN_B32 [[COPY]], [[COPY1]], [[COPY2]], 0, 0, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 3)
25+
; GFX6: $vgpr0 = COPY [[DS_CMPST_RTN_B32_]]
26+
; GFX7-LABEL: name: atomic_cmpxchg_s32_local
27+
; GFX7: liveins: $vgpr0, $vgpr1, $vgpr2
28+
; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
29+
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
30+
; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
31+
; GFX7: $m0 = S_MOV_B32 -1
32+
; GFX7: [[DS_CMPST_RTN_B32_:%[0-9]+]]:vgpr_32 = DS_CMPST_RTN_B32 [[COPY]], [[COPY1]], [[COPY2]], 0, 0, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 3)
33+
; GFX7: $vgpr0 = COPY [[DS_CMPST_RTN_B32_]]
34+
; GFX9-LABEL: name: atomic_cmpxchg_s32_local
35+
; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
36+
; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
37+
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
38+
; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
39+
; GFX9: [[DS_CMPST_RTN_B32_gfx9_:%[0-9]+]]:vgpr_32 = DS_CMPST_RTN_B32_gfx9 [[COPY]], [[COPY1]], [[COPY2]], 0, 0, implicit $exec :: (load store seq_cst 4, addrspace 3)
40+
; GFX9: $vgpr0 = COPY [[DS_CMPST_RTN_B32_gfx9_]]
41+
%0:vgpr(p3) = COPY $vgpr0
42+
%1:vgpr(s32) = COPY $vgpr1
43+
%2:vgpr(s32) = COPY $vgpr2
44+
%3:vgpr(s32) = G_ATOMIC_CMPXCHG %0, %1, %2 :: (load store seq_cst 4, addrspace 3)
45+
$vgpr0 = COPY %3
46+
47+
...
48+
49+
---
50+
name: atomic_cmpxchg_s32_local_gep4
51+
legalized: true
52+
regBankSelected: true
53+
tracksRegLiveness: true
54+
body: |
55+
bb.0:
56+
liveins: $vgpr0, $vgpr1, $vgpr2
57+
58+
; GFX6-LABEL: name: atomic_cmpxchg_s32_local_gep4
59+
; GFX6: liveins: $vgpr0, $vgpr1, $vgpr2
60+
; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
61+
; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
62+
; GFX6: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
63+
; GFX6: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4, implicit $exec
64+
; GFX6: %4:vgpr_32, dead %6:sreg_64_xexec = V_ADD_I32_e64 [[COPY]], [[V_MOV_B32_e32_]], 0, implicit $exec
65+
; GFX6: $m0 = S_MOV_B32 -1
66+
; GFX6: [[DS_CMPST_RTN_B32_:%[0-9]+]]:vgpr_32 = DS_CMPST_RTN_B32 %4, [[COPY1]], [[COPY2]], 0, 0, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 3)
67+
; GFX6: $vgpr0 = COPY [[DS_CMPST_RTN_B32_]]
68+
; GFX7-LABEL: name: atomic_cmpxchg_s32_local_gep4
69+
; GFX7: liveins: $vgpr0, $vgpr1, $vgpr2
70+
; GFX7: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
71+
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
72+
; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
73+
; GFX7: $m0 = S_MOV_B32 -1
74+
; GFX7: [[DS_CMPST_RTN_B32_:%[0-9]+]]:vgpr_32 = DS_CMPST_RTN_B32 [[COPY]], [[COPY1]], [[COPY2]], 4, 0, implicit $m0, implicit $exec :: (load store seq_cst 4, addrspace 3)
75+
; GFX7: $vgpr0 = COPY [[DS_CMPST_RTN_B32_]]
76+
; GFX9-LABEL: name: atomic_cmpxchg_s32_local_gep4
77+
; GFX9: liveins: $vgpr0, $vgpr1, $vgpr2
78+
; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
79+
; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
80+
; GFX9: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
81+
; GFX9: [[DS_CMPST_RTN_B32_gfx9_:%[0-9]+]]:vgpr_32 = DS_CMPST_RTN_B32_gfx9 [[COPY]], [[COPY1]], [[COPY2]], 4, 0, implicit $exec :: (load store seq_cst 4, addrspace 3)
82+
; GFX9: $vgpr0 = COPY [[DS_CMPST_RTN_B32_gfx9_]]
83+
%0:vgpr(p3) = COPY $vgpr0
84+
%1:vgpr(s32) = COPY $vgpr1
85+
%2:vgpr(s32) = COPY $vgpr2
86+
%3:vgpr(s32) = G_CONSTANT i32 4
87+
%4:vgpr(p3) = G_GEP %0, %3
88+
%5:vgpr(s32) = G_ATOMIC_CMPXCHG %4, %1, %2 :: (load store seq_cst 4, addrspace 3)
89+
$vgpr0 = COPY %5
90+
91+
...

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