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coff-arm.c
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/* BFD back-end for ARM COFF files.
Copyright (C) 1990-2016 Free Software Foundation, Inc.
Written by Cygnus Support.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#include "sysdep.h"
#include "bfd.h"
#include "libbfd.h"
#include "coff/arm.h"
#include "coff/internal.h"
#ifdef COFF_WITH_PE
#include "coff/pe.h"
#endif
#include "libcoff.h"
/* Macros for manipulation the bits in the flags field of the coff data
structure. */
#define APCS_26_FLAG(abfd) \
(coff_data (abfd)->flags & F_APCS_26)
#define APCS_FLOAT_FLAG(abfd) \
(coff_data (abfd)->flags & F_APCS_FLOAT)
#define PIC_FLAG(abfd) \
(coff_data (abfd)->flags & F_PIC)
#define APCS_SET(abfd) \
(coff_data (abfd)->flags & F_APCS_SET)
#define SET_APCS_FLAGS(abfd, flgs) \
do \
{ \
coff_data (abfd)->flags &= ~(F_APCS_26 | F_APCS_FLOAT | F_PIC); \
coff_data (abfd)->flags |= (flgs) | F_APCS_SET; \
} \
while (0)
#define INTERWORK_FLAG(abfd) \
(coff_data (abfd)->flags & F_INTERWORK)
#define INTERWORK_SET(abfd) \
(coff_data (abfd)->flags & F_INTERWORK_SET)
#define SET_INTERWORK_FLAG(abfd, flg) \
do \
{ \
coff_data (abfd)->flags &= ~F_INTERWORK; \
coff_data (abfd)->flags |= (flg) | F_INTERWORK_SET; \
} \
while (0)
#ifndef NUM_ELEM
#define NUM_ELEM(a) ((sizeof (a)) / sizeof ((a)[0]))
#endif
typedef enum {bunknown, b9, b12, b23} thumb_pcrel_branchtype;
/* Some typedefs for holding instructions. */
typedef unsigned long int insn32;
typedef unsigned short int insn16;
/* The linker script knows the section names for placement.
The entry_names are used to do simple name mangling on the stubs.
Given a function name, and its type, the stub can be found. The
name can be changed. The only requirement is the %s be present. */
#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
/* Used by the assembler. */
static bfd_reloc_status_type
coff_arm_reloc (bfd *abfd,
arelent *reloc_entry,
asymbol *symbol ATTRIBUTE_UNUSED,
void * data,
asection *input_section ATTRIBUTE_UNUSED,
bfd *output_bfd,
char **error_message ATTRIBUTE_UNUSED)
{
symvalue diff;
if (output_bfd == NULL)
return bfd_reloc_continue;
diff = reloc_entry->addend;
#define DOIT(x) \
x = ((x & ~howto->dst_mask) \
| (((x & howto->src_mask) + diff) & howto->dst_mask))
if (diff != 0)
{
reloc_howto_type *howto = reloc_entry->howto;
unsigned char *addr = (unsigned char *) data + reloc_entry->address;
switch (howto->size)
{
case 0:
{
char x = bfd_get_8 (abfd, addr);
DOIT (x);
bfd_put_8 (abfd, x, addr);
}
break;
case 1:
{
short x = bfd_get_16 (abfd, addr);
DOIT (x);
bfd_put_16 (abfd, (bfd_vma) x, addr);
}
break;
case 2:
{
long x = bfd_get_32 (abfd, addr);
DOIT (x);
bfd_put_32 (abfd, (bfd_vma) x, addr);
}
break;
default:
abort ();
}
}
/* Now let bfd_perform_relocation finish everything up. */
return bfd_reloc_continue;
}
/* If USER_LABEL_PREFIX is defined as "_" (see coff_arm_is_local_label_name()
in this file), then TARGET_UNDERSCORE should be defined, otherwise it
should not. */
#ifndef TARGET_UNDERSCORE
#define TARGET_UNDERSCORE '_'
#endif
#ifndef PCRELOFFSET
#define PCRELOFFSET TRUE
#endif
/* These most certainly belong somewhere else. Just had to get rid of
the manifest constants in the code. */
#ifdef ARM_WINCE
#define ARM_26D 0
#define ARM_32 1
#define ARM_RVA32 2
#define ARM_26 3
#define ARM_THUMB12 4
#define ARM_SECTION 14
#define ARM_SECREL 15
#else
#define ARM_8 0
#define ARM_16 1
#define ARM_32 2
#define ARM_26 3
#define ARM_DISP8 4
#define ARM_DISP16 5
#define ARM_DISP32 6
#define ARM_26D 7
/* 8 is unused. */
#define ARM_NEG16 9
#define ARM_NEG32 10
#define ARM_RVA32 11
#define ARM_THUMB9 12
#define ARM_THUMB12 13
#define ARM_THUMB23 14
#endif
static bfd_reloc_status_type aoutarm_fix_pcrel_26_done
(bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
static bfd_reloc_status_type aoutarm_fix_pcrel_26
(bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
static bfd_reloc_status_type coff_thumb_pcrel_12
(bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
#ifndef ARM_WINCE
static bfd_reloc_status_type coff_thumb_pcrel_9
(bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
static bfd_reloc_status_type coff_thumb_pcrel_23
(bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
#endif
static reloc_howto_type aoutarm_std_reloc_howto[] =
{
#ifdef ARM_WINCE
HOWTO (ARM_26D,
2,
2,
24,
TRUE,
0,
complain_overflow_dont,
aoutarm_fix_pcrel_26_done,
"ARM_26D",
TRUE, /* partial_inplace. */
0x00ffffff,
0x0,
PCRELOFFSET),
HOWTO (ARM_32,
0,
2,
32,
FALSE,
0,
complain_overflow_bitfield,
coff_arm_reloc,
"ARM_32",
TRUE, /* partial_inplace. */
0xffffffff,
0xffffffff,
PCRELOFFSET),
HOWTO (ARM_RVA32,
0,
2,
32,
FALSE,
0,
complain_overflow_bitfield,
coff_arm_reloc,
"ARM_RVA32",
TRUE, /* partial_inplace. */
0xffffffff,
0xffffffff,
PCRELOFFSET),
HOWTO (ARM_26,
2,
2,
24,
TRUE,
0,
complain_overflow_signed,
aoutarm_fix_pcrel_26 ,
"ARM_26",
FALSE,
0x00ffffff,
0x00ffffff,
PCRELOFFSET),
HOWTO (ARM_THUMB12,
1,
1,
11,
TRUE,
0,
complain_overflow_signed,
coff_thumb_pcrel_12 ,
"ARM_THUMB12",
FALSE,
0x000007ff,
0x000007ff,
PCRELOFFSET),
EMPTY_HOWTO (-1),
EMPTY_HOWTO (-1),
EMPTY_HOWTO (-1),
EMPTY_HOWTO (-1),
EMPTY_HOWTO (-1),
EMPTY_HOWTO (-1),
EMPTY_HOWTO (-1),
EMPTY_HOWTO (-1),
EMPTY_HOWTO (-1),
HOWTO (ARM_SECTION,
0,
1,
16,
FALSE,
0,
complain_overflow_bitfield,
coff_arm_reloc,
"ARM_SECTION",
TRUE, /* partial_inplace. */
0x0000ffff,
0x0000ffff,
PCRELOFFSET),
HOWTO (ARM_SECREL,
0,
2,
32,
FALSE,
0,
complain_overflow_bitfield,
coff_arm_reloc,
"ARM_SECREL",
TRUE, /* partial_inplace. */
0xffffffff,
0xffffffff,
PCRELOFFSET),
#else /* not ARM_WINCE */
HOWTO (ARM_8,
0,
0,
8,
FALSE,
0,
complain_overflow_bitfield,
coff_arm_reloc,
"ARM_8",
TRUE,
0x000000ff,
0x000000ff,
PCRELOFFSET),
HOWTO (ARM_16,
0,
1,
16,
FALSE,
0,
complain_overflow_bitfield,
coff_arm_reloc,
"ARM_16",
TRUE,
0x0000ffff,
0x0000ffff,
PCRELOFFSET),
HOWTO (ARM_32,
0,
2,
32,
FALSE,
0,
complain_overflow_bitfield,
coff_arm_reloc,
"ARM_32",
TRUE,
0xffffffff,
0xffffffff,
PCRELOFFSET),
HOWTO (ARM_26,
2,
2,
24,
TRUE,
0,
complain_overflow_signed,
aoutarm_fix_pcrel_26 ,
"ARM_26",
FALSE,
0x00ffffff,
0x00ffffff,
PCRELOFFSET),
HOWTO (ARM_DISP8,
0,
0,
8,
TRUE,
0,
complain_overflow_signed,
coff_arm_reloc,
"ARM_DISP8",
TRUE,
0x000000ff,
0x000000ff,
TRUE),
HOWTO (ARM_DISP16,
0,
1,
16,
TRUE,
0,
complain_overflow_signed,
coff_arm_reloc,
"ARM_DISP16",
TRUE,
0x0000ffff,
0x0000ffff,
TRUE),
HOWTO (ARM_DISP32,
0,
2,
32,
TRUE,
0,
complain_overflow_signed,
coff_arm_reloc,
"ARM_DISP32",
TRUE,
0xffffffff,
0xffffffff,
TRUE),
HOWTO (ARM_26D,
2,
2,
24,
FALSE,
0,
complain_overflow_dont,
aoutarm_fix_pcrel_26_done,
"ARM_26D",
TRUE,
0x00ffffff,
0x0,
FALSE),
/* 8 is unused */
EMPTY_HOWTO (-1),
HOWTO (ARM_NEG16,
0,
-1,
16,
FALSE,
0,
complain_overflow_bitfield,
coff_arm_reloc,
"ARM_NEG16",
TRUE,
0x0000ffff,
0x0000ffff,
FALSE),
HOWTO (ARM_NEG32,
0,
-2,
32,
FALSE,
0,
complain_overflow_bitfield,
coff_arm_reloc,
"ARM_NEG32",
TRUE,
0xffffffff,
0xffffffff,
FALSE),
HOWTO (ARM_RVA32,
0,
2,
32,
FALSE,
0,
complain_overflow_bitfield,
coff_arm_reloc,
"ARM_RVA32",
TRUE,
0xffffffff,
0xffffffff,
PCRELOFFSET),
HOWTO (ARM_THUMB9,
1,
1,
8,
TRUE,
0,
complain_overflow_signed,
coff_thumb_pcrel_9 ,
"ARM_THUMB9",
FALSE,
0x000000ff,
0x000000ff,
PCRELOFFSET),
HOWTO (ARM_THUMB12,
1,
1,
11,
TRUE,
0,
complain_overflow_signed,
coff_thumb_pcrel_12 ,
"ARM_THUMB12",
FALSE,
0x000007ff,
0x000007ff,
PCRELOFFSET),
HOWTO (ARM_THUMB23,
1,
2,
22,
TRUE,
0,
complain_overflow_signed,
coff_thumb_pcrel_23 ,
"ARM_THUMB23",
FALSE,
0x07ff07ff,
0x07ff07ff,
PCRELOFFSET)
#endif /* not ARM_WINCE */
};
#define NUM_RELOCS NUM_ELEM (aoutarm_std_reloc_howto)
#ifdef COFF_WITH_PE
/* Return TRUE if this relocation should
appear in the output .reloc section. */
static bfd_boolean
in_reloc_p (bfd * abfd ATTRIBUTE_UNUSED,
reloc_howto_type * howto)
{
return !howto->pc_relative && howto->type != ARM_RVA32;
}
#endif
#define RTYPE2HOWTO(cache_ptr, dst) \
(cache_ptr)->howto = \
(dst)->r_type < NUM_RELOCS \
? aoutarm_std_reloc_howto + (dst)->r_type \
: NULL
#define coff_rtype_to_howto coff_arm_rtype_to_howto
static reloc_howto_type *
coff_arm_rtype_to_howto (bfd *abfd ATTRIBUTE_UNUSED,
asection *sec,
struct internal_reloc *rel,
struct coff_link_hash_entry *h ATTRIBUTE_UNUSED,
struct internal_syment *sym ATTRIBUTE_UNUSED,
bfd_vma *addendp)
{
reloc_howto_type * howto;
if (rel->r_type >= NUM_RELOCS)
return NULL;
howto = aoutarm_std_reloc_howto + rel->r_type;
if (rel->r_type == ARM_RVA32)
*addendp -= pe_data (sec->output_section->owner)->pe_opthdr.ImageBase;
#if defined COFF_WITH_PE && defined ARM_WINCE
if (rel->r_type == ARM_SECREL)
{
bfd_vma osect_vma;
if (h && (h->type == bfd_link_hash_defined
|| h->type == bfd_link_hash_defweak))
osect_vma = h->root.u.def.section->output_section->vma;
else
{
int i;
/* Sigh, the only way to get the section to offset against
is to find it the hard way. */
for (sec = abfd->sections, i = 1; i < sym->n_scnum; i++)
sec = sec->next;
osect_vma = sec->output_section->vma;
}
*addendp -= osect_vma;
}
#endif
return howto;
}
/* Used by the assembler. */
static bfd_reloc_status_type
aoutarm_fix_pcrel_26_done (bfd *abfd ATTRIBUTE_UNUSED,
arelent *reloc_entry ATTRIBUTE_UNUSED,
asymbol *symbol ATTRIBUTE_UNUSED,
void * data ATTRIBUTE_UNUSED,
asection *input_section ATTRIBUTE_UNUSED,
bfd *output_bfd ATTRIBUTE_UNUSED,
char **error_message ATTRIBUTE_UNUSED)
{
/* This is dead simple at present. */
return bfd_reloc_ok;
}
/* Used by the assembler. */
static bfd_reloc_status_type
aoutarm_fix_pcrel_26 (bfd *abfd,
arelent *reloc_entry,
asymbol *symbol,
void * data,
asection *input_section,
bfd *output_bfd,
char **error_message ATTRIBUTE_UNUSED)
{
bfd_vma relocation;
bfd_size_type addr = reloc_entry->address;
long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
bfd_reloc_status_type flag = bfd_reloc_ok;
/* If this is an undefined symbol, return error. */
if (bfd_is_und_section (symbol->section)
&& (symbol->flags & BSF_WEAK) == 0)
return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;
/* If the sections are different, and we are doing a partial relocation,
just ignore it for now. */
if (symbol->section->name != input_section->name
&& output_bfd != (bfd *)NULL)
return bfd_reloc_continue;
relocation = (target & 0x00ffffff) << 2;
relocation = (relocation ^ 0x02000000) - 0x02000000; /* Sign extend. */
relocation += symbol->value;
relocation += symbol->section->output_section->vma;
relocation += symbol->section->output_offset;
relocation += reloc_entry->addend;
relocation -= input_section->output_section->vma;
relocation -= input_section->output_offset;
relocation -= addr;
if (relocation & 3)
return bfd_reloc_overflow;
/* Check for overflow. */
if (relocation & 0x02000000)
{
if ((relocation & ~ (bfd_vma) 0x03ffffff) != ~ (bfd_vma) 0x03ffffff)
flag = bfd_reloc_overflow;
}
else if (relocation & ~(bfd_vma) 0x03ffffff)
flag = bfd_reloc_overflow;
target &= ~0x00ffffff;
target |= (relocation >> 2) & 0x00ffffff;
bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr);
/* Now the ARM magic... Change the reloc type so that it is marked as done.
Strictly this is only necessary if we are doing a partial relocation. */
reloc_entry->howto = &aoutarm_std_reloc_howto[ARM_26D];
return flag;
}
static bfd_reloc_status_type
coff_thumb_pcrel_common (bfd *abfd,
arelent *reloc_entry,
asymbol *symbol,
void * data,
asection *input_section,
bfd *output_bfd,
char **error_message ATTRIBUTE_UNUSED,
thumb_pcrel_branchtype btype)
{
bfd_vma relocation = 0;
bfd_size_type addr = reloc_entry->address;
long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
bfd_reloc_status_type flag = bfd_reloc_ok;
bfd_vma dstmsk;
bfd_vma offmsk;
bfd_vma signbit;
/* NOTE: This routine is currently used by GAS, but not by the link
phase. */
switch (btype)
{
case b9:
dstmsk = 0x000000ff;
offmsk = 0x000001fe;
signbit = 0x00000100;
break;
case b12:
dstmsk = 0x000007ff;
offmsk = 0x00000ffe;
signbit = 0x00000800;
break;
case b23:
dstmsk = 0x07ff07ff;
offmsk = 0x007fffff;
signbit = 0x00400000;
break;
default:
abort ();
}
/* If this is an undefined symbol, return error. */
if (bfd_is_und_section (symbol->section)
&& (symbol->flags & BSF_WEAK) == 0)
return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;
/* If the sections are different, and we are doing a partial relocation,
just ignore it for now. */
if (symbol->section->name != input_section->name
&& output_bfd != (bfd *)NULL)
return bfd_reloc_continue;
switch (btype)
{
case b9:
case b12:
relocation = ((target & dstmsk) << 1);
break;
case b23:
if (bfd_big_endian (abfd))
relocation = ((target & 0x7ff) << 1) | ((target & 0x07ff0000) >> 4);
else
relocation = ((target & 0x7ff) << 12) | ((target & 0x07ff0000) >> 15);
break;
default:
abort ();
}
relocation = (relocation ^ signbit) - signbit; /* Sign extend. */
relocation += symbol->value;
relocation += symbol->section->output_section->vma;
relocation += symbol->section->output_offset;
relocation += reloc_entry->addend;
relocation -= input_section->output_section->vma;
relocation -= input_section->output_offset;
relocation -= addr;
if (relocation & 1)
return bfd_reloc_overflow;
/* Check for overflow. */
if (relocation & signbit)
{
if ((relocation & ~offmsk) != ~offmsk)
flag = bfd_reloc_overflow;
}
else if (relocation & ~offmsk)
flag = bfd_reloc_overflow;
target &= ~dstmsk;
switch (btype)
{
case b9:
case b12:
target |= (relocation >> 1);
break;
case b23:
if (bfd_big_endian (abfd))
target |= (((relocation & 0xfff) >> 1)
| ((relocation << 4) & 0x07ff0000));
else
target |= (((relocation & 0xffe) << 15)
| ((relocation >> 12) & 0x7ff));
break;
default:
abort ();
}
bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr);
/* Now the ARM magic... Change the reloc type so that it is marked as done.
Strictly this is only necessary if we are doing a partial relocation. */
reloc_entry->howto = & aoutarm_std_reloc_howto [ARM_26D];
/* TODO: We should possibly have DONE entries for the THUMB PCREL relocations. */
return flag;
}
#ifndef ARM_WINCE
static bfd_reloc_status_type
coff_thumb_pcrel_23 (bfd *abfd,
arelent *reloc_entry,
asymbol *symbol,
void * data,
asection *input_section,
bfd *output_bfd,
char **error_message)
{
return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
input_section, output_bfd, error_message,
b23);
}
static bfd_reloc_status_type
coff_thumb_pcrel_9 (bfd *abfd,
arelent *reloc_entry,
asymbol *symbol,
void * data,
asection *input_section,
bfd *output_bfd,
char **error_message)
{
return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
input_section, output_bfd, error_message,
b9);
}
#endif /* not ARM_WINCE */
static bfd_reloc_status_type
coff_thumb_pcrel_12 (bfd *abfd,
arelent *reloc_entry,
asymbol *symbol,
void * data,
asection *input_section,
bfd *output_bfd,
char **error_message)
{
return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
input_section, output_bfd, error_message,
b12);
}
static const struct reloc_howto_struct *
coff_arm_reloc_type_lookup (bfd * abfd, bfd_reloc_code_real_type code)
{
#define ASTD(i,j) case i: return aoutarm_std_reloc_howto + j
if (code == BFD_RELOC_CTOR)
switch (bfd_arch_bits_per_address (abfd))
{
case 32:
code = BFD_RELOC_32;
break;
default:
return NULL;
}
switch (code)
{
#ifdef ARM_WINCE
ASTD (BFD_RELOC_32, ARM_32);
ASTD (BFD_RELOC_RVA, ARM_RVA32);
ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26);
ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12);
ASTD (BFD_RELOC_32_SECREL, ARM_SECREL);
#else
ASTD (BFD_RELOC_8, ARM_8);
ASTD (BFD_RELOC_16, ARM_16);
ASTD (BFD_RELOC_32, ARM_32);
ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26);
ASTD (BFD_RELOC_ARM_PCREL_BLX, ARM_26);
ASTD (BFD_RELOC_8_PCREL, ARM_DISP8);
ASTD (BFD_RELOC_16_PCREL, ARM_DISP16);
ASTD (BFD_RELOC_32_PCREL, ARM_DISP32);
ASTD (BFD_RELOC_RVA, ARM_RVA32);
ASTD (BFD_RELOC_THUMB_PCREL_BRANCH9, ARM_THUMB9);
ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12);
ASTD (BFD_RELOC_THUMB_PCREL_BRANCH23, ARM_THUMB23);
ASTD (BFD_RELOC_THUMB_PCREL_BLX, ARM_THUMB23);
#endif
default: return NULL;
}
}
static reloc_howto_type *
coff_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
const char *r_name)
{
unsigned int i;
for (i = 0;
i < (sizeof (aoutarm_std_reloc_howto)
/ sizeof (aoutarm_std_reloc_howto[0]));
i++)
if (aoutarm_std_reloc_howto[i].name != NULL
&& strcasecmp (aoutarm_std_reloc_howto[i].name, r_name) == 0)
return &aoutarm_std_reloc_howto[i];
return NULL;
}
#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER 2
#define COFF_PAGE_SIZE 0x1000
/* Turn a howto into a reloc nunmber. */
#define SELECT_RELOC(x,howto) { x.r_type = howto->type; }
#define BADMAG(x) ARMBADMAG(x)
#define ARM 1 /* Customize coffcode.h. */
#ifndef ARM_WINCE
/* Make sure that the 'r_offset' field is copied properly
so that identical binaries will compare the same. */
#define SWAP_IN_RELOC_OFFSET H_GET_32
#define SWAP_OUT_RELOC_OFFSET H_PUT_32
#endif
/* Extend the coff_link_hash_table structure with a few ARM specific fields.
This allows us to store global data here without actually creating any
global variables, which is a no-no in the BFD world. */
struct coff_arm_link_hash_table
{
/* The original coff_link_hash_table structure. MUST be first field. */
struct coff_link_hash_table root;
/* The size in bytes of the section containing the Thumb-to-ARM glue. */
bfd_size_type thumb_glue_size;
/* The size in bytes of the section containing the ARM-to-Thumb glue. */
bfd_size_type arm_glue_size;
/* An arbitrary input BFD chosen to hold the glue sections. */
bfd * bfd_of_glue_owner;
/* Support interworking with old, non-interworking aware ARM code. */
int support_old_code;
};
/* Get the ARM coff linker hash table from a link_info structure. */
#define coff_arm_hash_table(info) \
((struct coff_arm_link_hash_table *) ((info)->hash))
/* Create an ARM coff linker hash table. */
static struct bfd_link_hash_table *
coff_arm_link_hash_table_create (bfd * abfd)
{
struct coff_arm_link_hash_table * ret;
bfd_size_type amt = sizeof (struct coff_arm_link_hash_table);
ret = bfd_zmalloc (amt);
if (ret == NULL)
return NULL;
if (!_bfd_coff_link_hash_table_init (&ret->root,
abfd,
_bfd_coff_link_hash_newfunc,
sizeof (struct coff_link_hash_entry)))
{
free (ret);
return NULL;
}
return & ret->root.root;
}
static bfd_boolean
arm_emit_base_file_entry (struct bfd_link_info *info,
bfd *output_bfd,
asection *input_section,
bfd_vma reloc_offset)
{
bfd_vma addr = (reloc_offset
- input_section->vma
+ input_section->output_offset
+ input_section->output_section->vma);
if (coff_data (output_bfd)->pe)
addr -= pe_data (output_bfd)->pe_opthdr.ImageBase;
if (fwrite (&addr, sizeof (addr), 1, (FILE *) info->base_file) == 1)
return TRUE;
bfd_set_error (bfd_error_system_call);
return FALSE;
}
#ifndef ARM_WINCE
/* The thumb form of a long branch is a bit finicky, because the offset
encoding is split over two fields, each in it's own instruction. They
can occur in any order. So given a thumb form of long branch, and an
offset, insert the offset into the thumb branch and return finished
instruction.
It takes two thumb instructions to encode the target address. Each has
11 bits to invest. The upper 11 bits are stored in one (identified by
H-0.. see below), the lower 11 bits are stored in the other (identified
by H-1).
Combine together and shifted left by 1 (it's a half word address) and
there you have it.
Op: 1111 = F,
H-0, upper address-0 = 000
Op: 1111 = F,
H-1, lower address-0 = 800
They can be ordered either way, but the arm tools I've seen always put
the lower one first. It probably doesn't matter. [email protected]
XXX: Actually the order does matter. The second instruction (H-1)
moves the computed address into the PC, so it must be the second one
in the sequence. The problem, however is that whilst little endian code
stores the instructions in HI then LOW order, big endian code does the
reverse. [email protected]. */
#define LOW_HI_ORDER 0xF800F000
#define HI_LOW_ORDER 0xF000F800
static insn32
insert_thumb_branch (insn32 br_insn, int rel_off)
{
unsigned int low_bits;
unsigned int high_bits;
BFD_ASSERT ((rel_off & 1) != 1);
rel_off >>= 1; /* Half word aligned address. */
low_bits = rel_off & 0x000007FF; /* The bottom 11 bits. */
high_bits = (rel_off >> 11) & 0x000007FF; /* The top 11 bits. */
if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER)
br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits;