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Copy pathexchange_wrapper.go
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exchange_wrapper.go
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package cuda
/*
THIS FILE IS AUTO-GENERATED BY CUDA2GO.
EDITING IS FUTILE.
*/
import (
"github.com/barnex/cuda5/cu"
"unsafe"
)
var addexchange_code cu.Function
type addexchange_args struct {
arg_Bx unsafe.Pointer
arg_By unsafe.Pointer
arg_Bz unsafe.Pointer
arg_mx unsafe.Pointer
arg_my unsafe.Pointer
arg_mz unsafe.Pointer
arg_aLUT2d unsafe.Pointer
arg_regions unsafe.Pointer
arg_wx float32
arg_wy float32
arg_wz float32
arg_Nx int
arg_Ny int
arg_Nz int
arg_PBC byte
argptr [15]unsafe.Pointer
}
// Wrapper for addexchange CUDA kernel, asynchronous.
func k_addexchange_async(Bx unsafe.Pointer, By unsafe.Pointer, Bz unsafe.Pointer, mx unsafe.Pointer, my unsafe.Pointer, mz unsafe.Pointer, aLUT2d unsafe.Pointer, regions unsafe.Pointer, wx float32, wy float32, wz float32, Nx int, Ny int, Nz int, PBC byte, cfg *config, str cu.Stream) {
if synchronous { // debug
Sync()
}
if addexchange_code == 0 {
addexchange_code = fatbinLoad(addexchange_map, "addexchange")
}
var _a_ addexchange_args
_a_.arg_Bx = Bx
_a_.argptr[0] = unsafe.Pointer(&_a_.arg_Bx)
_a_.arg_By = By
_a_.argptr[1] = unsafe.Pointer(&_a_.arg_By)
_a_.arg_Bz = Bz
_a_.argptr[2] = unsafe.Pointer(&_a_.arg_Bz)
_a_.arg_mx = mx
_a_.argptr[3] = unsafe.Pointer(&_a_.arg_mx)
_a_.arg_my = my
_a_.argptr[4] = unsafe.Pointer(&_a_.arg_my)
_a_.arg_mz = mz
_a_.argptr[5] = unsafe.Pointer(&_a_.arg_mz)
_a_.arg_aLUT2d = aLUT2d
_a_.argptr[6] = unsafe.Pointer(&_a_.arg_aLUT2d)
_a_.arg_regions = regions
_a_.argptr[7] = unsafe.Pointer(&_a_.arg_regions)
_a_.arg_wx = wx
_a_.argptr[8] = unsafe.Pointer(&_a_.arg_wx)
_a_.arg_wy = wy
_a_.argptr[9] = unsafe.Pointer(&_a_.arg_wy)
_a_.arg_wz = wz
_a_.argptr[10] = unsafe.Pointer(&_a_.arg_wz)
_a_.arg_Nx = Nx
_a_.argptr[11] = unsafe.Pointer(&_a_.arg_Nx)
_a_.arg_Ny = Ny
_a_.argptr[12] = unsafe.Pointer(&_a_.arg_Ny)
_a_.arg_Nz = Nz
_a_.argptr[13] = unsafe.Pointer(&_a_.arg_Nz)
_a_.arg_PBC = PBC
_a_.argptr[14] = unsafe.Pointer(&_a_.arg_PBC)
args := _a_.argptr[:]
cu.LaunchKernel(addexchange_code, cfg.Grid.X, cfg.Grid.Y, cfg.Grid.Z, cfg.Block.X, cfg.Block.Y, cfg.Block.Z, 0, str, args)
if synchronous { // debug
Sync()
}
}
// Wrapper for addexchange CUDA kernel, synchronized.
func k_addexchange_sync(Bx unsafe.Pointer, By unsafe.Pointer, Bz unsafe.Pointer, mx unsafe.Pointer, my unsafe.Pointer, mz unsafe.Pointer, aLUT2d unsafe.Pointer, regions unsafe.Pointer, wx float32, wy float32, wz float32, Nx int, Ny int, Nz int, PBC byte, cfg *config) {
Sync()
k_addexchange_async(Bx, By, Bz, mx, my, mz, aLUT2d, regions, wx, wy, wz, Nx, Ny, Nz, PBC, cfg, stream0)
Sync()
}
var addexchange_map = map[int]string{0: "",
20: addexchange_ptx_20,
30: addexchange_ptx_30,
35: addexchange_ptx_35}
const (
addexchange_ptx_20 = `
.version 3.2
.target sm_20
.address_size 64
.visible .entry addexchange(
.param .u64 addexchange_param_0,
.param .u64 addexchange_param_1,
.param .u64 addexchange_param_2,
.param .u64 addexchange_param_3,
.param .u64 addexchange_param_4,
.param .u64 addexchange_param_5,
.param .u64 addexchange_param_6,
.param .u64 addexchange_param_7,
.param .f32 addexchange_param_8,
.param .f32 addexchange_param_9,
.param .f32 addexchange_param_10,
.param .u32 addexchange_param_11,
.param .u32 addexchange_param_12,
.param .u32 addexchange_param_13,
.param .u8 addexchange_param_14
)
{
.reg .pred %p<19>;
.reg .s16 %rs<21>;
.reg .s32 %r<261>;
.reg .f32 %f<82>;
.reg .s64 %rd<110>;
ld.param.u64 %rd8, [addexchange_param_0];
ld.param.u64 %rd9, [addexchange_param_1];
ld.param.u64 %rd10, [addexchange_param_2];
ld.param.u64 %rd11, [addexchange_param_3];
ld.param.u64 %rd12, [addexchange_param_4];
ld.param.u64 %rd13, [addexchange_param_5];
ld.param.u64 %rd14, [addexchange_param_6];
ld.param.u64 %rd15, [addexchange_param_7];
ld.param.f32 %f46, [addexchange_param_8];
ld.param.f32 %f47, [addexchange_param_9];
ld.param.f32 %f48, [addexchange_param_10];
ld.param.u32 %r52, [addexchange_param_11];
ld.param.u32 %r53, [addexchange_param_12];
ld.param.u32 %r54, [addexchange_param_13];
cvta.to.global.u64 %rd1, %rd10;
cvta.to.global.u64 %rd2, %rd9;
cvta.to.global.u64 %rd3, %rd8;
cvta.to.global.u64 %rd4, %rd15;
cvta.to.global.u64 %rd5, %rd13;
cvta.to.global.u64 %rd6, %rd12;
cvta.to.global.u64 %rd7, %rd11;
.loc 1 16 1
mov.u32 %r55, %ntid.x;
mov.u32 %r56, %ctaid.x;
mov.u32 %r57, %tid.x;
mad.lo.s32 %r1, %r55, %r56, %r57;
.loc 1 17 1
mov.u32 %r58, %ntid.y;
mov.u32 %r59, %ctaid.y;
mov.u32 %r60, %tid.y;
mad.lo.s32 %r2, %r58, %r59, %r60;
.loc 1 18 1
mov.u32 %r61, %ntid.z;
mov.u32 %r62, %ctaid.z;
mov.u32 %r63, %tid.z;
mad.lo.s32 %r3, %r61, %r62, %r63;
.loc 1 20 1
setp.ge.s32 %p1, %r2, %r53;
setp.ge.s32 %p2, %r1, %r52;
or.pred %p3, %p2, %p1;
.loc 1 20 1
setp.ge.s32 %p4, %r3, %r54;
or.pred %p5, %p3, %p4;
ld.param.u8 %rs4, [addexchange_param_14];
.loc 1 20 1
@%p5 bra BB0_40;
.loc 1 25 1
mad.lo.s32 %r64, %r3, %r53, %r2;
mad.lo.s32 %r65, %r64, %r52, %r1;
cvt.s64.s32 %rd16, %r65;
mul.wide.s32 %rd17, %r65, 4;
add.s64 %rd18, %rd7, %rd17;
.loc 1 26 1
ld.global.f32 %f1, [%rd18];
add.s64 %rd19, %rd6, %rd17;
.loc 1 26 1
ld.global.f32 %f2, [%rd19];
add.s64 %rd20, %rd5, %rd17;
.loc 1 26 1
ld.global.f32 %f3, [%rd20];
add.s64 %rd21, %rd4, %rd16;
.loc 1 27 1
ld.global.u8 %rs1, [%rd21];
.loc 1 69 1
cvt.u32.u16 %r66, %rs1;
and.b32 %r4, %r66, 255;
add.s64 %rd22, %rd3, %rd17;
.loc 1 28 1
ld.global.f32 %f4, [%rd22];
add.s64 %rd23, %rd2, %rd17;
.loc 1 28 1
ld.global.f32 %f5, [%rd23];
add.s64 %rd24, %rd1, %rd17;
.loc 1 28 1
ld.global.f32 %f6, [%rd24];
.loc 1 35 1
and.b16 %rs5, %rs4, 1;
setp.eq.b16 %p6, %rs5, 1;
@!%p6 bra BB0_3;
bra.uni BB0_2;
BB0_2:
add.s32 %r71, %r1, -1;
rem.s32 %r72, %r71, %r52;
add.s32 %r73, %r72, %r52;
rem.s32 %r249, %r73, %r52;
bra.uni BB0_4;
BB0_3:
.loc 1 35 1
add.s32 %r78, %r1, -1;
mov.u32 %r79, 0;
.loc 2 2642 10
max.s32 %r249, %r78, %r79;
BB0_4:
.loc 1 35 226
mad.lo.s32 %r89, %r64, %r52, %r249;
cvt.s64.s32 %rd27, %r89;
mul.wide.s32 %rd28, %r89, 4;
add.s64 %rd29, %rd7, %rd28;
.loc 1 36 1
ld.global.f32 %f7, [%rd29];
add.s64 %rd31, %rd6, %rd28;
.loc 1 36 1
ld.global.f32 %f8, [%rd31];
add.s64 %rd33, %rd5, %rd28;
.loc 1 36 1
ld.global.f32 %f9, [%rd33];
add.s64 %rd34, %rd4, %rd27;
.loc 1 37 1
ld.global.u8 %rs6, [%rd34];
and.b16 %rs7, %rs1, 255;
setp.gt.u16 %p7, %rs6, %rs7;
cvt.u32.u16 %r8, %rs6;
@%p7 bra BB0_6;
add.s32 %r90, %r4, 1;
mul.lo.s32 %r91, %r90, %r4;
shr.u32 %r92, %r91, 31;
add.s32 %r93, %r91, %r92;
shr.s32 %r94, %r93, 1;
add.s32 %r250, %r8, %r94;
bra.uni BB0_7;
BB0_6:
.loc 1 37 1
add.s32 %r95, %r8, 1;
mul.lo.s32 %r96, %r95, %r8;
shr.u32 %r97, %r96, 31;
add.s32 %r98, %r96, %r97;
shr.s32 %r99, %r98, 1;
add.s32 %r250, %r99, %r4;
BB0_7:
cvta.to.global.u64 %rd35, %rd14;
mul.wide.s32 %rd36, %r250, 4;
add.s64 %rd37, %rd35, %rd36;
.loc 1 37 1
ld.global.f32 %f49, [%rd37];
.loc 1 38 1
mul.f32 %f50, %f49, %f46;
sub.f32 %f51, %f7, %f1;
sub.f32 %f52, %f8, %f2;
sub.f32 %f53, %f9, %f3;
.loc 1 38 1
fma.rn.f32 %f10, %f50, %f51, %f4;
fma.rn.f32 %f11, %f50, %f52, %f5;
fma.rn.f32 %f12, %f50, %f53, %f6;
.loc 1 41 1
add.s32 %r12, %r1, 1;
@!%p6 bra BB0_9;
bra.uni BB0_8;
BB0_8:
rem.s32 %r104, %r12, %r52;
add.s32 %r105, %r104, %r52;
rem.s32 %r251, %r105, %r52;
bra.uni BB0_10;
BB0_9:
.loc 1 41 1
add.s32 %r106, %r52, -1;
.loc 2 2621 10
min.s32 %r251, %r12, %r106;
BB0_10:
.loc 1 41 226
mad.lo.s32 %r116, %r64, %r52, %r251;
cvt.s64.s32 %rd40, %r116;
mul.wide.s32 %rd41, %r116, 4;
add.s64 %rd42, %rd7, %rd41;
.loc 1 42 1
ld.global.f32 %f13, [%rd42];
add.s64 %rd44, %rd6, %rd41;
.loc 1 42 1
ld.global.f32 %f14, [%rd44];
add.s64 %rd46, %rd5, %rd41;
.loc 1 42 1
ld.global.f32 %f15, [%rd46];
add.s64 %rd47, %rd4, %rd40;
.loc 1 43 1
ld.global.u8 %rs9, [%rd47];
setp.gt.u16 %p9, %rs9, %rs7;
cvt.u32.u16 %r16, %rs9;
@%p9 bra BB0_12;
add.s32 %r117, %r4, 1;
mul.lo.s32 %r118, %r117, %r4;
shr.u32 %r119, %r118, 31;
add.s32 %r120, %r118, %r119;
shr.s32 %r121, %r120, 1;
add.s32 %r252, %r16, %r121;
bra.uni BB0_13;
BB0_12:
.loc 1 43 1
add.s32 %r122, %r16, 1;
mul.lo.s32 %r123, %r122, %r16;
shr.u32 %r124, %r123, 31;
add.s32 %r125, %r123, %r124;
shr.s32 %r126, %r125, 1;
add.s32 %r252, %r126, %r4;
BB0_13:
mul.wide.s32 %rd49, %r252, 4;
add.s64 %rd50, %rd35, %rd49;
.loc 1 43 1
ld.global.f32 %f54, [%rd50];
.loc 1 44 1
mul.f32 %f55, %f54, %f46;
sub.f32 %f56, %f13, %f1;
sub.f32 %f57, %f14, %f2;
sub.f32 %f58, %f15, %f3;
.loc 1 44 1
fma.rn.f32 %f16, %f55, %f56, %f10;
fma.rn.f32 %f17, %f55, %f57, %f11;
fma.rn.f32 %f18, %f55, %f58, %f12;
.loc 1 47 1
and.b16 %rs2, %rs4, 2;
setp.eq.s16 %p10, %rs2, 0;
add.s32 %r20, %r2, -1;
@%p10 bra BB0_15;
rem.s32 %r131, %r20, %r53;
add.s32 %r132, %r131, %r53;
rem.s32 %r253, %r132, %r53;
bra.uni BB0_16;
BB0_15:
mov.u32 %r133, 0;
.loc 2 2642 10
max.s32 %r253, %r20, %r133;
BB0_16:
.loc 1 47 179
mad.lo.s32 %r138, %r3, %r53, %r253;
mad.lo.s32 %r143, %r138, %r52, %r1;
cvt.s64.s32 %rd53, %r143;
mul.wide.s32 %rd54, %r143, 4;
add.s64 %rd55, %rd7, %rd54;
.loc 1 48 1
ld.global.f32 %f19, [%rd55];
add.s64 %rd57, %rd6, %rd54;
.loc 1 48 1
ld.global.f32 %f20, [%rd57];
add.s64 %rd59, %rd5, %rd54;
.loc 1 48 1
ld.global.f32 %f21, [%rd59];
add.s64 %rd60, %rd4, %rd53;
.loc 1 49 1
ld.global.u8 %rs11, [%rd60];
setp.gt.u16 %p11, %rs11, %rs7;
cvt.u32.u16 %r24, %rs11;
@%p11 bra BB0_18;
add.s32 %r144, %r4, 1;
mul.lo.s32 %r145, %r144, %r4;
shr.u32 %r146, %r145, 31;
add.s32 %r147, %r145, %r146;
shr.s32 %r148, %r147, 1;
add.s32 %r254, %r24, %r148;
bra.uni BB0_19;
BB0_18:
.loc 1 49 1
add.s32 %r149, %r24, 1;
mul.lo.s32 %r150, %r149, %r24;
shr.u32 %r151, %r150, 31;
add.s32 %r152, %r150, %r151;
shr.s32 %r153, %r152, 1;
add.s32 %r254, %r153, %r4;
BB0_19:
mul.wide.s32 %rd62, %r254, 4;
add.s64 %rd63, %rd35, %rd62;
.loc 1 49 1
ld.global.f32 %f59, [%rd63];
.loc 1 50 1
mul.f32 %f60, %f59, %f47;
sub.f32 %f61, %f19, %f1;
sub.f32 %f62, %f20, %f2;
sub.f32 %f63, %f21, %f3;
.loc 1 50 1
fma.rn.f32 %f22, %f60, %f61, %f16;
fma.rn.f32 %f23, %f60, %f62, %f17;
fma.rn.f32 %f24, %f60, %f63, %f18;
.loc 1 53 1
add.s32 %r28, %r2, 1;
and.b16 %rs13, %rs2, 255;
setp.eq.s16 %p12, %rs13, 0;
.loc 1 53 1
@%p12 bra BB0_21;
rem.s32 %r158, %r28, %r53;
add.s32 %r159, %r158, %r53;
rem.s32 %r255, %r159, %r53;
bra.uni BB0_22;
BB0_21:
.loc 1 53 1
add.s32 %r160, %r53, -1;
.loc 2 2621 10
min.s32 %r255, %r28, %r160;
BB0_22:
.loc 1 53 179
mad.lo.s32 %r165, %r3, %r53, %r255;
mad.lo.s32 %r170, %r165, %r52, %r1;
cvt.s64.s32 %rd66, %r170;
mul.wide.s32 %rd67, %r170, 4;
add.s64 %rd68, %rd7, %rd67;
.loc 1 54 1
ld.global.f32 %f25, [%rd68];
add.s64 %rd70, %rd6, %rd67;
.loc 1 54 1
ld.global.f32 %f26, [%rd70];
add.s64 %rd72, %rd5, %rd67;
.loc 1 54 1
ld.global.f32 %f27, [%rd72];
add.s64 %rd73, %rd4, %rd66;
.loc 1 55 1
ld.global.u8 %rs14, [%rd73];
setp.gt.u16 %p13, %rs14, %rs7;
cvt.u32.u16 %r32, %rs14;
@%p13 bra BB0_24;
add.s32 %r171, %r4, 1;
mul.lo.s32 %r172, %r171, %r4;
shr.u32 %r173, %r172, 31;
add.s32 %r174, %r172, %r173;
shr.s32 %r175, %r174, 1;
add.s32 %r256, %r32, %r175;
bra.uni BB0_25;
BB0_24:
.loc 1 55 1
add.s32 %r176, %r32, 1;
mul.lo.s32 %r177, %r176, %r32;
shr.u32 %r178, %r177, 31;
add.s32 %r179, %r177, %r178;
shr.s32 %r180, %r179, 1;
add.s32 %r256, %r180, %r4;
BB0_25:
mul.wide.s32 %rd75, %r256, 4;
add.s64 %rd76, %rd35, %rd75;
.loc 1 55 1
ld.global.f32 %f64, [%rd76];
.loc 1 56 1
mul.f32 %f65, %f64, %f47;
sub.f32 %f66, %f25, %f1;
sub.f32 %f67, %f26, %f2;
sub.f32 %f68, %f27, %f3;
.loc 1 56 1
fma.rn.f32 %f79, %f65, %f66, %f22;
fma.rn.f32 %f80, %f65, %f67, %f23;
fma.rn.f32 %f81, %f65, %f68, %f24;
.loc 1 59 1
setp.eq.s32 %p14, %r54, 1;
@%p14 bra BB0_39;
.loc 1 61 1
and.b16 %rs3, %rs4, 4;
setp.eq.s16 %p15, %rs3, 0;
add.s32 %r36, %r3, -1;
@%p15 bra BB0_28;
rem.s32 %r185, %r36, %r54;
add.s32 %r186, %r185, %r54;
rem.s32 %r257, %r186, %r54;
bra.uni BB0_29;
BB0_28:
mov.u32 %r187, 0;
.loc 2 2642 10
max.s32 %r257, %r36, %r187;
BB0_29:
.loc 1 61 133
mad.lo.s32 %r192, %r257, %r53, %r2;
mad.lo.s32 %r197, %r192, %r52, %r1;
cvt.s64.s32 %rd79, %r197;
mul.wide.s32 %rd80, %r197, 4;
add.s64 %rd81, %rd7, %rd80;
.loc 1 62 1
ld.global.f32 %f31, [%rd81];
add.s64 %rd83, %rd6, %rd80;
.loc 1 62 1
ld.global.f32 %f32, [%rd83];
add.s64 %rd85, %rd5, %rd80;
.loc 1 62 1
ld.global.f32 %f33, [%rd85];
add.s64 %rd86, %rd4, %rd79;
.loc 1 63 1
ld.global.u8 %rs16, [%rd86];
setp.gt.u16 %p16, %rs16, %rs7;
cvt.u32.u16 %r40, %rs16;
@%p16 bra BB0_31;
add.s32 %r198, %r4, 1;
mul.lo.s32 %r199, %r198, %r4;
shr.u32 %r200, %r199, 31;
add.s32 %r201, %r199, %r200;
shr.s32 %r202, %r201, 1;
add.s32 %r258, %r40, %r202;
bra.uni BB0_32;
BB0_31:
.loc 1 63 1
add.s32 %r203, %r40, 1;
mul.lo.s32 %r204, %r203, %r40;
shr.u32 %r205, %r204, 31;
add.s32 %r206, %r204, %r205;
shr.s32 %r207, %r206, 1;
add.s32 %r258, %r207, %r4;
BB0_32:
mul.wide.s32 %rd88, %r258, 4;
add.s64 %rd89, %rd35, %rd88;
.loc 1 63 1
ld.global.f32 %f69, [%rd89];
.loc 1 64 1
mul.f32 %f70, %f69, %f48;
sub.f32 %f71, %f31, %f1;
sub.f32 %f72, %f32, %f2;
sub.f32 %f73, %f33, %f3;
.loc 1 64 1
fma.rn.f32 %f34, %f70, %f71, %f79;
fma.rn.f32 %f35, %f70, %f72, %f80;
fma.rn.f32 %f36, %f70, %f73, %f81;
.loc 1 67 1
add.s32 %r44, %r3, 1;
and.b16 %rs18, %rs3, 255;
setp.eq.s16 %p17, %rs18, 0;
.loc 1 67 1
@%p17 bra BB0_34;
rem.s32 %r212, %r44, %r54;
add.s32 %r213, %r212, %r54;
rem.s32 %r259, %r213, %r54;
bra.uni BB0_35;
BB0_34:
.loc 1 67 1
add.s32 %r214, %r54, -1;
.loc 2 2621 10
min.s32 %r259, %r44, %r214;
BB0_35:
.loc 1 67 133
mad.lo.s32 %r219, %r259, %r53, %r2;
mad.lo.s32 %r224, %r219, %r52, %r1;
cvt.s64.s32 %rd92, %r224;
mul.wide.s32 %rd93, %r224, 4;
add.s64 %rd94, %rd7, %rd93;
.loc 1 68 1
ld.global.f32 %f37, [%rd94];
add.s64 %rd96, %rd6, %rd93;
.loc 1 68 1
ld.global.f32 %f38, [%rd96];
add.s64 %rd98, %rd5, %rd93;
.loc 1 68 1
ld.global.f32 %f39, [%rd98];
add.s64 %rd99, %rd4, %rd92;
.loc 1 69 1
ld.global.u8 %rs19, [%rd99];
setp.gt.u16 %p18, %rs19, %rs7;
cvt.u32.u16 %r48, %rs19;
@%p18 bra BB0_37;
add.s32 %r225, %r4, 1;
mul.lo.s32 %r226, %r225, %r4;
shr.u32 %r227, %r226, 31;
add.s32 %r228, %r226, %r227;
shr.s32 %r229, %r228, 1;
add.s32 %r260, %r48, %r229;
bra.uni BB0_38;
BB0_37:
.loc 1 69 1
add.s32 %r230, %r48, 1;
mul.lo.s32 %r231, %r230, %r48;
shr.u32 %r232, %r231, 31;
add.s32 %r233, %r231, %r232;
shr.s32 %r234, %r233, 1;
add.s32 %r260, %r234, %r4;
BB0_38:
mul.wide.s32 %rd101, %r260, 4;
add.s64 %rd102, %rd35, %rd101;
.loc 1 69 1
ld.global.f32 %f74, [%rd102];
.loc 1 70 1
mul.f32 %f75, %f74, %f48;
sub.f32 %f76, %f37, %f1;
sub.f32 %f77, %f38, %f2;
sub.f32 %f78, %f39, %f3;
.loc 1 70 1
fma.rn.f32 %f79, %f75, %f76, %f34;
fma.rn.f32 %f80, %f75, %f77, %f35;
fma.rn.f32 %f81, %f75, %f78, %f36;
BB0_39:
mul.wide.s32 %rd104, %r65, 4;
add.s64 %rd105, %rd3, %rd104;
.loc 1 73 1
st.global.f32 [%rd105], %f79;
add.s64 %rd107, %rd2, %rd104;
.loc 1 74 1
st.global.f32 [%rd107], %f80;
add.s64 %rd109, %rd1, %rd104;
.loc 1 75 1
st.global.f32 [%rd109], %f81;
BB0_40:
.loc 1 76 2
ret;
}
`
addexchange_ptx_30 = `
.version 3.2
.target sm_30
.address_size 64
.visible .entry addexchange(
.param .u64 addexchange_param_0,
.param .u64 addexchange_param_1,
.param .u64 addexchange_param_2,
.param .u64 addexchange_param_3,
.param .u64 addexchange_param_4,
.param .u64 addexchange_param_5,
.param .u64 addexchange_param_6,
.param .u64 addexchange_param_7,
.param .f32 addexchange_param_8,
.param .f32 addexchange_param_9,
.param .f32 addexchange_param_10,
.param .u32 addexchange_param_11,
.param .u32 addexchange_param_12,
.param .u32 addexchange_param_13,
.param .u8 addexchange_param_14
)
{
.reg .pred %p<19>;
.reg .s16 %rs<21>;
.reg .s32 %r<261>;
.reg .f32 %f<82>;
.reg .s64 %rd<110>;
ld.param.u64 %rd8, [addexchange_param_0];
ld.param.u64 %rd9, [addexchange_param_1];
ld.param.u64 %rd10, [addexchange_param_2];
ld.param.u64 %rd11, [addexchange_param_3];
ld.param.u64 %rd12, [addexchange_param_4];
ld.param.u64 %rd13, [addexchange_param_5];
ld.param.u64 %rd14, [addexchange_param_6];
ld.param.u64 %rd15, [addexchange_param_7];
ld.param.f32 %f46, [addexchange_param_8];
ld.param.f32 %f47, [addexchange_param_9];
ld.param.f32 %f48, [addexchange_param_10];
ld.param.u32 %r52, [addexchange_param_11];
ld.param.u32 %r53, [addexchange_param_12];
ld.param.u32 %r54, [addexchange_param_13];
cvta.to.global.u64 %rd1, %rd10;
cvta.to.global.u64 %rd2, %rd9;
cvta.to.global.u64 %rd3, %rd8;
cvta.to.global.u64 %rd4, %rd15;
cvta.to.global.u64 %rd5, %rd13;
cvta.to.global.u64 %rd6, %rd12;
cvta.to.global.u64 %rd7, %rd11;
.loc 1 16 1
mov.u32 %r55, %ntid.x;
mov.u32 %r56, %ctaid.x;
mov.u32 %r57, %tid.x;
mad.lo.s32 %r1, %r55, %r56, %r57;
.loc 1 17 1
mov.u32 %r58, %ntid.y;
mov.u32 %r59, %ctaid.y;
mov.u32 %r60, %tid.y;
mad.lo.s32 %r2, %r58, %r59, %r60;
.loc 1 18 1
mov.u32 %r61, %ntid.z;
mov.u32 %r62, %ctaid.z;
mov.u32 %r63, %tid.z;
mad.lo.s32 %r3, %r61, %r62, %r63;
.loc 1 20 1
setp.ge.s32 %p1, %r2, %r53;
setp.ge.s32 %p2, %r1, %r52;
or.pred %p3, %p2, %p1;
.loc 1 20 1
setp.ge.s32 %p4, %r3, %r54;
or.pred %p5, %p3, %p4;
ld.param.u8 %rs4, [addexchange_param_14];
.loc 1 20 1
@%p5 bra BB0_40;
.loc 1 25 1
mad.lo.s32 %r64, %r3, %r53, %r2;
mad.lo.s32 %r65, %r64, %r52, %r1;
cvt.s64.s32 %rd16, %r65;
mul.wide.s32 %rd17, %r65, 4;
add.s64 %rd18, %rd7, %rd17;
.loc 1 26 1
ld.global.f32 %f1, [%rd18];
add.s64 %rd19, %rd6, %rd17;
.loc 1 26 1
ld.global.f32 %f2, [%rd19];
add.s64 %rd20, %rd5, %rd17;
.loc 1 26 1
ld.global.f32 %f3, [%rd20];
add.s64 %rd21, %rd4, %rd16;
.loc 1 27 1
ld.global.u8 %rs1, [%rd21];
.loc 1 69 1
cvt.u32.u16 %r66, %rs1;
and.b32 %r4, %r66, 255;
add.s64 %rd22, %rd3, %rd17;
.loc 1 28 1
ld.global.f32 %f4, [%rd22];
add.s64 %rd23, %rd2, %rd17;
.loc 1 28 1
ld.global.f32 %f5, [%rd23];
add.s64 %rd24, %rd1, %rd17;
.loc 1 28 1
ld.global.f32 %f6, [%rd24];
.loc 1 35 1
and.b16 %rs5, %rs4, 1;
setp.eq.b16 %p6, %rs5, 1;
@!%p6 bra BB0_3;
bra.uni BB0_2;
BB0_2:
add.s32 %r71, %r1, -1;
rem.s32 %r72, %r71, %r52;
add.s32 %r73, %r72, %r52;
rem.s32 %r249, %r73, %r52;
bra.uni BB0_4;
BB0_3:
.loc 1 35 1
add.s32 %r78, %r1, -1;
mov.u32 %r79, 0;
.loc 2 2642 10
max.s32 %r249, %r78, %r79;
BB0_4:
.loc 1 35 226
mad.lo.s32 %r89, %r64, %r52, %r249;
cvt.s64.s32 %rd27, %r89;
mul.wide.s32 %rd28, %r89, 4;
add.s64 %rd29, %rd7, %rd28;
.loc 1 36 1
ld.global.f32 %f7, [%rd29];
add.s64 %rd31, %rd6, %rd28;
.loc 1 36 1
ld.global.f32 %f8, [%rd31];
add.s64 %rd33, %rd5, %rd28;
.loc 1 36 1
ld.global.f32 %f9, [%rd33];
add.s64 %rd34, %rd4, %rd27;
.loc 1 37 1
ld.global.u8 %rs6, [%rd34];
and.b16 %rs7, %rs1, 255;
setp.gt.u16 %p7, %rs6, %rs7;
cvt.u32.u16 %r8, %rs6;
@%p7 bra BB0_6;
add.s32 %r90, %r4, 1;
mul.lo.s32 %r91, %r90, %r4;
shr.u32 %r92, %r91, 31;
add.s32 %r93, %r91, %r92;
shr.s32 %r94, %r93, 1;
add.s32 %r250, %r8, %r94;
bra.uni BB0_7;
BB0_6:
.loc 1 37 1
add.s32 %r95, %r8, 1;
mul.lo.s32 %r96, %r95, %r8;
shr.u32 %r97, %r96, 31;
add.s32 %r98, %r96, %r97;
shr.s32 %r99, %r98, 1;
add.s32 %r250, %r99, %r4;
BB0_7:
cvta.to.global.u64 %rd35, %rd14;
mul.wide.s32 %rd36, %r250, 4;
add.s64 %rd37, %rd35, %rd36;
.loc 1 37 1
ld.global.f32 %f49, [%rd37];
.loc 1 38 1
mul.f32 %f50, %f49, %f46;
sub.f32 %f51, %f7, %f1;
sub.f32 %f52, %f8, %f2;
sub.f32 %f53, %f9, %f3;
.loc 1 38 1
fma.rn.f32 %f10, %f50, %f51, %f4;
fma.rn.f32 %f11, %f50, %f52, %f5;
fma.rn.f32 %f12, %f50, %f53, %f6;
.loc 1 41 1
add.s32 %r12, %r1, 1;
@!%p6 bra BB0_9;
bra.uni BB0_8;
BB0_8:
rem.s32 %r104, %r12, %r52;
add.s32 %r105, %r104, %r52;
rem.s32 %r251, %r105, %r52;
bra.uni BB0_10;
BB0_9:
.loc 1 41 1
add.s32 %r106, %r52, -1;
.loc 2 2621 10
min.s32 %r251, %r12, %r106;
BB0_10:
.loc 1 41 226
mad.lo.s32 %r116, %r64, %r52, %r251;
cvt.s64.s32 %rd40, %r116;
mul.wide.s32 %rd41, %r116, 4;
add.s64 %rd42, %rd7, %rd41;
.loc 1 42 1
ld.global.f32 %f13, [%rd42];
add.s64 %rd44, %rd6, %rd41;
.loc 1 42 1
ld.global.f32 %f14, [%rd44];
add.s64 %rd46, %rd5, %rd41;
.loc 1 42 1
ld.global.f32 %f15, [%rd46];
add.s64 %rd47, %rd4, %rd40;
.loc 1 43 1
ld.global.u8 %rs9, [%rd47];
setp.gt.u16 %p9, %rs9, %rs7;
cvt.u32.u16 %r16, %rs9;
@%p9 bra BB0_12;
add.s32 %r117, %r4, 1;
mul.lo.s32 %r118, %r117, %r4;
shr.u32 %r119, %r118, 31;
add.s32 %r120, %r118, %r119;
shr.s32 %r121, %r120, 1;
add.s32 %r252, %r16, %r121;
bra.uni BB0_13;
BB0_12:
.loc 1 43 1
add.s32 %r122, %r16, 1;
mul.lo.s32 %r123, %r122, %r16;
shr.u32 %r124, %r123, 31;
add.s32 %r125, %r123, %r124;
shr.s32 %r126, %r125, 1;
add.s32 %r252, %r126, %r4;
BB0_13:
mul.wide.s32 %rd49, %r252, 4;
add.s64 %rd50, %rd35, %rd49;
.loc 1 43 1
ld.global.f32 %f54, [%rd50];
.loc 1 44 1
mul.f32 %f55, %f54, %f46;
sub.f32 %f56, %f13, %f1;
sub.f32 %f57, %f14, %f2;
sub.f32 %f58, %f15, %f3;
.loc 1 44 1
fma.rn.f32 %f16, %f55, %f56, %f10;
fma.rn.f32 %f17, %f55, %f57, %f11;
fma.rn.f32 %f18, %f55, %f58, %f12;
.loc 1 47 1
and.b16 %rs2, %rs4, 2;
setp.eq.s16 %p10, %rs2, 0;
add.s32 %r20, %r2, -1;
@%p10 bra BB0_15;
rem.s32 %r131, %r20, %r53;
add.s32 %r132, %r131, %r53;
rem.s32 %r253, %r132, %r53;
bra.uni BB0_16;
BB0_15:
mov.u32 %r133, 0;
.loc 2 2642 10
max.s32 %r253, %r20, %r133;
BB0_16:
.loc 1 47 179
mad.lo.s32 %r138, %r3, %r53, %r253;
mad.lo.s32 %r143, %r138, %r52, %r1;
cvt.s64.s32 %rd53, %r143;
mul.wide.s32 %rd54, %r143, 4;
add.s64 %rd55, %rd7, %rd54;
.loc 1 48 1
ld.global.f32 %f19, [%rd55];
add.s64 %rd57, %rd6, %rd54;
.loc 1 48 1
ld.global.f32 %f20, [%rd57];
add.s64 %rd59, %rd5, %rd54;
.loc 1 48 1
ld.global.f32 %f21, [%rd59];
add.s64 %rd60, %rd4, %rd53;
.loc 1 49 1
ld.global.u8 %rs11, [%rd60];
setp.gt.u16 %p11, %rs11, %rs7;
cvt.u32.u16 %r24, %rs11;
@%p11 bra BB0_18;
add.s32 %r144, %r4, 1;
mul.lo.s32 %r145, %r144, %r4;
shr.u32 %r146, %r145, 31;
add.s32 %r147, %r145, %r146;
shr.s32 %r148, %r147, 1;
add.s32 %r254, %r24, %r148;
bra.uni BB0_19;
BB0_18:
.loc 1 49 1
add.s32 %r149, %r24, 1;
mul.lo.s32 %r150, %r149, %r24;
shr.u32 %r151, %r150, 31;
add.s32 %r152, %r150, %r151;
shr.s32 %r153, %r152, 1;
add.s32 %r254, %r153, %r4;
BB0_19:
mul.wide.s32 %rd62, %r254, 4;
add.s64 %rd63, %rd35, %rd62;
.loc 1 49 1
ld.global.f32 %f59, [%rd63];
.loc 1 50 1
mul.f32 %f60, %f59, %f47;
sub.f32 %f61, %f19, %f1;
sub.f32 %f62, %f20, %f2;
sub.f32 %f63, %f21, %f3;
.loc 1 50 1
fma.rn.f32 %f22, %f60, %f61, %f16;
fma.rn.f32 %f23, %f60, %f62, %f17;
fma.rn.f32 %f24, %f60, %f63, %f18;
.loc 1 53 1
add.s32 %r28, %r2, 1;
and.b16 %rs13, %rs2, 255;
setp.eq.s16 %p12, %rs13, 0;
.loc 1 53 1
@%p12 bra BB0_21;
rem.s32 %r158, %r28, %r53;
add.s32 %r159, %r158, %r53;
rem.s32 %r255, %r159, %r53;
bra.uni BB0_22;
BB0_21:
.loc 1 53 1
add.s32 %r160, %r53, -1;
.loc 2 2621 10
min.s32 %r255, %r28, %r160;
BB0_22:
.loc 1 53 179
mad.lo.s32 %r165, %r3, %r53, %r255;
mad.lo.s32 %r170, %r165, %r52, %r1;
cvt.s64.s32 %rd66, %r170;
mul.wide.s32 %rd67, %r170, 4;
add.s64 %rd68, %rd7, %rd67;
.loc 1 54 1
ld.global.f32 %f25, [%rd68];
add.s64 %rd70, %rd6, %rd67;
.loc 1 54 1
ld.global.f32 %f26, [%rd70];