PicoRV32 - A Size-Optimized RISC-V CPU

Verilog Ethernet components for FPGA implementation

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

IC design and development should be faster，simpler and more reliable

RTL, Cmodel, and testbench for NVDLA

Open source FPGA-based NIC and platform for in-network compute

Must-have verilog systemverilog modules

Verilog AXI components for FPGA implementation

HDL libraries and projects

A small, light weight, RISC CPU soft core

Verilog PCI express components

🌱 Open source ecosystem for open FPGA boards

The RIFFA development repository

Various HDL (Verilog) IP Cores

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

HDLBits website practices & solutions

Verilog I2C interface for FPGA implementation

Verilog UART

This is a repository containing solutions to the problem statements given in HDL Bits website.

Silicon-validated SoC implementation of the PicoSoc/PicoRV32

A full-speed device-side USB peripheral core written in Verilog.

An FPGA-based SD-card reader via SPI bus, which can read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器(通过SPI总线)，可以从FAT16或FAT32格式的SD卡中读取文件。

ARM中通过APB总线连接的UART模块

Interface Protocol in Verilog

Wishbone controlled I2C controllers

All About HDL

Verilog极简教程

Learn Verilog

I2C controller core