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5 stars written in Verilog
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一步一步写MIPS CPU

Verilog 784 157 Updated Aug 4, 2021

MIPS CPU implemented in Verilog

Verilog 594 186 Updated Oct 3, 2017

中山大学计算机组成原理实验 (2018 秋):用 Verilog 设计并实现的简易单周期和多周期 CPU

Verilog 95 27 Updated Mar 21, 2021

大二上学期--计算机组成与设计(PH)--实验

Verilog 14 2 Updated Apr 23, 2019

This is a MIPS dual-issue superscalar CPU core basing on MPIS32. This work was finished in August,2019.

Verilog 2 1 Updated Jul 23, 2020
5 stars written in Verilog