Skip to content
View B00Ze's full-sized avatar

Block or report B00Ze

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
Showing results

LiveUSB Bootable exploit chain to unlock all features of xx30 ThinkPad machines. WiFi Whitelist, Advanced Menu, Overclocking.

Shell 1,058 65 Updated Jan 7, 2025
SystemVerilog 194 61 Updated Jan 19, 2025

LLM4DV

SystemVerilog 9 2 Updated Sep 30, 2024

STM32Cube MCU Full Package for the STM32F3 series - (HAL + LL Drivers, CMSIS Core, CMSIS Device, MW libraries plus a set of Projects running on all boards provided by ST (Nucleo, Evaluation and Dis…

C 141 55 Updated Jan 15, 2025

A complete computer science study plan to become a software engineer.

311,389 77,832 Updated Dec 5, 2024

Bluespec SystemVerilog Reed Solomon Decoder

Bluespec 8 2 Updated Jul 17, 2014

A List of Free and Open Source Hardware Verification Tools and Frameworks

507 51 Updated Sep 8, 2023
CSS 321 33 Updated Dec 9, 2022

The roadmap for learning the C++ programming language for beginners and experienced devs.

3,003 304 Updated Dec 2, 2024

CH341A Softwares (Windows, Linux, Mac and Android)

C 321 113 Updated Dec 30, 2024

rusefi - GPL internal combustion engine control unit

C 824 262 Updated Feb 4, 2025

Qwt - Qt Widgets for Technical Applications

C++ 136 53 Updated Jun 13, 2023

Control and Status Register map generator for HDL projects

Python 109 37 Updated Jan 29, 2025

Полезная информация о жизни в Германии

Shell 2,202 386 Updated Dec 4, 2024

information about life in Munich. join our chat on telegram https://t.me/muenchentraktor

207 36 Updated Nov 29, 2023

RISC-V Formal Verification Framework

Verilog 591 100 Updated Apr 6, 2022

Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

Verilog 784 198 Updated Apr 15, 2020

High Performance Computing (HPC) and Signal Processing Framework

C++ 66 19 Updated Sep 8, 2024

A modern, C++-native, test framework for unit-tests, TDD and BDD - using C++14, C++17 and later (C++11 support is in v2.x branch, and C++03 on the Catch1.x branch)

C++ 18,982 3,075 Updated Jan 5, 2025

Constrained random stimuli generation for C++ and SystemC

C++ 49 13 Updated Nov 29, 2023

Theory of digital signal processing (DSP): signals, filtration (IIR, FIR, CIC, MAF), transforms (FFT, DFT, Hilbert, Z-transform) etc.

Jupyter Notebook 1,021 181 Updated Sep 23, 2024

SystemVerilog compiler and language services

C++ 666 144 Updated Feb 4, 2025

Tool for analyzing GDB remote debugging protocol

Python 2 Updated Sep 10, 2017

CppUTest unit testing and mocking framework for C/C++

C++ 1,392 520 Updated Jan 24, 2025

⚙️ A curated list of static analysis (SAST) tools and linters for all programming languages, config files, build tools, and more. The focus is on tools which improve code quality.

Rust 13,554 1,369 Updated Feb 3, 2025

a community wiki for improving code quality

343 31 Updated Dec 21, 2024

An in-browser Python profile viewer

Python 2,385 139 Updated Nov 9, 2024

Package manager and build abstraction tool for FPGA/ASIC development

Python 1,237 256 Updated Jan 16, 2025

The bare metal stack for rust

Rust 1,002 100 Updated Jul 6, 2019
Next