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OFED version upgrade - version 5.7
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Signed-off-by: syaakov <[email protected]>
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@syaakov
syaakov committed Nov 17, 2022
1 parent 94b88ca commit 7ff4122
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Showing 14 changed files with 731 additions and 56 deletions.
9 changes: 9 additions & 0 deletions doc/trex_appendix_mellanox.asciidoc
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Expand Up @@ -269,10 +269,19 @@ TRex v2.32 and lower works with OFED 4.1 and it can't work with OFED 4.2/newer
| 2.33-2.56 | *only* 4.3 | CentOS 7.4
| 2.57 and v2.86 | *only* 4.6 | CentOS 7.6
| 2.89 and above | *only* GA 5.3-1 | CentOS 7.9
| v3.01 and above | *only* 5.7-1 | CentOS 7.9
|=================

WARNING: In our case an upgrade from CentOS 7.3 to CentOS 7.4 using `yum update` didn't work and we needed to *reinstall* everything from scratch see link:https://trex-tgn.cisco.com/youtrack/issue/trex-504[trex-504]

[NOTE]
=====================================================================
In v3.01 we changed the default value of the device-argument: max_dump_files_num. +
We use default value of 0 instead of 128. +
If this argument is important to you, you can set it's value using trex config file, by adding the line: +
dpdk_devargs: ['max_dump_files_num=your_num'].
=====================================================================

== TRex specific implementation details

TRex uses flow director filter to steer specific packets to specific queues.
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2 changes: 2 additions & 0 deletions external_libs/ibverbs/x86_64/include/infiniband/ib_user_ioctl_verbs.h
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Expand Up @@ -208,6 +208,7 @@ enum ib_uverbs_read_counters_flags {
enum ib_uverbs_advise_mr_advice {
IB_UVERBS_ADVISE_MR_ADVICE_PREFETCH,
IB_UVERBS_ADVISE_MR_ADVICE_PREFETCH_WRITE,
IB_UVERBS_ADVISE_MR_ADVICE_PREFETCH_NO_FAULT,
};

enum ib_uverbs_advise_mr_flag {
Expand Down Expand Up @@ -239,6 +240,7 @@ enum rdma_driver_id {
RDMA_DRIVER_OCRDMA,
RDMA_DRIVER_NES,
RDMA_DRIVER_I40IW,
RDMA_DRIVER_IRDMA = RDMA_DRIVER_I40IW,
RDMA_DRIVER_VMW_PVRDMA,
RDMA_DRIVER_QEDR,
RDMA_DRIVER_HNS,
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11 changes: 9 additions & 2 deletions external_libs/ibverbs/x86_64/include/infiniband/mad.h
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Expand Up @@ -76,7 +76,7 @@ extern "C" {
#define IB_BM_BKEY_AND_DATA_SZ (IB_MAD_SIZE - IB_BM_BKEY_OFFS)
#define IB_CC_DATA_OFFS 64
#define IB_CC_DATA_SZ (IB_MAD_SIZE - IB_CC_DATA_OFFS)
#define IB_CC_LOG_DATA_OFFS 32
#define IB_CC_LOG_DATA_OFFS 32
#define IB_CC_LOG_DATA_SZ (IB_MAD_SIZE - IB_CC_LOG_DATA_OFFS)

enum MAD_CLASSES {
Expand Down Expand Up @@ -1319,12 +1319,19 @@ enum MAD_FIELDS {
IB_PC_QP1_DROP_F,

/*
* More PortInfoExtended fields
* More PortInfoExtended fields (HDR)
*/
IB_PORT_EXT_HDR_FEC_MODE_SUPPORTED_F,
IB_PORT_EXT_HDR_FEC_MODE_ENABLED_F,
IB_PORT_EXT_HDR_FEC_MODE_LAST_F,

/*
* More PortInfoExtended fields (NDR)
*/
IB_PORT_EXT_NDR_FEC_MODE_SUPPORTED_F,
IB_PORT_EXT_NDR_FEC_MODE_ENABLED_F,
IB_PORT_EXT_NDR_FEC_MODE_LAST_F,

IB_FIELD_LAST_ /* must be last */
};

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21 changes: 15 additions & 6 deletions external_libs/ibverbs/x86_64/include/infiniband/mlx5_api.h
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Expand Up @@ -55,17 +55,26 @@
#define MLX5DV_DM_TYPE_STEERING_SW_ICM MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM
#define MLX5DV_DM_TYPE_HEADER_MODIFY_SW_ICM MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM
#define MLX5DV_DM_TYPE_HEADER_MODIFY_PATTERN_SW_ICM MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_PATTERN_SW_ICM
#define MLX5DV_DM_TYPE_ENCAP_SW_ICM MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM
#define mlx5dv_devx_create_event_channel_flags mlx5_ib_uapi_devx_create_event_channel_flags
#define MLX5DV_DEVX_CREATE_EVENT_CHANNEL_FLAGS_OMIT_EV_DATA MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA
#define MLX5DV_DEVX_PORT_VPORT MLX5_IB_UAPI_QUERY_PORT_VPORT
#define MLX5DV_DEVX_PORT_VPORT_VHCA_ID MLX5_IB_UAPI_QUERY_PORT_VPORT_VHCA_ID
#define MLX5DV_DEVX_PORT_ESW_OWNER_VHCA_ID MLX5_IB_UAPI_QUERY_PORT_ESW_OWNER_VHCA_ID
#define MLX5DV_DEVX_PORT_VPORT_ICM_RX MLX5_IB_UAPI_QUERY_PORT_VPORT_ICM_RX
#define MLX5DV_DEVX_PORT_VPORT_ICM_TX MLX5_IB_UAPI_QUERY_PORT_VPORT_ICM_TX
#define MLX5DV_DEVX_PORT_MATCH_REG_C_0 MLX5_IB_UAPI_QUERY_PORT_MATCH_REG_C_0
#define MLX5DV_DEVX_PORT_VPORT MLX5_IB_UAPI_QUERY_PORT_VPORT_OLD
#define MLX5DV_DEVX_PORT_VPORT_VHCA_ID MLX5_IB_UAPI_QUERY_PORT_VPORT_VHCA_ID_OLD
#define MLX5DV_DEVX_PORT_ESW_OWNER_VHCA_ID MLX5_IB_UAPI_QUERY_PORT_ESW_OWNER_VHCA_ID_OLD
#define MLX5DV_DEVX_PORT_VPORT_ICM_RX MLX5_IB_UAPI_QUERY_PORT_VPORT_ICM_RX_OLD
#define MLX5DV_DEVX_PORT_VPORT_ICM_TX MLX5_IB_UAPI_QUERY_PORT_VPORT_ICM_TX_OLD
#define MLX5DV_DEVX_PORT_MATCH_REG_C_0 MLX5_IB_UAPI_QUERY_PORT_MATCH_REG_C_0_OLD
#define mlx5dv_devx_reg_32 mlx5_ib_uapi_devx_reg_32
#define MLX5DV_PP_ALLOC_FLAGS_DEDICATED_INDEX MLX5_IB_UAPI_PP_ALLOC_FLAGS_DEDICATED_INDEX
#define MLX5DV_UAR_ALLOC_TYPE_BF MLX5_IB_UAPI_UAR_ALLOC_TYPE_BF
#define MLX5DV_UAR_ALLOC_TYPE_NC MLX5_IB_UAPI_UAR_ALLOC_TYPE_NC
#define MLX5DV_QUERY_PORT_VPORT MLX5_IB_UAPI_QUERY_PORT_VPORT
#define MLX5DV_QUERY_PORT_VPORT_VHCA_ID MLX5_IB_UAPI_QUERY_PORT_VPORT_VHCA_ID
#define MLX5DV_QUERY_PORT_VPORT_STEERING_ICM_RX MLX5_IB_UAPI_QUERY_PORT_VPORT_STEERING_ICM_RX
#define MLX5DV_QUERY_PORT_VPORT_STEERING_ICM_TX MLX5_IB_UAPI_QUERY_PORT_VPORT_STEERING_ICM_TX
#define MLX5DV_QUERY_PORT_VPORT_REG_C0 MLX5_IB_UAPI_QUERY_PORT_VPORT_REG_C0
#define MLX5DV_QUERY_PORT_ESW_OWNER_VHCA_ID MLX5_IB_UAPI_QUERY_PORT_ESW_OWNER_VHCA_ID
#define mlx5dv_port mlx5_ib_uapi_query_port
#define mlx5dv_reg mlx5_ib_uapi_reg

#endif
38 changes: 32 additions & 6 deletions external_libs/ibverbs/x86_64/include/infiniband/mlx5_user_ioctl_verbs.h
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Expand Up @@ -60,12 +60,12 @@ struct mlx5_ib_uapi_devx_async_cmd_hdr {
};

enum mlx5_ib_uapi_devx_query_port_comp_mask {
MLX5_IB_UAPI_QUERY_PORT_VPORT = 1 << 0,
MLX5_IB_UAPI_QUERY_PORT_VPORT_VHCA_ID = 1 << 1,
MLX5_IB_UAPI_QUERY_PORT_ESW_OWNER_VHCA_ID = 1 << 2,
MLX5_IB_UAPI_QUERY_PORT_VPORT_ICM_RX = 1 << 3,
MLX5_IB_UAPI_QUERY_PORT_VPORT_ICM_TX = 1 << 4,
MLX5_IB_UAPI_QUERY_PORT_MATCH_REG_C_0 = 1 << 5,
MLX5_IB_UAPI_QUERY_PORT_VPORT_OLD = 1 << 0,
MLX5_IB_UAPI_QUERY_PORT_VPORT_VHCA_ID_OLD = 1 << 1,
MLX5_IB_UAPI_QUERY_PORT_ESW_OWNER_VHCA_ID_OLD = 1 << 2,
MLX5_IB_UAPI_QUERY_PORT_VPORT_ICM_RX_OLD = 1 << 3,
MLX5_IB_UAPI_QUERY_PORT_VPORT_ICM_TX_OLD = 1 << 4,
MLX5_IB_UAPI_QUERY_PORT_MATCH_REG_C_0_OLD = 1 << 5,
};

struct mlx5_ib_uapi_devx_reg_32 {
Expand All @@ -78,6 +78,7 @@ enum mlx5_ib_uapi_dm_type {
MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM,
MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM,
MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_PATTERN_SW_ICM,
MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM,
};

enum mlx5_ib_uapi_devx_create_event_channel_flags {
Expand All @@ -98,5 +99,30 @@ enum mlx5_ib_uapi_uar_alloc_type {
MLX5_IB_UAPI_UAR_ALLOC_TYPE_NC = 0x1,
};

enum mlx5_ib_uapi_query_port_flags {
MLX5_IB_UAPI_QUERY_PORT_VPORT = 1 << 0,
MLX5_IB_UAPI_QUERY_PORT_VPORT_VHCA_ID = 1 << 1,
MLX5_IB_UAPI_QUERY_PORT_VPORT_STEERING_ICM_RX = 1 << 2,
MLX5_IB_UAPI_QUERY_PORT_VPORT_STEERING_ICM_TX = 1 << 3,
MLX5_IB_UAPI_QUERY_PORT_VPORT_REG_C0 = 1 << 4,
MLX5_IB_UAPI_QUERY_PORT_ESW_OWNER_VHCA_ID = 1 << 5,
};

struct mlx5_ib_uapi_reg {
__u32 value;
__u32 mask;
};

struct mlx5_ib_uapi_query_port {
__aligned_u64 flags;
__u16 vport;
__u16 vport_vhca_id;
__u16 esw_owner_vhca_id;
__u16 rsvd0;
__aligned_u64 vport_steering_icm_rx;
__aligned_u64 vport_steering_icm_tx;
struct mlx5_ib_uapi_reg reg_c0;
};

#endif

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