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fmt some code
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@yfblock
yfblock committed Mar 4, 2024
1 parent 7652ab0 commit 90304c0
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Showing 32 changed files with 273 additions and 365 deletions.
4 changes: 2 additions & 2 deletions .cargo/config.toml
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Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
# 编译的目标平台
[build]
# target = 'riscv64imac-unknown-none-elf'
# target = 'x86_64-unknown-none'
target = 'aarch64-unknown-none-softfloat'
target = 'x86_64-unknown-none'
# target = 'aarch64-unknown-none-softfloat'

# This flags also can be set from every target.
rustflags = [
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26 changes: 12 additions & 14 deletions arch/src/aarch64/boot.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -52,20 +52,20 @@ unsafe fn switch_to_el1() {
}

unsafe fn init_mmu() {
MAIR_EL1.set(0x04 | (0xff << 8));
MAIR_EL1.set(0x44_ff_04);

// Enable TTBR0 and TTBR1 walks, page size = 4K, vaddr size = 48 bits, paddr size = 40 bits.
let tcr_flags0 = TCR_EL1::EPD0::EnableTTBR0Walks
+ TCR_EL1::TG0::KiB_4
+ TCR_EL1::SH0::None
+ TCR_EL1::ORGN0::NonCacheable
+ TCR_EL1::IRGN0::NonCacheable
+ TCR_EL1::SH0::Inner
+ TCR_EL1::ORGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+ TCR_EL1::IRGN0::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+ TCR_EL1::T0SZ.val(25);
let tcr_flags1 = TCR_EL1::EPD1::EnableTTBR1Walks
+ TCR_EL1::TG1::KiB_4
+ TCR_EL1::SH1::None
+ TCR_EL1::ORGN1::NonCacheable
+ TCR_EL1::IRGN1::NonCacheable
+ TCR_EL1::SH1::Inner
+ TCR_EL1::ORGN1::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+ TCR_EL1::IRGN1::WriteBack_ReadAlloc_WriteAlloc_Cacheable
+ TCR_EL1::T1SZ.val(25);
TCR_EL1.write(TCR_EL1::IPS::Bits_48 + tcr_flags0 + tcr_flags1);
barrier::isb(barrier::SY);
Expand All @@ -80,18 +80,16 @@ unsafe fn init_mmu() {
flush_tlb(None);

// Enable the MMU and turn on I-cache and D-cache
SCTLR_EL1.modify(SCTLR_EL1::M::Enable);
SCTLR_EL1.modify(SCTLR_EL1::M::Enable + SCTLR_EL1::C::Cacheable + SCTLR_EL1::I::Cacheable);
barrier::isb(barrier::SY);
}

unsafe fn init_boot_page_table() {
// Level 1 Entry for Huge Page
BOOT_PT_L1[0] = 0 | (
PTEFlags::VALID | PTEFlags::AF | PTEFlags::ATTR_INDX
).bits();
BOOT_PT_L1[1] = (0x4000_0000) | (
PTEFlags::VALID | PTEFlags::AF | PTEFlags::ATTR_INDX
).bits();
BOOT_PT_L1[0] =
0 | (PTEFlags::VALID | PTEFlags::AF | PTEFlags::ATTR_INDX | PTEFlags::NG).bits();
BOOT_PT_L1[1] = (0x4000_0000)
| (PTEFlags::VALID | PTEFlags::AF | PTEFlags::ATTR_INDX | PTEFlags::NG).bits();
}
/// The earliest entry point for the primary CPU.
#[naked]
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2 changes: 1 addition & 1 deletion arch/src/aarch64/context.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -97,7 +97,7 @@ impl ContextOps for Context {
#[inline]
fn args(&self) -> [usize; 6] {
[
self.regs.x30,
self.regs.x30,
self.regs.x1,
self.regs.x2,
self.regs.x3,
Expand Down
120 changes: 15 additions & 105 deletions arch/src/aarch64/interrupt.rs
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Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
use core::arch::{asm, global_asm};
use crate::Context;
use crate::{add_irq, shutdown, TrapType, VIRT_ADDR_START};
use core::arch::{asm, global_asm};

// 设置中断
pub fn init_interrupt() {
Expand All @@ -13,97 +13,11 @@ pub fn init_interrupt() {
// 内核中断回调
#[no_mangle]
fn kernel_callback(context: &mut Context) -> usize {
// let scause = scause::read();
// let stval = stval::read();
// debug!(
// "内核态中断发生: {:#x} {:?} stval {:#x} sepc: {:#x}",
// scause.bits(),
// scause.cause(),
// stval,
// context.sepc
// );
// let trap_type = match scause.cause() {
// // 中断异常
// Trap::Exception(Exception::Breakpoint) => {
// context.sepc += 2;
// TrapType::Breakpoint
// }
// Trap::Exception(Exception::LoadFault) => {
// if stval > VIRT_ADDR_START {
// panic!("kernel error: {:#x}", stval);
// }
// TrapType::Unknown
// }
// Trap::Exception(Exception::UserEnvCall) => {
// info!("info syscall: {}", context.x[17]);
// context.sepc += 4;
// TrapType::UserEnvCall
// }
// Trap::Exception(Exception::StorePageFault) => TrapType::StorePageFault(stval),
// Trap::Exception(Exception::InstructionPageFault) => TrapType::InstructionPageFault(stval),
// Trap::Exception(Exception::IllegalInstruction) => TrapType::IllegalInstruction(stval),
// _ => {
// // warn!("未知中断");
// error!(
// "内核态中断发生: {:#x} {:?} stval {:#x} sepc: {:#x}",
// scause.bits(),
// scause.cause(),
// stval,
// context.sepc
// );
// panic!("未知中断: {:#x?}", context);
// }
// };
// crate::api::ArchInterface::kernel_interrupt(context, trap_type);
// context as *const Context as usize
todo!()
todo!("kernel_callback")
}

pub fn trap_pre_handle(context: &mut Context) -> TrapType {
// let scause = scause::read();
// let stval = stval::read();
// debug!(
// "用户态中断发生: {:#x} {:?} stval {:#x} sepc: {:#x}",
// scause.bits(),
// scause.cause(),
// stval,
// context.sepc
// );
// match scause.cause() {
// // 中断异常
// Trap::Exception(Exception::Breakpoint) => {
// context.sepc += 2;
// TrapType::Breakpoint
// }
// Trap::Exception(Exception::LoadFault) => {
// shutdown();
// }
// // 时钟中断
// Trap::Interrupt(Interrupt::SupervisorTimer) => {
// timer::set_next_timeout();
// add_irq(5);
// TrapType::Time
// }
// Trap::Exception(Exception::StorePageFault) => TrapType::StorePageFault(stval),
// Trap::Exception(Exception::InstructionPageFault) => TrapType::InstructionPageFault(stval),
// Trap::Exception(Exception::IllegalInstruction) => {
// TrapType::IllegalInstruction(context.sepc)
// }
// Trap::Exception(Exception::UserEnvCall) => TrapType::UserEnvCall,
// Trap::Exception(Exception::LoadPageFault) => TrapType::LoadPageFault(stval),
// Trap::Interrupt(Interrupt::SupervisorExternal) => TrapType::SupervisorExternal,
// _ => {
// error!(
// "用户态中断发生: {:#x} {:?} stval {:#x} sepc: {:#x}",
// scause.bits(),
// scause.cause(),
// stval,
// context.sepc
// );
// TrapType::Unknown
// }
// }
todo!()
todo!("trap_pre_handle")
}

#[naked]
Expand All @@ -122,7 +36,7 @@ pub unsafe extern "C" fn kernelvec() {
// addi x1, sp, 34*8
// sd x1, 2*8(sp)
// .set n, 3
// .rept 29
// .rept 29
// SAVE_N %n
// .set n, n + 1
// .endr
Expand Down Expand Up @@ -150,7 +64,7 @@ pub unsafe extern "C" fn kernelvec() {
// ",
// options(noreturn)
// )
asm!("",options(noreturn))
asm!("", options(noreturn))
}

#[naked]
Expand All @@ -167,7 +81,7 @@ pub extern "C" fn user_restore(context: *mut Context) {
// // 下次发生中断必然会进入中断入口然后恢复这个上下文.
// // 仅保存 Callee-saved regs、gp、tp、ra.
// " addi sp, sp, -18*8

// sd sp, 8*1(sp)
// sd gp, 8*2(sp)
// sd tp, 8*3(sp)
Expand All @@ -185,15 +99,15 @@ pub extern "C" fn user_restore(context: *mut Context) {
// sd s11, 8*15(sp)
// sd a0, 8*16(sp)
// sd ra, 8*17(sp)

// la a1, {uservec}
// csrw stvec, a1
// ",
// // 将栈信息保存到用户栈.
// // a0 是传入的Context, 然后下面会再次恢复 sp 地址.
// " csrw sscratch, sp
// mv sp, a0

// LOAD t0, 32
// LOAD t1, 33
// .short 0x2452
Expand All @@ -212,16 +126,14 @@ pub extern "C" fn user_restore(context: *mut Context) {
// LOAD_N %n
// .set n, n + 1
// .endr",
// // 恢复 sp（又名 x2）这里最后恢复是为了上面可以正常使用 LOAD 宏
// // 恢复 sp（又名 x2）这里最后恢复是为了上面可以正常使用 LOAD 宏
// r" LOAD x2, 2
// sret
// ",
// uservec = sym uservec,
// options(noreturn))
// }
unsafe {
asm!("",options(noreturn))
}
unsafe { asm!("", options(noreturn)) }
}

#[naked]
Expand Down Expand Up @@ -266,7 +178,7 @@ pub unsafe extern "C" fn uservec() {
// sd a0, 4*8(tp)
// ",
// // 恢复内核上下文信息, 仅恢复 callee-saved 寄存器和 ra、gp、tp
// "
// "
// ld gp, 8*2(sp)
// ld tp, 8*3(sp)
// ld s0, 8*4(sp)
Expand All @@ -282,21 +194,19 @@ pub unsafe extern "C" fn uservec() {
// ld s10, 8*14(sp)
// ld s11, 8*15(sp)
// ld ra, 8*17(sp)

// ld sp, 8(sp)

// la a0, {kernelvec}
// csrw stvec, a0
// ",
// // 回收栈
// " addi sp, sp, 18*8
// ret
// ",
// ",
// kernelvec = sym kernelvec,
// options(noreturn));
asm!(
"",options(noreturn)
)
asm!("", options(noreturn))
}

#[allow(dead_code)]
Expand Down
32 changes: 16 additions & 16 deletions arch/src/aarch64/mod.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,7 @@ mod interrupt;
mod page_table;
mod pl011;
mod psci;
mod timer;
mod trap;

use alloc::vec::Vec;
Expand All @@ -15,6 +16,7 @@ pub use interrupt::*;
pub use page_table::*;
pub use pl011::{console_getchar, console_putchar};
pub use psci::system_off as shutdown;
pub use timer::get_time;

use crate::{clear_bss, ArchInterface};

Expand All @@ -36,18 +38,20 @@ pub fn rust_tmp_main(hart_id: usize, device_tree: usize) {

info!("There has {} CPU(s)", fdt.cpus().count());

fdt.memory().regions().for_each(|x: fdt::standard_nodes::MemoryRegion| {
info!(
"memory region {:#X} - {:#X}",
x.starting_address as usize,
x.starting_address as usize + x.size.unwrap()
);

ArchInterface::add_memory_region(
x.starting_address as usize | VIRT_ADDR_START,
(x.starting_address as usize + x.size.unwrap()) | VIRT_ADDR_START
);
});
fdt.memory()
.regions()
.for_each(|x: fdt::standard_nodes::MemoryRegion| {
info!(
"memory region {:#X} - {:#X}",
x.starting_address as usize,
x.starting_address as usize + x.size.unwrap()
);

ArchInterface::add_memory_region(
x.starting_address as usize | VIRT_ADDR_START,
(x.starting_address as usize + x.size.unwrap()) | VIRT_ADDR_START,
);
});
}

ArchInterface::prepare_drivers();
Expand All @@ -69,10 +73,6 @@ pub fn time_to_usec(_t: usize) -> usize {
todo!("time to usec")
}

pub fn get_time() -> usize {
todo!("get_time")
}

pub fn get_time_ms() -> usize {
todo!("get_time_ms")
}
Expand Down
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