Tags: COthello/iree
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Run clang-format on compiler/. (iree-org#9039)
Add support for converting LinalgExt ops to destination passing style. ( iree-org#9027) This is a step toward iree-org#9004
Add CPU microarchitecture to DeviceInfo (iree-org#9021)
Add CPU microarchitecture to DeviceInfo (iree-org#9021)
Add CPU microarchitecture to DeviceInfo (iree-org#9021)
Merge pull request iree-org#9006 from matthias-springer/bufferize_lin… …alg_ext Support bufferization of linalg_ext.fft and reverse
Deprecate SingleTilingExpert pipelin. (iree-org#9003) This pipeline is not used, and won't be used. We intend to vectorizes as many ops as possible. In this context, we will apply second level of tiling to avoid big vectors. The distribution level of tiling only tiles three loops. This means that some dims are not tiled, which might result in big tensors.
Enable checking stack allocation before converting to LLVM dialect. (i… …ree-org#8976) The flag is not removed because sometimes we might want to bypass the check.
Add FoldAffineMinInDistributedLoopsPass to CPU pipeline. (iree-org#8979)
Cleanup doc reference of iree/samples/ --> samples/ (iree-org#8975) Reflect iree-org#8958
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