liberty support for write_liberty

Signed-off-by: James Cherry <[email protected]>

include/sta/Liberty.hh

@@ -49,6 +49,7 @@ class StaState;
 typedef Set<Library*> LibrarySet;
 typedef Map<const char*, TableTemplate*, CharPtrLess> TableTemplateMap;
 typedef Map<const char*, BusDcl *, CharPtrLess> BusDclMap;
+typedef Vector<BusDcl *> BusDclSeq;
 typedef Map<const char*, ScaleFactors*, CharPtrLess> ScaleFactorsMap;
 typedef Map<const char*, Wireload*, CharPtrLess> WireloadMap;
 typedef Map<const char*, WireloadSelection*, CharPtrLess> WireloadSelectionMap;
@@ -129,6 +130,7 @@ public:
   void setDelayModelType(DelayModelType type);
   void addBusDcl(BusDcl *bus_dcl);
   BusDcl *findBusDcl(const char *name) const;
+  BusDclSeq busDcls() const;
   void addTableTemplate(TableTemplate *tbl_template,
 			TableTemplateType type);
   TableTemplate *findTableTemplate(const char *name,
@@ -642,6 +644,8 @@ public:
   LibertyLibrary *libertyLibrary() const { return liberty_cell_->libertyLibrary(); }
   LibertyPort *findLibertyMember(int index) const;
   LibertyPort *findLibertyBusBit(int index) const;
+  BusDcl *busDcl() const { return bus_dcl_; }
+  void setDirection(PortDirection *dir);
   void fanoutLoad(// Return values.
 		  float &fanout_load,
 		  bool &exists) const;
@@ -762,24 +766,25 @@ protected:
   LibertyPort(LibertyCell *cell,
 	      const char *name,
 	      bool is_bus,
-	      int from_index,
+	      BusDcl *bus_dcl,
+              int from_index,
 	      int to_index,
 	      bool is_bundle,
 	      ConcretePortSeq *members);
   virtual ~LibertyPort();
-  void setDirection(PortDirection *dir);
   void setMinPort(LibertyPort *min);
   void addScaledPort(OperatingConditions *op_cond,
 		     LibertyPort *scaled_port);
 
   LibertyCell *liberty_cell_;
+  BusDcl *bus_dcl_;
   FuncExpr *function_;
   FuncExpr *tristate_enable_;
   ScaledPortMap *scaled_ports_;
   RiseFallMinMax capacitance_;
-  MinMaxFloatValues slew_limit_; // inputs and outputs
+  MinMaxFloatValues slew_limit_;   // inputs and outputs
   MinMaxFloatValues cap_limit_;    // outputs
-  float fanout_load_; // inputs
+  float fanout_load_;              // inputs
   bool fanout_load_exists_;
   MinMaxFloatValues fanout_limit_; // outputs
   float min_period_;

include/sta/Network.hh

@@ -172,9 +172,9 @@ public:
 			   int index) const = 0;
   virtual int fromIndex(const Port *port) const = 0;
   virtual int toIndex(const Port *port) const = 0;
-  // Predicate to determine if subscript is within bus range.
-  //     (toIndex > fromIndex) && fromIndex <= subscript <= toIndex
-  //  || (fromIndex > toIndex) && fromIndex >= subscript >= toIndex
+  // Predicate to determine if index is within bus range.
+  //     (toIndex > fromIndex) && fromIndex <= index <= toIndex
+  //  || (fromIndex > toIndex) && fromIndex >= index >= toIndex
   bool busIndexInRange(const Port *port,
 		       int index);
   // Find Bundle/bus member by index.

liberty/Liberty.cc

@@ -178,6 +178,15 @@ LibertyLibrary::findBusDcl(const char *name) const
   return bus_dcls_.findKey(name);
 }
 
+BusDclSeq
+LibertyLibrary::busDcls() const
+{
+  BusDclSeq dcls;
+  for (auto name_dcl : bus_dcls_)
+    dcls.push_back(name_dcl.second);
+  return dcls;
+}
+
 void
 LibertyLibrary::addTableTemplate(TableTemplate *tbl_template,
 				 TableTemplateType type)
@@ -1844,12 +1853,14 @@ LibertyCellPortBitIterator::next()
 LibertyPort::LibertyPort(LibertyCell *cell,
 			 const char *name,
 			 bool is_bus,
-			 int from_index,
+			 BusDcl *bus_dcl,
+                         int from_index,
 			 int to_index,
 			 bool is_bundle,
 			 ConcretePortSeq *members) :
   ConcretePort(cell, name, is_bus, from_index, to_index, is_bundle, members),
   liberty_cell_(cell),
+  bus_dcl_(bus_dcl),
   function_(nullptr),
   tristate_enable_(nullptr),
   scaled_ports_(nullptr),

liberty/LibertyBuilder.cc

@@ -41,18 +41,20 @@ LibertyPort *
 LibertyBuilder::makePort(LibertyCell *cell,
 			 const char *name)
 {
-  LibertyPort *port = new LibertyPort(cell, name, false, -1, -1, false, nullptr);
+  LibertyPort *port = new LibertyPort(cell, name, false, nullptr, -1, -1, false, nullptr);
   cell->addPort(port);
   return port;
 }
 
 LibertyPort *
 LibertyBuilder::makeBusPort(LibertyCell *cell,
 			    const char *name,
-			    int from_index,
-			    int to_index)
+                            int from_index,
+			    int to_index,
+			    BusDcl *bus_dcl)
 {
-  LibertyPort *port = new LibertyPort(cell, name, true, from_index, to_index,
+  LibertyPort *port = new LibertyPort(cell, name, true, bus_dcl,
+                                      from_index, to_index,
 				      false, new ConcretePortSeq);
   cell->addPort(port);
   makeBusPortBits(cell->library(), cell, port, name, from_index, to_index);
@@ -99,7 +101,7 @@ LibertyBuilder::makePort(LibertyCell *cell,
 			 const char *bit_name,
 			 int bit_index)
 {
-  LibertyPort *port = new LibertyPort(cell, bit_name, false,
+  LibertyPort *port = new LibertyPort(cell, bit_name, false, nullptr,
 				      bit_index, bit_index, false, nullptr);
   return port;
 }
@@ -109,7 +111,7 @@ LibertyBuilder::makeBundlePort(LibertyCell *cell,
 			       const char *name,
 			       ConcretePortSeq *members)
 {
-  LibertyPort *port = new LibertyPort(cell, name, false, -1, -1, true, members);
+  LibertyPort *port = new LibertyPort(cell, name, false, nullptr, -1, -1, true, members);
   cell->addPort(port);
   return port;
 }

liberty/LibertyBuilder.hh

@@ -40,7 +40,8 @@ public:
   virtual LibertyPort *makeBusPort(LibertyCell *cell,
 				   const char *name,
 				   int from_index,
-				   int to_index);
+				   int to_index,
+                                   BusDcl *bus_dcl);
   virtual LibertyPort *makeBundlePort(LibertyCell *cell,
 				      const char *name,
 				      ConcretePortSeq *members);

liberty/LibertyReader.cc

@@ -2726,9 +2726,8 @@ LibertyReader::visitBusType(LibertyAttr *attr)
 	while (name_iter.hasNext()) {
 	  const char *name = name_iter.next();
 	  debugPrint(debug_, "liberty", 1, " bus %s", name);
-	  LibertyPort *port = builder_->makeBusPort(cell_, name,
-						    bus_dcl->from(),
-						    bus_dcl->to());
+	  LibertyPort *port = builder_->makeBusPort(cell_, name, bus_dcl->from(),
+                                                    bus_dcl->to(), bus_dcl);
 	  ports_->push_back(port);
 	}
       }
@@ -3360,14 +3359,14 @@ LibertyReader::beginSequential(LibertyGroup *group,
     LibertyPort *out_port_inv = nullptr;
     if (out_name) {
       if (has_size)
-	out_port = builder_->makeBusPort(cell_, out_name, size - 1, 0);
+	out_port = builder_->makeBusPort(cell_, out_name, size - 1, 0, nullptr);
       else
 	out_port = builder_->makePort(cell_,out_name);
       out_port->setDirection(PortDirection::internal());
     }
     if (out_inv_name) {
       if (has_size)
-	out_port_inv = builder_->makeBusPort(cell_, out_inv_name, size - 1, 0);
+	out_port_inv = builder_->makeBusPort(cell_, out_inv_name, size - 1, 0, nullptr);
       else
 	out_port_inv = builder_->makePort(cell_, out_inv_name);
       out_port_inv->setDirection(PortDirection::internal());

messages.txt

@@ -1,9 +1,9 @@
 0001 DmpCeff.cc:1595           cell %s delay model not supported on SPF parasitics by DMP delay calculator
-0002 Liberty.cc:728            cell %s/%s port %s not found in cell %s/%s.
-0003 Liberty.cc:751            cell %s/%s %s -> %s timing group %s not found in cell %s/%s.
-0004 Liberty.cc:1646           cell %s/%s %s -> %s latch enable %s_edge timing arc is inconsistent with %s -> %s setup_%s check.
-0005 Liberty.cc:1661           cell %s/%s %s -> %s latch enable %s_edge is inconsistent with latch group enable function positive sense.
-0006 Liberty.cc:1669           cell %s/%s %s -> %s latch enable %s_edge is inconsistent with latch group enable function negative sense.
+0002 Liberty.cc:735            cell %s/%s port %s not found in cell %s/%s.
+0003 Liberty.cc:758            cell %s/%s %s -> %s timing group %s not found in cell %s/%s.
+0004 Liberty.cc:1653           cell %s/%s %s -> %s latch enable %s_edge timing arc is inconsistent with %s -> %s setup_%s check.
+0005 Liberty.cc:1668           cell %s/%s %s -> %s latch enable %s_edge is inconsistent with latch group enable function positive sense.
+0006 Liberty.cc:1676           cell %s/%s %s -> %s latch enable %s_edge is inconsistent with latch group enable function negative sense.
 0007 LibertyExpr.cc:78         %s references unknown port %s.
 0008 ConcreteNetwork.cc:1855   cell type %s can not be linked.
 0009 CycleAccting.cc:87        No common period was found between clocks %s and %s.
@@ -96,65 +96,65 @@
 0101 LibertyReader.cc:2579     pin name is not a string.
 0102 LibertyReader.cc:2601     pin name is not a string.
 0103 LibertyReader.cc:2679     bus %s bus_type not found.
-0104 LibertyReader.cc:2736     bus_type %s not found.
-0105 LibertyReader.cc:2739     bus_type is not a string.
-0106 LibertyReader.cc:2757     bundle %s member not found.
-0107 LibertyReader.cc:2784     member is not a string.
-0108 LibertyReader.cc:2791     members attribute is missing values.
-0109 LibertyReader.cc:2834     unknown port direction.
-0110 LibertyReader.cc:3204     pulse_latch unknown pulse type.
-0111 LibertyReader.cc:3581     unknown timing_type %s.
-0112 LibertyReader.cc:3601     unknown timing_sense %s.
-0113 LibertyReader.cc:3641     mode value is not a string.
-0114 LibertyReader.cc:3644     missing mode value.
-0115 LibertyReader.cc:3647     mode name is not a string.
-0116 LibertyReader.cc:3650     mode missing values.
-0117 LibertyReader.cc:3653     mode missing mode name and value.
-0118 LibertyReader.cc:3728     unsupported model axis.
-0119 LibertyReader.cc:3756     unsupported model axis.
-0120 LibertyReader.cc:3786     unsupported model axis.
-0121 LibertyReader.cc:3822     unsupported model axis.
-0122 LibertyReader.cc:3874     table template %s not found.
-0123 LibertyReader.cc:3961     %s is missing values.
-0124 LibertyReader.cc:3986     %s is not a list of floats.
-0125 LibertyReader.cc:3988     table row has %u columns but axis has %d.
-0126 LibertyReader.cc:3998     table has %u rows but axis has %d.
-0127 LibertyReader.cc:4052     lut output is not a string.
-0128 LibertyReader.cc:4090     mode definition missing name.
-0129 LibertyReader.cc:4107     mode value missing name.
-0130 LibertyReader.cc:4121     when attribute inside table model.
-0131 LibertyReader.cc:4170     %s attribute is not a string.
-0132 LibertyReader.cc:4173     %s is not a simple attribute.
-0133 LibertyReader.cc:4196     %s is not a simple attribute.
-0134 LibertyReader.cc:4209     %s is not a simple attribute.
-0135 LibertyReader.cc:4233     %s value %s is not a float.
-0136 LibertyReader.cc:4262     %s missing values.
-0137 LibertyReader.cc:4266     %s missing values.
-0138 LibertyReader.cc:4269     %s is not a complex attribute.
-0139 LibertyReader.cc:4295     %s is not a float.
-0140 LibertyReader.cc:4314     %s is missing values.
-0141 LibertyReader.cc:4317     %s has more than one string.
-0142 LibertyReader.cc:4326     %s is missing values.
-0143 LibertyReader.cc:4351     %s attribute is not boolean.
-0144 LibertyReader.cc:4354     %s attribute is not boolean.
-0145 LibertyReader.cc:4357     %s is not a simple attribute.
-0146 LibertyReader.cc:4373     attribute %s value %s not recognized.
-0147 LibertyReader.cc:4403     unknown early/late value.
-0148 LibertyReader.cc:4627     OCV derate group named %s not found.
-0149 LibertyReader.cc:4643     ocv_derate missing name.
-0150 LibertyReader.cc:4696     unknown rise/fall.
-0151 LibertyReader.cc:4716     unknown derate type.
-0152 LibertyReader.cc:4747     unsupported model axis.
-0153 LibertyReader.cc:4780     unsupported model axis.
-0154 LibertyReader.cc:4813     unsupported model axis.
-0155 LibertyReader.cc:4886     unknown pg_type.
-0156 LibertyReader.cc:5263     port %s subscript out of range.
-0157 LibertyReader.cc:5267     port range %s of non-bus port %s.
-0158 LibertyReader.cc:5281     port %s not found.
-0159 LibertyReader.cc:5351     port %s not found.
+0104 LibertyReader.cc:2735     bus_type %s not found.
+0105 LibertyReader.cc:2738     bus_type is not a string.
+0106 LibertyReader.cc:2756     bundle %s member not found.
+0107 LibertyReader.cc:2783     member is not a string.
+0108 LibertyReader.cc:2790     members attribute is missing values.
+0109 LibertyReader.cc:2833     unknown port direction.
+0110 LibertyReader.cc:3203     pulse_latch unknown pulse type.
+0111 LibertyReader.cc:3580     unknown timing_type %s.
+0112 LibertyReader.cc:3600     unknown timing_sense %s.
+0113 LibertyReader.cc:3640     mode value is not a string.
+0114 LibertyReader.cc:3643     missing mode value.
+0115 LibertyReader.cc:3646     mode name is not a string.
+0116 LibertyReader.cc:3649     mode missing values.
+0117 LibertyReader.cc:3652     mode missing mode name and value.
+0118 LibertyReader.cc:3727     unsupported model axis.
+0119 LibertyReader.cc:3755     unsupported model axis.
+0120 LibertyReader.cc:3785     unsupported model axis.
+0121 LibertyReader.cc:3821     unsupported model axis.
+0122 LibertyReader.cc:3873     table template %s not found.
+0123 LibertyReader.cc:3960     %s is missing values.
+0124 LibertyReader.cc:3985     %s is not a list of floats.
+0125 LibertyReader.cc:3987     table row has %u columns but axis has %d.
+0126 LibertyReader.cc:3997     table has %u rows but axis has %d.
+0127 LibertyReader.cc:4051     lut output is not a string.
+0128 LibertyReader.cc:4089     mode definition missing name.
+0129 LibertyReader.cc:4106     mode value missing name.
+0130 LibertyReader.cc:4120     when attribute inside table model.
+0131 LibertyReader.cc:4169     %s attribute is not a string.
+0132 LibertyReader.cc:4172     %s is not a simple attribute.
+0133 LibertyReader.cc:4195     %s is not a simple attribute.
+0134 LibertyReader.cc:4208     %s is not a simple attribute.
+0135 LibertyReader.cc:4232     %s value %s is not a float.
+0136 LibertyReader.cc:4261     %s missing values.
+0137 LibertyReader.cc:4265     %s missing values.
+0138 LibertyReader.cc:4268     %s is not a complex attribute.
+0139 LibertyReader.cc:4294     %s is not a float.
+0140 LibertyReader.cc:4313     %s is missing values.
+0141 LibertyReader.cc:4316     %s has more than one string.
+0142 LibertyReader.cc:4325     %s is missing values.
+0143 LibertyReader.cc:4350     %s attribute is not boolean.
+0144 LibertyReader.cc:4353     %s attribute is not boolean.
+0145 LibertyReader.cc:4356     %s is not a simple attribute.
+0146 LibertyReader.cc:4372     attribute %s value %s not recognized.
+0147 LibertyReader.cc:4402     unknown early/late value.
+0148 LibertyReader.cc:4626     OCV derate group named %s not found.
+0149 LibertyReader.cc:4642     ocv_derate missing name.
+0150 LibertyReader.cc:4695     unknown rise/fall.
+0151 LibertyReader.cc:4715     unknown derate type.
+0152 LibertyReader.cc:4746     unsupported model axis.
+0153 LibertyReader.cc:4779     unsupported model axis.
+0154 LibertyReader.cc:4812     unsupported model axis.
+0155 LibertyReader.cc:4885     unknown pg_type.
+0156 LibertyReader.cc:5262     port %s subscript out of range.
+0157 LibertyReader.cc:5266     port range %s of non-bus port %s.
+0158 LibertyReader.cc:5280     port %s not found.
+0159 LibertyReader.cc:5350     port %s not found.
 0160 LibertyReader.cc:981      default_max_transition is 0.0.
-0161 LibertyReader.cc:3092     max_transition is 0.0.
-0162 LibertyReader.cc:4193     %s attribute is not an integer.
+0161 LibertyReader.cc:3091     max_transition is 0.0.
+0162 LibertyReader.cc:4192     %s attribute is not an integer.
 0163 LibertyReader.cc:1086     default_fanout_load is 0.0.
 0179 SpefReader.cc:728         %s.
 0190 VerilogReader.cc:1728     %s is not a verilog module.

verilog/Verilog.tcl

@@ -20,7 +20,7 @@ namespace eval sta {
 define_cmd_args "read_verilog" {filename}
 
 proc_redirect read_verilog {
-  read_verilog_cmd $args
+  read_verilog_cmd [file nativename [lindex $args 0]]
 }
 
 define_cmd_args "write_verilog" {[-sort] [-include_pwr_gnd]\