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add support in archdetect for detecting A64FX #608
add support in archdetect for detecting A64FX #608
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…io_archdetect-a64fx
…' field is not available
bot: build repo:eessi.io-2023.06-software arch:aarch64/neoverse_n1 |
Updates by the bot instance
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Updates by the bot instance
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New job on instance
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"aarch64/neoverse_v1" "ARM" "asimddp svei8mm" | ||
"aarch64/neoverse_v1" "" "asimddp svei8mm" # AWS Graviton3 | ||
"aarch64/neoverse_v1" "0x41" "asimddp svei8mm" # AWS Graviton3 |
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What happens when there are multiple vendors implementing the instruction set, like with Gravition/Grace for "aarch64/neoverse_v2"
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I guess this is only necessary when there is a doubt about what the match is
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https://gpages.juszkiewicz.com.pl/arm-socs-table/arm-socs.html only lists Graviton 3 as CPU supporting Neoverse V1, so that makes it very unlikely in practice we'll run into something that's detected as Neoverse V1 but isn't a Graviton 3 (at least today).
For neoverse_v2
with Graviton 4 vs Grace, there's a more complex situation though, because Graviton 4 supports CPU instructions like paca
, pacg
, rng
which Grace doesn't, and the other way around (like sm3
, sm4
, svesm4
).
It gets even more interesting when Google Axion is taken into account, since that doesn't support sbss
, which the other two do...
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Nevermind, it is right there in the file, just means we need to add each supported CPU explicitly. That seems like a bit of a pity, doesn't it make the archdetect selection very conservative if it encounters a CPU it hasn't seen before? It doesn't matter if the CPU has all the required features
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For
neoverse_v2
with Graviton 4 vs Grace, there's a more complex situation though, because Graviton 4 supports CPU instructions likepaca
,pacg
,rng
which Grace doesn't, and the other way around (likesm3
,sm4
,svesm4
). It gets even more interesting when Google Axion is taken into account, since that doesn't supportsbss
, which the other two do...
Isn't that quite a big problem? Can we disable some instructions? I guess compilers would be caught by surprise...
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This data is probably pretty useful for us: https://github.com/hrw/arm-socs-table/tree/main/cpuinfo-data
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I wonder if we shouldn't have a much more considered set of CPU features that reflect the CPU where the software was built for the target and then match that? This would do a much better job of future matching CPUs. Is it really the case that CPU features alone are not enough to distinguish A64FX from Neoverse_N1?
Not going to hold this PR back for that discussion, will open an issue.
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I'm also wondering if we can instruct the compiler to not emit particular instructions even if they're supported.
My gut says that should be possible, but I'm not sure it actually is...
Let's follow up on that in a dedicated issue though => #845
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For A64FX vs Neoverse N1/V1, see the /proc/cpuinfo
dumps we have under tests/archdetect/
.
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Sure did, #841 |
Yeah, I also just noticed that. I guess it's because of #841 (comment). |
The tarball has been approved and ingested. |
PR merged! Moved |
PR merged! Moved |
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