Code cleanup and formatting

Eveheeero · Mar 28, 2023 · 00bd22a · 00bd22a
2 parents db034e5 + 796d0c0
commit 00bd22a
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Showing 9 changed files with 3 additions and 252 deletions.
diff --git a/.gitignore b/.gitignore
@@ -23,6 +23,7 @@ samples/sample
 _sample*.txt
 tmp
 MANIFEST
+.vscode
 
 bindings/python/dist/
 bindings/python/src/

diff --git a/.vscode/c_cpp_properties.json b/.vscode/c_cpp_properties.json
diff --git a/.vscode/launch.json b/.vscode/launch.json
diff --git a/.vscode/settings.json b/.vscode/settings.json
diff --git a/bindings/python/Makefile b/bindings/python/Makefile
@@ -5,7 +5,7 @@ OBJDIR = ./build
 else
 OBJDIR = $(abspath $(BUILDDIR))/obj/bindings/python
 endif
-
+ 
 .PHONY: gen_const install install3 clean
 
 gen_const:

diff --git a/llvm/include/llvm/MC/LaneBitmask.h b/llvm/include/llvm/MC/LaneBitmask.h
diff --git a/llvm/include/llvm/MC/MCAsmBackend.h b/llvm/include/llvm/MC/MCAsmBackend.h
@@ -89,17 +89,6 @@ class MCAsmBackend {
   /// appropriate.
   virtual void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
                           uint64_t Value, bool IsPCRel, unsigned int &KsError) const = 0;
-
-/*   /// Apply the \p Value for given \p Fixup into the provided data fragment, at
-  /// the offset specified by the fixup and following the fixup kind as
-  /// appropriate. Errors (such as an out of range fixup value) should be
-  /// reported via \p Ctx.
-  /// The  \p STI is present only for fragments of type MCRelaxableFragment and
-  /// MCDataFragment with hasInstructions() == true.
-  virtual void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
-                          const MCValue &Target, MutableArrayRef<char> Data,
-                          uint64_t Value, bool IsResolved,
-                          const MCSubtargetInfo *STI, unsigned int &KsError) const = 0; */
 
   /// @}
 

diff --git a/llvm/include/llvm/Support/ELF.h b/llvm/include/llvm/Support/ELF.h
@@ -310,7 +310,7 @@ enum {
   EM_NORC          = 218, // Nanoradio Optimized RISC
   EM_CSR_KALIMBA   = 219, // CSR Kalimba architecture family
   EM_AMDGPU        = 224, // AMD GPU architecture
-  EM_RISCV = 243,         // RISC-V
+  EM_RISCV         = 243, // RISC-V
 
   // A request has been made to the maintainer of the official registry for
   // such numbers for an official value for WebAssembly. As soon as one is

diff --git a/llvm/lib/Target/RISCV/RISCVGenRegisterInfo.inc b/llvm/lib/Target/RISCV/RISCVGenRegisterInfo.inc
@@ -5,7 +5,6 @@
 |* Automatically generated file, do not edit!                                 *|
 |*                                                                            *|
 \*===----------------------------------------------------------------------===*/
-#include "llvm/MC/LaneBitmask.h"
 
 #ifdef GET_REGINFO_ENUM
 #undef GET_REGINFO_ENUM
-Original file line number
+Diff line change
@@ Expand Up / @@ -5,7 +5,7 @@ OBJDIR = ./build @@
     else
     OBJDIR = $(abspath $(BUILDDIR))/obj/bindings/python
     endif
     .PHONY: gen_const install install3 clean
     gen_const:
@@ Expand Down @@