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All my Digital Designs, Verilog scripts, XDC constraints and drivers for Litefury FPGA based on the Xilinx Artix 7 Chip

Verilog 1 Updated Feb 5, 2025

Public repository for Litefury & Nitefury

SystemVerilog 279 72 Updated Jun 21, 2024

Xilinx QDMA IP Drivers

C 604 432 Updated Jan 17, 2025

Some info about the USB-PD triggers I've been testing

52 3 Updated Oct 23, 2020

Opensource DDR3 Controller

Verilog 255 39 Updated Jan 30, 2025

OpenCAPI Acceleration Framework: develop an accelerator with OpenCAPI technology

Verilog 67 45 Updated Aug 29, 2024

lists of most popular repositories for most favoured programming languages (according to StackOverflow)

Python 1,974 187 Updated Jul 29, 2024

The RIFFA development repository

Verilog 796 318 Updated Jun 11, 2024

SoftMC is an experimental FPGA-based memory controller design that can be used to develop tests for DDR3 SODIMMs using a C++ based API. The design, the interface, and its capabilities and limitatio…

Verilog 130 27 Updated Aug 24, 2023

T2SG *.bin file for a ESP8266 WEMOS D1 mini. Its purpose is to read the total power from a Shelly 3EM and send it via UART to Trucki's RS485 interface pcb for SUN GTIL2-1/2000 MPPT inverter

116 8 Updated May 24, 2024