Lists (2)
Sort Name ascending (A-Z)
Stars
Verilog AXI components for FPGA implementation
Open-source high-performance RISC-V processor
Final Project of Software_Hardware_Co-Design_24Spring. FPGA-based RISC-V+ Convolutional Acceleration Unit.
Convolutional accelerator kernel, target ASIC & FPGA
Hardware and software collaborative design labs and project in the spring semester of 2024
We run the E203 based on Genesys2 ,and add some additional IP to develop a powerful system
北京大学软件与微电子学院硕士生课程知识点、作业等汇总【Summary of Knowledge Points and Assignments of Peking University Integrated Circuit Major Courses】
A Library for Differentiable Logic Gate Networks
提取微信聊天记录,将其导出成HTML、Word、Excel文档永久保存,对聊天记录进行分析生成年度聊天报告,用聊天数据训练专属于个人的AI聊天助手
A list of ICs and IPs for AI, Machine Learning and Deep Learning.
Final Project - Fa23 (a “SPI_MS Chip” that allows full-duplex, synchronous, serial communication between the Chip and peripherals.)
Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2
北京大学数字集成电路设计课程作业—FPGA设计【Assignment of digital integrated circuit design course of Peking University】