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MyTinySTL Public
Forked from Alinshans/MyTinySTLAchieve a tiny STL in C++11
C++ Other UpdatedOct 10, 2023 -
axi Public
Forked from pulp-platform/axiAXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
SystemVerilog Other UpdatedSep 17, 2023 -
folly Public
Forked from facebook/follyAn open-source C++ library developed and used at Facebook.
C++ Apache License 2.0 UpdatedSep 10, 2023 -
CGraph Public template
Forked from ChunelFeng/CGraph【A simple C++ DAG framework】 一个简单好用的、无三方依赖的、跨平台的、收录于awesome-cpp的、基于流图的、支持同步异步的并行计算框架。欢迎star & fork
C++ MIT License UpdatedSep 8, 2023 -
scr1 Public
Forked from syntacore/scr1SCR1 is a high-quality open-source RISC-V MCU core in Verilog
SystemVerilog Other UpdatedJul 24, 2023 -
workspace Public
Forked from CodingHanYa/workspaceworkspace是基于C++11的轻量级异步执行框架,支持:通用任务异步并发执行、优先级任务调度、自适应动态线程池、高效静态线程池、异常处理机制等。
C++ Apache License 2.0 UpdatedJul 22, 2023 -
FPGA-MPEG2-encoder Public
Forked from WangXuan95/FPGA-MPEG2-encoderFPGA-based high performance MPEG2 encoder for video compression. 基于 FPGA 的高性能 MPEG2 视频编码器,可实现视频压缩。
Verilog UpdatedJun 8, 2023 -
Flute Public
Forked from bluespec/FluteRISC-V CPU, simple 5-stage in-order pipeline, for low-end applications needing MMUs and some performance
Bluespec Apache License 2.0 UpdatedMay 24, 2023 -
openISP Public
Forked from cruxopen/openISPImage Signal Processor
Python MIT License UpdatedFeb 1, 2023 -
USTC-RVSoC Public
Forked from WangXuan95/USTC-RVSoCAn FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V CPU+SoC,包含一个简单且可扩展的外设总线。
SystemVerilog UpdatedNov 26, 2022 -
NyuziProcessor Public
Forked from jbush001/NyuziProcessorGPGPU microprocessor architecture
C Apache License 2.0 UpdatedSep 11, 2022 -
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ImageProcessing-Python Public
Forked from eastmountyxz/ImageProcessing-Python该资源为作者在CSDN的撰写Python图像处理文章的支撑,主要是Python实现图像处理、图像识别、图像分类等算法代码实现,希望该资源对您有所帮助,一起加油。
Jupyter Notebook UpdatedApr 16, 2022 -
DSP-RTL-Lib Public
Forked from ahmedshahein/DSP-RTL-LibRTL Verilog library for various DSP modules
Verilog BSD 2-Clause "Simplified" License UpdatedFeb 17, 2022 -
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FPGA-Video-Processing Public
Forked from georgeyhere/FPGA-Video-ProcessingRealtime video processing w/ Gaussian + Sobel Filters targeting Artix-7 FPGA
SystemVerilog UpdatedNov 8, 2021 -
BM3D_py Public
Forked from Ryanshuai/BM3D_pypure Python implement of BM3D
Python UpdatedSep 24, 2021 -
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tensorflow-handbook Public
Forked from snowkylin/tensorflow-handbook简单粗暴 TensorFlow 2 | A Concise Handbook of TensorFlow 2 | 一本简明的 TensorFlow 2 入门指导教程
Jupyter Notebook UpdatedOct 12, 2020 -
L-ink_Card Public
Forked from peng-zhihui/L-ink_CardSmart NFC & ink-Display Card
C GNU General Public License v3.0 UpdatedJun 20, 2020 -
densefuse-pytorch Public
Forked from hli1221/densefuse-pytorchDenseFuse (TIP2019) - Pytorch 0.4.1
Python UpdatedFeb 29, 2020 -
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FPGA_rtime_HDR_video Public
Forked from sh-vlad/FPGA_rtime_HDR_videoWe are aimed at making a device for shooting real-time HDR (High Dynamic Range) video using FPGA.
Verilog Apache License 2.0 UpdatedMay 18, 2019 -
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FPGA-Imaging-Library Public
Forked from dtysky/FPGA-Imaging-LibraryAn open source library for image processing on FPGA.
Verilog GNU Lesser General Public License v2.1 UpdatedJun 16, 2015 -
gplgpu Public
Forked from asicguy/gplgpuGPL v3 2D/3D graphics engine in verilog
VHDL GNU General Public License v3.0 UpdatedAug 31, 2014 -