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[lint] Minor fixes
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Signed-off-by: Michael Schaffner <[email protected]>
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msfschaffner committed Aug 5, 2022
1 parent 0e5bedf commit 4975c7f
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Showing 2 changed files with 10 additions and 3 deletions.
8 changes: 5 additions & 3 deletions rtl/ibex_core.sv
Original file line number Diff line number Diff line change
Expand Up @@ -1048,14 +1048,16 @@ module ibex_core import ibex_pkg::*; #(
`ASSERT_KNOWN_IF(IbexCsrWdataIntKnown, cs_registers_i.csr_wdata_int, csr_op_en)

if (PMPEnable) begin : g_pmp
logic [31:0] pc_if_inc;
logic [33:0] pmp_req_addr [PMPNumChan];
pmp_req_e pmp_req_type [PMPNumChan];
priv_lvl_e pmp_priv_lvl [PMPNumChan];

assign pc_if_inc = pc_if + 32'd2;
assign pmp_req_addr[PMP_I] = {2'b00, pc_if};
assign pmp_req_type[PMP_I] = PMP_ACC_EXEC;
assign pmp_priv_lvl[PMP_I] = priv_mode_id;
assign pmp_req_addr[PMP_I2] = {2'b00, (pc_if + 32'd2)};
assign pmp_req_addr[PMP_I2] = {2'b00, pc_if_inc};
assign pmp_req_type[PMP_I2] = PMP_ACC_EXEC;
assign pmp_priv_lvl[PMP_I2] = priv_mode_id;
assign pmp_req_addr[PMP_D] = {2'b00, data_addr_o[31:0]};
Expand Down Expand Up @@ -1418,8 +1420,8 @@ module ibex_core import ibex_pkg::*; #(
rvfi_ext_stage_nmi[i+1] <= rvfi_ext_stage_nmi[i];
rvfi_ext_stage_debug_req[i+1] <= rvfi_ext_stage_debug_req[i];
rvfi_ext_stage_mcycle[i] <= cs_registers_i.mcycle_counter_i.counter_val_o;
// This is done this way because SystemVerilog does not support looping through gen_cntrs[k]
// within a for loop.
// This is done this way because SystemVerilog does not support looping through
// gen_cntrs[k] within a for loop.
for (int k=0; k < 10; k++) begin
rvfi_ext_stage_mhpmcounters[i][k] <= cs_registers_i.mhpmcounter[k+3][31:0];
rvfi_ext_stage_mhpmcountersh[i][k] <= cs_registers_i.mhpmcounter[k+3][63:32];
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5 changes: 5 additions & 0 deletions rtl/ibex_pmp.sv
Original file line number Diff line number Diff line change
Expand Up @@ -220,6 +220,11 @@ module ibex_pmp #(
pmp_req_type_i[c],
priv_mode_i[c],
region_basic_perm_check[c][r]);

// Address bits below PMP granularity (which starts at 4 byte) are deliberately unused.
logic unused_sigs;
assign unused_sigs = ^{region_start_addr[r][PMPGranularity+2-1:0],
pmp_req_addr_i[c][PMPGranularity+2-1:0]};
end

// Once the permission checks of the regions are done, decide if the access is
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