BTech, Electrical and Electronics Engineering, VIT'24 | MS, Computer Engineering (Electrical Engineering), ASU'26 | FPGA, VLSI and Embedded Systems
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Direct-Digital-Synthesis-PRL
Direct-Digital-Synthesis-PRL PublicContains the codes written for a DDS system implemented on an FPGA, as a final year project trainee at PRL Ahmedabad.
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Deep-Learning-EEE598
Deep-Learning-EEE598 PublicAn archive of all the codes used in the course Deep Learning: Foundations and Applications EEE598 at Arizona State University, during my Master's of Computer Engineering
Python
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