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GeorgeWeb

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Commits on Sep 26, 2024

• [SYCL][doc] Fix a spelling mistake in any_device_has_v aspect trait (intel#15503)

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Commits on Sep 23, 2024

• [SYCL][Driver] Fix regression that enabled Cuda-mode in cc1 and defined __CUDA_ARCH__ (intel#15441)

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Commits on Sep 13, 2024

• [SYCL] Fix launch config in the max_num_work_groups e2e test (intel#15359)

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Commits on Sep 11, 2024

• Update docs regarding the kernel-fusion extension (intel#15356)

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• [SYCL] Implement max_num_work_groups from the launch queries extension (intel#14333)

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Commits on Sep 4, 2024

• [SYCL] Limit allocation size in atomic_memory_order_seq_cst test to a safe maximum size (intel#14195)

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Commits on Aug 30, 2024

• [CLC][AMDGPU] Fix barrier calls in collective group algorithms to generate memory fences (intel#12873)

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Commits on Jun 13, 2024

• [CLC][AMDGPU] Refactor fence helper to process order semantic explicitly (intel#12872)

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Commits on Jun 10, 2024

• [SYCL] Add sm90a Cuda target architecture support (intel#14075)

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Commits on Jun 3, 2024

• [SYCL][CUDA] Improve kernel launch error handling for out-of-registers (intel#12604)

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Commits on May 27, 2024

• [clang][FE] Remove duplicate preprocessor defines of HIP memory scope (intel#12871)

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Commits on May 13, 2024

• [SYCL][Driver] Refactor device config parsing to better match HIP and CUDA targets (intel#13617)

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Commits on Apr 10, 2024

• [HIP][UR] Fix memory type detection in allocation info queries and USM copy2D (intel#13059)

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Commits on Mar 22, 2024

• [clang][FE][Cuda] Fix a sm90a cuda arch define check in TargetInfo (intel#12885)

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Commits on Feb 5, 2024

• [SYCL][HIP] Add coarse-grained memory advice for HIP on AMD (intel#12394)

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Commits on Jan 9, 2024

• [SYCL][HIP] Initial HIP mem_advise implementation. (intel#10697)

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Commits on Nov 1, 2023

• [SYCL][Driver] Fix -fgpu-rdc option for CUDA (intel#11420)

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Commits on Sep 4, 2023

• [SYCL][HIP] Add managed memory USM checks for HIP prefetch (intel#10761)

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Commits on Aug 30, 2023

• [NFC][AMDGPU] Guard the custom fixups kind array from invalid access

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Commits on Aug 23, 2023

• [SYCL][Driver] Fix fno-gpu-rdc SYCL libraries linking not using opaque pointers (intel#10418)

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Commits on Aug 3, 2023

• [SYCL] Change PI_MEM_ADVICE_* values to bitwise flags (intel#10641)

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Commits on Jul 11, 2023

• Fix shr/and pair replace with bfe

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Commits on Jun 6, 2023

• [SYCL][CUDA] Add fix for local size calculation regression (intel#9736)

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Commits on May 12, 2023

• [SYCL][CUDA][HIP] Device info query for maximum registers per block and targetted exception on out-of-registers for CUDA. (intel#9106)

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Commits on Apr 27, 2023

• [SYCL][CUDA] Map maxrregcount build option to a Cuda JIT option for use with ptxjit (intel#9139)

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Commits on Mar 24, 2023

• [SYCL][CUDA] Re-enable subgroup shuffle_fp64 test for CUDA (intel/llvm-test-suite#1663)

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Commits on Mar 15, 2023

• [SYCL] Fix forward declarations to SubgroupShuffleUp/Down overloads (intel#8614)

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Commits on Feb 21, 2023

• [SYCL][CUDA] Define __SYCL_CUDA_ARCH__ instead of __CUDA_ARCH__ for SYCL (intel#8257)

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