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mediatek: init for tenbay_wr3000k-gsw-emmc-nor
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target/linux/mediatek/dts/mt7981b-tenbay-wr3000k-gsw-emmc-nor.dts
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/dts-v1/; | ||
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#include "mt7981.dtsi" | ||
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/ { | ||
model = "Tenbay WR3000K gsw emmc nor"; | ||
compatible = "tenbay,wr3000k-gsw-emmc-nor", "mediatek,mt7981"; | ||
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aliases { | ||
ethernet0 = &gmac0; | ||
ethernet1 = &gmac1; | ||
serial0 = &uart0; | ||
}; | ||
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chosen { | ||
stdout-path = "serial0:115200n8"; | ||
}; | ||
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gpio-keys { | ||
compatible = "gpio-keys"; | ||
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reset { | ||
label = "reset"; | ||
linux,code = <KEY_RESTART>; | ||
gpios = <&pio 1 GPIO_ACTIVE_LOW>; | ||
}; | ||
}; | ||
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reg_3p3v: regulator-3p3v { | ||
compatible = "regulator-fixed"; | ||
regulator-name = "fixed-3.3V"; | ||
regulator-min-microvolt = <3300000>; | ||
regulator-max-microvolt = <3300000>; | ||
regulator-boot-on; | ||
regulator-always-on; | ||
}; | ||
}; | ||
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&uart0 { | ||
status = "okay"; | ||
}; | ||
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&watchdog { | ||
status = "okay"; | ||
}; | ||
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ð { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&mdio_pins>; | ||
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status = "okay"; | ||
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gmac0: mac@0 { | ||
compatible = "mediatek,eth-mac"; | ||
reg = <0>; | ||
phy-mode = "2500base-x"; | ||
nvmem-cells = <&macaddr_2a>; | ||
nvmem-cell-names = "mac-address"; | ||
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fixed-link { | ||
speed = <2500>; | ||
full-duplex; | ||
pause; | ||
}; | ||
}; | ||
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gmac1: mac@1 { | ||
compatible = "mediatek,eth-mac"; | ||
reg = <1>; | ||
phy-mode = "gmii"; | ||
phy-handle = <&int_gbe_phy>; | ||
nvmem-cells = <&macaddr_24>; | ||
nvmem-cell-names = "mac-address"; | ||
}; | ||
}; | ||
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&mdio_bus { | ||
switch0: switch@0 { | ||
compatible = "mediatek,mt7531"; | ||
reg = <31>; | ||
dsa,member = <0 0>; | ||
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; | ||
interrupt-controller; | ||
#interrupt-cells = <1>; | ||
interrupt-parent = <&pio>; | ||
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; | ||
}; | ||
}; | ||
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&switch0 { | ||
ports { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
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port@0 { | ||
reg = <0>; | ||
label = "lan1"; | ||
}; | ||
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port@1 { | ||
reg = <1>; | ||
label = "lan2"; | ||
}; | ||
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port@2 { | ||
reg = <2>; | ||
label = "lan3"; | ||
}; | ||
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port@6 { | ||
reg = <6>; | ||
ethernet = <&gmac0>; | ||
phy-mode = "2500base-x"; | ||
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fixed-link { | ||
speed = <2500>; | ||
full-duplex; | ||
pause; | ||
}; | ||
}; | ||
}; | ||
}; | ||
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&mmc0 { | ||
pinctrl-names = "default", "state_uhs"; | ||
pinctrl-0 = <&mmc0_pins_default>; | ||
pinctrl-1 = <&mmc0_pins_uhs>; | ||
bus-width = <8>; | ||
max-frequency = <52000000>; | ||
cap-mmc-highspeed; | ||
vmmc-supply = <®_3p3v>; | ||
non-removable; | ||
status = "okay"; | ||
}; | ||
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&spi2 { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&spi2_flash_pins>; | ||
status = "okay"; | ||
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spi_nor@0 { | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
compatible = "jedec,spi-nor"; | ||
reg = <0>; | ||
spi-max-frequency = <52000000>; | ||
spi-tx-buswidth = <4>; | ||
spi-rx-buswidth = <4>; | ||
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partitions { | ||
compatible = "fixed-partitions"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
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partition@00000 { | ||
label = "BL2"; | ||
reg = <0x00000 0x0040000>; | ||
}; | ||
partition@40000 { | ||
label = "u-boot-env"; | ||
reg = <0x40000 0x0010000>; | ||
}; | ||
partition@50000 { | ||
label = "Product"; | ||
reg = <0x50000 0x0020000>; | ||
}; | ||
factory: partition@70000 { | ||
label = "Factory"; | ||
reg = <0x70000 0x0090000>; | ||
}; | ||
partition@100000 { | ||
label = "FIP"; | ||
reg = <0x100000 0x00c0000>; | ||
}; | ||
partition@1c0000 { | ||
label = "firmware"; | ||
reg = <0x1c0000 0xdc0000>; | ||
}; | ||
}; | ||
}; | ||
}; | ||
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&pio { | ||
spi2_flash_pins: spi2-pins { | ||
mux { | ||
function = "spi"; | ||
groups = "spi2", "spi2_wp_hold"; | ||
}; | ||
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conf-pu { | ||
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP"; | ||
drive-strength = <MTK_DRIVE_8mA>; | ||
bias-pull-up = <MTK_PUPD_SET_R1R0_11>; | ||
}; | ||
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conf-pd { | ||
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO"; | ||
drive-strength = <MTK_DRIVE_8mA>; | ||
bias-pull-down = <MTK_PUPD_SET_R1R0_11>; | ||
}; | ||
}; | ||
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mmc0_pins_default: mmc0-pins-default { | ||
mux { | ||
function = "flash"; | ||
groups = "emmc_45"; | ||
}; | ||
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conf-cmd-dat { | ||
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO", | ||
"SPI0_CS", "SPI0_HOLD", "SPI0_WP", | ||
"SPI1_CLK", "SPI1_MOSI", "SPI1_MISO"; | ||
input-enable; | ||
drive-strength = <MTK_DRIVE_4mA>; | ||
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; | ||
}; | ||
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conf-clk { | ||
pins = "SPI1_CS"; | ||
drive-strength = <MTK_DRIVE_6mA>; | ||
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; | ||
}; | ||
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conf-rst { | ||
pins = "PWM0"; | ||
drive-strength = <MTK_DRIVE_4mA>; | ||
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; | ||
}; | ||
}; | ||
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mmc0_pins_uhs: mmc0-pins-uhs { | ||
mux { | ||
function = "flash"; | ||
groups = "emmc_45"; | ||
}; | ||
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conf-cmd-dat { | ||
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO", | ||
"SPI0_CS", "SPI0_HOLD", "SPI0_WP", | ||
"SPI1_CLK", "SPI1_MOSI", "SPI1_MISO"; | ||
input-enable; | ||
drive-strength = <MTK_DRIVE_4mA>; | ||
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; | ||
}; | ||
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conf-clk { | ||
pins = "SPI1_CS"; | ||
drive-strength = <MTK_DRIVE_6mA>; | ||
bias-pull-down = <MTK_PUPD_SET_R1R0_10>; | ||
}; | ||
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conf-rst { | ||
pins = "PWM0"; | ||
drive-strength = <MTK_DRIVE_4mA>; | ||
bias-pull-up = <MTK_PUPD_SET_R1R0_01>; | ||
}; | ||
}; | ||
}; | ||
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&factory { | ||
compatible = "nvmem-cells"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
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macaddr_24: macaddr@24 { | ||
reg = <0x24 0x6>; | ||
}; | ||
macaddr_2a: macaddr@2a { | ||
reg = <0x2a 0x6>; | ||
}; | ||
}; | ||
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&wifi { | ||
mediatek,mtd-eeprom = <&factory 0x0>; | ||
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status = "okay"; | ||
}; |
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