VNx: Vitis Network Examples

Run Time for AIE and FPGA based platforms

Collection of builder repositories for BinaryBuilder.jl

Ready-to-link, packaged Aurora IP on four QSFP28 lanes, providing 100Gb/s throughput

quarto IEEE template journal

Accelerated Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators

Framework providing operating system abstractions and a range of shared networking (RDMA, TCP/IP) and memory services to common modern heterogeneous platforms.

A OpenCL-based FPGA benchmark suite for HPC

Adds support for Acronyms, and List of Acronyms, to Quarto documents.

Generate multiple, topic-specific bibliographies.

Record MPI operations on tape

A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.

Python bindings for ACCL, the Alveo Collective Communication Library

Implementation of the STREAM benchmark for FPGA

Awesome WM complements

FMDE Material and Exercises