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MyAUTLogicDesignCourse

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  1. 64bit_Adder 64bit_Adder Public

    A 64 bit adder circuit that is implemented in gate level with verilog and simulated with ModelSim.

    Verilog

  2. TrafficLight TrafficLight Public

    Design of the logic of a traffic light with verilog

    Verilog

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  • TrafficLight Public

    Design of the logic of a traffic light with verilog

    MyAUTLogicDesignCourse/TrafficLight’s past year of commit activity
    Verilog 0 0 0 0 Updated Jan 18, 2017
  • 64bit_Adder Public

    A 64 bit adder circuit that is implemented in gate level with verilog and simulated with ModelSim.

    MyAUTLogicDesignCourse/64bit_Adder’s past year of commit activity
    Verilog 0 0 0 0 Updated Dec 26, 2016

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