[util] Document minimal requirement for Xilinx Vivado

This is related to lowRISC#1425.

doc/02_user/system_requirements.rst

@@ -8,7 +8,7 @@ The following tools are known to work with the RTL code of Ibex.
 Please `file an issue <https://github.com/lowRISC/ibex/issues>`_ if you experience problems with any of the listed tools, or if you have successfully used a tool with Ibex which is not listed here.
 
 - Synopsys Design Compiler
-- Xilinx Vivado
+- Xilinx Vivado, version |tool_requirements.vivado| and up.
 - Verilator, version |tool_requirements.verilator| and up.
 - Synopsys VCS, version at least |tool_requirements.vcs|.
 - Cadence Incisive/Xcelium

tool_requirements.py

@@ -10,5 +10,9 @@
     'vcs': {
         'min_version': '2020.03-SP2',
         'as_needed': True
-    }
+    },
+    'vivado': {
+        'min_version': '2020.2',
+        'as_needed': True
+    },
 }